1/* $Id: hublb_next.h,v 1.1.1.1 2008/10/15 03:29:03 james26_jang Exp $
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License.  See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved.
8 */
9#ifndef _ASM_IA64_SN_SN1_HUBLB_NEXT_H
10#define _ASM_IA64_SN_SN1_HUBLB_NEXT_H
11
12/**********************************************************************
13
14 This contains some mask and shift values for LB defined as required
15 for compatibility.
16
17 **********************************************************************/
18
19#define LRI_SYSTEM_SIZE_SHFT        46
20#define LRI_SYSTEM_SIZE_MASK        (UINT64_CAST 0x3 << LRI_SYSTEM_SIZE_SHFT)
21#define LRI_NODEID_SHFT        32
22#define LRI_NODEID_MASK        (UINT64_CAST 0xff << LRI_NODEID_SHFT)/* Node ID    */
23#define LRI_CHIPID_SHFT		12
24#define LRI_CHIPID_MASK		(UINT64_CAST 0xffff << LRI_CHIPID_SHFT) /* should be 0x3012 */
25#define LRI_REV_SHFT        28
26#define LRI_REV_MASK        (UINT64_CAST 0xf << LRI_REV_SHFT)/* Chip revision    */
27
28/* Values for LRI_SYSTEM_SIZE */
29#define SYSTEM_SIZE_INVALID	0x3
30#define SYSTEM_SIZE_NMODE	0x2
31#define SYSTEM_SIZE_COARSE 	0x1
32#define SYSTEM_SIZE_SMALL	0x0
33
34/* In fine mode, each node is a region.  In coarse mode, there are
35 * 2 nodes per region.  In N-mode, there are 4 nodes per region. */
36#define NASID_TO_FINEREG_SHFT   0
37#define NASID_TO_COARSEREG_SHFT 1
38#define NASID_TO_NMODEREG_SHFT  2
39
40#define LR_LOCALRESET               (UINT64_CAST 1)
41/*
42 * LB_VECTOR_PARMS mask and shift definitions.
43 * TYPE may be any of the first four PIOTYPEs defined under NI_VECTOR_STATUS.
44 */
45
46#define LVP_BUSY		(UINT64_CAST 1 << 63)
47#define LVP_PIOID_SHFT          40
48#define LVP_PIOID_MASK          (UINT64_CAST 0x7ff << 40)
49#define LVP_WRITEID_SHFT        32
50#define LVP_WRITEID_MASK        (UINT64_CAST 0xff << 32)
51#define LVP_ADDRESS_MASK        (UINT64_CAST 0xfffff8)   /* Bits 23:3        */
52#define LVP_TYPE_SHFT           0
53#define LVP_TYPE_MASK           (UINT64_CAST 0x3)
54
55/* LB_VECTOR_STATUS mask and shift definitions */
56
57#define LVS_VALID               (UINT64_CAST 1 << 63)
58#define LVS_OVERRUN             (UINT64_CAST 1 << 62)
59#define LVS_TARGET_SHFT         51
60#define LVS_TARGET_MASK         (UINT64_CAST 0x7ff << 51)
61#define LVS_PIOID_SHFT          40
62#define LVS_PIOID_MASK          (UINT64_CAST 0x7ff << 40)
63#define LVS_WRITEID_SHFT        32
64#define LVS_WRITEID_MASK        (UINT64_CAST 0xff << 32)
65#define LVS_ADDRESS_MASK        (UINT64_CAST 0xfffff8)   /* Bits 23:3     */
66#define LVS_TYPE_SHFT           0
67#define LVS_TYPE_MASK           (UINT64_CAST 0x7)
68#define LVS_ERROR_MASK          (UINT64_CAST 0x4)  /* bit set means error */
69
70/* LB_RT_LOCAL_CTRL mask and shift definitions */
71
72#define LRLC_USE_INT_SHFT       32
73#define LRLC_USE_INT_MASK       (UINT64_CAST 1 << 32)
74#define LRLC_USE_INT            (UINT64_CAST 1 << 32)
75#define LRLC_GCLK_SHFT          28
76#define LRLC_GCLK_MASK          (UINT64_CAST 1 << 28)
77#define LRLC_GCLK               (UINT64_CAST 1 << 28)
78#define LRLC_GCLK_COUNT_SHFT    16
79#define LRLC_GCLK_COUNT_MASK    (UINT64_CAST 0x3ff << 16)
80#define LRLC_MAX_COUNT_SHFT     4
81#define LRLC_MAX_COUNT_MASK     (UINT64_CAST 0x3ff << 4)
82#define LRLC_GCLK_EN_SHFT       0
83#define LRLC_GCLK_EN_MASK       (UINT64_CAST 1)
84#define LRLC_GCLK_EN            (UINT64_CAST 1)
85
86/* LB_NODES_ABSENT mask and shift definitions */
87#define LNA_VALID_SHFT		15
88#define LNA_VALID_MASK		(UINT64_CAST 1 << LNA_VALID_SHFT)
89#define LNA_VALID		(UINT64_CAST 1 << LNA_VALID_SHFT)
90#define LNA_NODE_SHFT		0
91#define LNA_NODE_MASK		(UINT64_CAST 0xff << LNA_NODE_SHFT)
92
93/* LB_NODES_ABSENT has 4 identical sub-registers, on 16-bit boundaries */
94#define LNA_ENTRY_SHFT		16
95#define LNA_MAX_ENTRIES		4
96#define LNA_ADD(_reg, _n)	((_reg) = (_reg) << LNA_ENTRY_SHFT | \
97				 	LNA_VALID | (_n) << LNA_NODE_SHFT)
98
99#define  PIOTYPE_READ           0       /* VECTOR_PARMS and VECTOR_STATUS   */
100#define  PIOTYPE_WRITE          1       /* VECTOR_PARMS and VECTOR_STATUS   */
101#define  PIOTYPE_UNDEFINED      2       /* VECTOR_PARMS and VECTOR_STATUS   */
102#define  PIOTYPE_EXCHANGE       3       /* VECTOR_PARMS and VECTOR_STATUS   */
103#define  PIOTYPE_ADDR_ERR       4       /* VECTOR_STATUS only               */
104#define  PIOTYPE_CMD_ERR        5       /* VECTOR_STATUS only               */
105#define  PIOTYPE_PROT_ERR       6       /* VECTOR_STATUS only               */
106#define  PIOTYPE_UNKNOWN        7       /* VECTOR_STATUS only               */
107
108#endif /* _ASM_IA64_SN_SN1_HUBLB_NEXT_H */
109