1#ifndef _ASM_IA64_HW_IRQ_H 2#define _ASM_IA64_HW_IRQ_H 3 4/* 5 * Copyright (C) 2001, 2002 Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com> 7 */ 8 9#include <linux/sched.h> 10#include <linux/types.h> 11 12#include <asm/machvec.h> 13#include <asm/ptrace.h> 14#include <asm/smp.h> 15 16typedef u8 ia64_vector; 17 18/* 19 * 0 special 20 * 21 * 1,3-14 are reserved from firmware 22 * 23 * 16-255 (vectored external interrupts) are available 24 * 25 * 15 spurious interrupt (see IVR) 26 * 27 * 16 lowest priority, 255 highest priority 28 * 29 * 15 classes of 16 interrupts each. 30 */ 31#define IA64_MIN_VECTORED_IRQ 16 32#define IA64_MAX_VECTORED_IRQ 255 33#define IA64_NUM_VECTORS 256 34 35#define IA64_SPURIOUS_INT_VECTOR 0x0f 36 37/* 38 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI. 39 */ 40#define IA64_PCE_VECTOR 0x1e /* platform corrected error interrupt vector */ 41#define IA64_CMC_VECTOR 0x1f /* correctable machine-check interrupt vector */ 42/* 43 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs. 44 */ 45#define IA64_FIRST_DEVICE_VECTOR 0x30 46#define IA64_LAST_DEVICE_VECTOR 0xe7 47 48#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */ 49#define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */ 50#define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */ 51#define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */ 52#define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */ 53#define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */ 54 55/* Used for encoding redirected irqs */ 56 57#define IA64_IRQ_REDIRECTED (1 << 31) 58 59/* IA64 inter-cpu interrupt related definitions */ 60 61#define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000 62 63/* Delivery modes for inter-cpu interrupts */ 64enum { 65 IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */ 66 IA64_IPI_DM_PMI = 0x2, /* pend a PMI */ 67 IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */ 68 IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */ 69 IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */ 70}; 71 72extern __u8 isa_irq_to_vector_map[16]; 73#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)] 74 75extern unsigned long ipi_base_addr; 76 77extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ 78 79extern int ia64_alloc_vector (void); /* allocate a free vector */ 80extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect); 81extern void register_percpu_irq (ia64_vector vec, struct irqaction *action); 82 83static inline void 84hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector) 85{ 86 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0); 87} 88 89/* 90 * Default implementations for the irq-descriptor API: 91 */ 92 93extern struct irq_desc _irq_desc[NR_IRQS]; 94 95#ifndef CONFIG_IA64_GENERIC 96static inline struct irq_desc * 97__ia64_irq_desc (unsigned int irq) 98{ 99 return _irq_desc + irq; 100} 101 102static inline ia64_vector 103__ia64_irq_to_vector (unsigned int irq) 104{ 105 return (ia64_vector) irq; 106} 107 108static inline unsigned int 109__ia64_local_vector_to_irq (ia64_vector vec) 110{ 111 return (unsigned int) vec; 112} 113#endif 114 115/* 116 * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt 117 * vectors. On smaller systems, there is a one-to-one correspondence between interrupt 118 * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt 119 * domains meaning that the translation from vector number to irq number depends on the 120 * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent 121 * differences and provides a uniform means to translate between vector and irq numbers 122 * and to obtain the irq descriptor for a given irq number. 123 */ 124 125/* Return a pointer to the irq descriptor for IRQ. */ 126static inline struct irq_desc * 127irq_desc (int irq) 128{ 129 return platform_irq_desc(irq); 130} 131 132/* Extract the IA-64 vector that corresponds to IRQ. */ 133static inline ia64_vector 134irq_to_vector (int irq) 135{ 136 return platform_irq_to_vector(irq); 137} 138 139/* 140 * Convert the local IA-64 vector to the corresponding irq number. This translation is 141 * done in the context of the interrupt domain that the currently executing CPU belongs 142 * to. 143 */ 144static inline unsigned int 145local_vector_to_irq (ia64_vector vec) 146{ 147 return platform_local_vector_to_irq(vec); 148} 149 150#endif /* _ASM_IA64_HW_IRQ_H */ 151