1/*
2 * linux/include/asm-arm/arch-sa1100/irqs.h
3 *
4 * Copyright (C) 1996 Russell King
5 * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus).
6 * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation)
7 *
8 * 2001/11/14	RMK	Cleaned up and standardised a lot of the IRQs.
9 */
10#include <linux/config.h>
11
12#define	IRQ_GPIO0		0
13#define	IRQ_GPIO1		1
14#define	IRQ_GPIO2		2
15#define	IRQ_GPIO3		3
16#define	IRQ_GPIO4		4
17#define	IRQ_GPIO5		5
18#define	IRQ_GPIO6		6
19#define	IRQ_GPIO7		7
20#define	IRQ_GPIO8		8
21#define	IRQ_GPIO9		9
22#define	IRQ_GPIO10		10
23#define	IRQ_GPIO11_27		11
24#define	IRQ_LCD  		12	/* LCD controller           */
25#define	IRQ_Ser0UDC		13	/* Ser. port 0 UDC          */
26#define	IRQ_Ser1SDLC		14	/* Ser. port 1 SDLC         */
27#define	IRQ_Ser1UART		15	/* Ser. port 1 UART         */
28#define	IRQ_Ser2ICP		16	/* Ser. port 2 ICP          */
29#define	IRQ_Ser3UART		17	/* Ser. port 3 UART         */
30#define	IRQ_Ser4MCP		18	/* Ser. port 4 MCP          */
31#define	IRQ_Ser4SSP		19	/* Ser. port 4 SSP          */
32#define	IRQ_DMA0 		20	/* DMA controller channel 0 */
33#define	IRQ_DMA1 		21	/* DMA controller channel 1 */
34#define	IRQ_DMA2 		22	/* DMA controller channel 2 */
35#define	IRQ_DMA3 		23	/* DMA controller channel 3 */
36#define	IRQ_DMA4 		24	/* DMA controller channel 4 */
37#define	IRQ_DMA5 		25	/* DMA controller channel 5 */
38#define	IRQ_OST0 		26	/* OS Timer match 0         */
39#define	IRQ_OST1 		27	/* OS Timer match 1         */
40#define	IRQ_OST2 		28	/* OS Timer match 2         */
41#define	IRQ_OST3 		29	/* OS Timer match 3         */
42#define	IRQ_RTC1Hz		30	/* RTC 1 Hz clock           */
43#define	IRQ_RTCAlrm		31	/* RTC Alarm                */
44
45#define	IRQ_GPIO11		32
46#define	IRQ_GPIO12		33
47#define	IRQ_GPIO13		34
48#define	IRQ_GPIO14		35
49#define	IRQ_GPIO15		36
50#define	IRQ_GPIO16		37
51#define	IRQ_GPIO17		38
52#define	IRQ_GPIO18		39
53#define	IRQ_GPIO19		40
54#define	IRQ_GPIO20		41
55#define	IRQ_GPIO21		42
56#define	IRQ_GPIO22		43
57#define	IRQ_GPIO23		44
58#define	IRQ_GPIO24		45
59#define	IRQ_GPIO25		46
60#define	IRQ_GPIO26		47
61#define	IRQ_GPIO27		48
62
63/*
64 * To get the GPIO number from an IRQ number
65 */
66#define GPIO_11_27_IRQ(i)	((i) - 21)
67
68/*
69 * The next 16 interrupts are for board specific purposes.  Since
70 * the kernel can only run on one machine at a time, we can re-use
71 * these.  If you need more, increase IRQ_BOARD_END, but keep it
72 * within sensible limits.  IRQs 49 to 64 are available.
73 */
74#define IRQ_BOARD_START		49
75#define IRQ_BOARD_END		65
76
77#define IRQ_SA1111_START	(IRQ_BOARD_END)
78#define IRQ_GPAIN0		(IRQ_BOARD_END + 0)
79#define IRQ_GPAIN1		(IRQ_BOARD_END + 1)
80#define IRQ_GPAIN2		(IRQ_BOARD_END + 2)
81#define IRQ_GPAIN3		(IRQ_BOARD_END + 3)
82#define IRQ_GPBIN0		(IRQ_BOARD_END + 4)
83#define IRQ_GPBIN1		(IRQ_BOARD_END + 5)
84#define IRQ_GPBIN2		(IRQ_BOARD_END + 6)
85#define IRQ_GPBIN3		(IRQ_BOARD_END + 7)
86#define IRQ_GPBIN4		(IRQ_BOARD_END + 8)
87#define IRQ_GPBIN5		(IRQ_BOARD_END + 9)
88#define IRQ_GPCIN0		(IRQ_BOARD_END + 10)
89#define IRQ_GPCIN1		(IRQ_BOARD_END + 11)
90#define IRQ_GPCIN2		(IRQ_BOARD_END + 12)
91#define IRQ_GPCIN3		(IRQ_BOARD_END + 13)
92#define IRQ_GPCIN4		(IRQ_BOARD_END + 14)
93#define IRQ_GPCIN5		(IRQ_BOARD_END + 15)
94#define IRQ_GPCIN6		(IRQ_BOARD_END + 16)
95#define IRQ_GPCIN7		(IRQ_BOARD_END + 17)
96#define IRQ_MSTXINT		(IRQ_BOARD_END + 18)
97#define IRQ_MSRXINT		(IRQ_BOARD_END + 19)
98#define IRQ_MSSTOPERRINT	(IRQ_BOARD_END + 20)
99#define IRQ_TPTXINT		(IRQ_BOARD_END + 21)
100#define IRQ_TPRXINT		(IRQ_BOARD_END + 22)
101#define IRQ_TPSTOPERRINT	(IRQ_BOARD_END + 23)
102#define SSPXMTINT		(IRQ_BOARD_END + 24)
103#define SSPRCVINT		(IRQ_BOARD_END + 25)
104#define SSPROR			(IRQ_BOARD_END + 26)
105#define AUDXMTDMADONEA		(IRQ_BOARD_END + 32)
106#define AUDRCVDMADONEA		(IRQ_BOARD_END + 33)
107#define AUDXMTDMADONEB		(IRQ_BOARD_END + 34)
108#define AUDRCVDMADONEB		(IRQ_BOARD_END + 35)
109#define AUDTFSR			(IRQ_BOARD_END + 36)
110#define AUDRFSR			(IRQ_BOARD_END + 37)
111#define AUDTUR			(IRQ_BOARD_END + 38)
112#define AUDROR			(IRQ_BOARD_END + 39)
113#define AUDDTS			(IRQ_BOARD_END + 40)
114#define AUDRDD			(IRQ_BOARD_END + 41)
115#define AUDSTO			(IRQ_BOARD_END + 42)
116#define USBPWR			(IRQ_BOARD_END + 43)
117#define NIRQHCIM		(IRQ_BOARD_END + 44)
118#define IRQHCIBUFFACC		(IRQ_BOARD_END + 45)
119#define IRQHCIRMTWKP		(IRQ_BOARD_END + 46)
120#define NHCIMFCIR		(IRQ_BOARD_END + 47)
121#define USB_PORT_RESUME		(IRQ_BOARD_END + 48)
122#define S0_READY_NINT		(IRQ_BOARD_END + 49)
123#define S1_READY_NINT		(IRQ_BOARD_END + 50)
124#define S0_CD_VALID		(IRQ_BOARD_END + 51)
125#define S1_CD_VALID		(IRQ_BOARD_END + 52)
126#define S0_BVD1_STSCHG		(IRQ_BOARD_END + 53)
127#define S1_BVD1_STSCHG		(IRQ_BOARD_END + 54)
128
129/*
130 * Figure out the MAX IRQ number.
131 *
132 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
133 * If graphicsclient or graphicsmaster, we don't have a SA1111.
134 * Otherwise, we have the standard IRQs only.
135 */
136#ifdef CONFIG_SA1111
137#define NR_IRQS			(S1_BVD1_STSCHG + 1)
138#elif defined(CONFIG_SA1100_GRAPHICSCLIENT) || \
139      defined(CONFIG_SA1100_GRAPHICSMASTER)
140#define NR_IRQS			(IRQ_BOARD_END)
141#else
142#define NR_IRQS			(IRQ_BOARD_START)
143#endif
144
145/*
146 * Board specific IRQs.  Define them here.
147 * Do not surround them with ifdefs.
148 */
149#define IRQ_NEPONSET_SMC9196	(IRQ_BOARD_START + 0)
150#define IRQ_NEPONSET_USAR	(IRQ_BOARD_START + 1)
151
152/* PT Digital Board Interrupts (CONFIG_SA1100_PT_SYSTEM3) */
153#define IRQ_SYSTEM3_SMC9196	(IRQ_BOARD_START + 0)
154