1/*
2 * linux/include/asm-x8664/timex.h
3 *
4 * x8664 architecture timex specifications
5 */
6#ifndef _ASMx8664_TIMEX_H
7#define _ASMx8664_TIMEX_H
8
9#include <linux/config.h>
10#include <asm/msr.h>
11#include <asm/vsyscall.h>
12
13#define CLOCK_TICK_RATE (hpet.address ? hpet.hz : 1193182L)
14#define FINETUNE	((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
15			1000000 / CLOCK_TICK_RATE) << (SHIFT_SCALE - SHIFT_HZ)) / HZ)
16
17/*
18 * We only use the low 32 bits, and we'd simply better make sure
19 * that we reschedule before that wraps. Scheduling at least every
20 * four billion cycles just basically sounds like a good idea,
21 * regardless of how fast the machine is.
22 */
23typedef unsigned long long cycles_t;
24
25extern cycles_t cacheflush_time;
26
27static inline cycles_t get_cycles (void)
28{
29	unsigned long long ret;
30	rdtscll(ret);
31	return ret;
32}
33
34extern unsigned int cpu_khz;
35
36/*
37 * Documentation on HPET can be found at:
38 *      http://www.intel.com/ial/home/sp/pcmmspec.htm
39 *      ftp://download.intel.com/ial/home/sp/mmts098.pdf
40 */
41
42#define HPET_ID		0x000
43#define HPET_PERIOD	0x004
44#define HPET_CFG	0x010
45#define HPET_STATUS	0x020
46#define HPET_COUNTER	0x0f0
47#define HPET_T0_CFG	0x100
48#define HPET_T0_CMP	0x108
49#define HPET_T0_ROUTE	0x110
50
51#define HPET_ID_VENDOR	0xffff0000
52#define HPET_ID_LEGSUP	0x00008000
53#define HPET_ID_NUMBER	0x00000f00
54#define HPET_ID_REV	0x000000ff
55
56#define HPET_CFG_ENABLE	0x001
57#define HPET_CFG_LEGACY	0x002
58
59#define HPET_T0_ENABLE		0x004
60#define HPET_T0_PERIODIC	0x008
61#define HPET_T0_SETVAL		0x040
62#define HPET_T0_32BIT		0x100
63
64extern struct hpet_data hpet;
65
66#endif
67