1/* $Id: mbus.h,v 1.1.1.1 2008/10/15 03:27:26 james26_jang Exp $ 2 * mbus.h: Various defines for MBUS modules. 3 * 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7#ifndef _SPARC_MBUS_H 8#define _SPARC_MBUS_H 9 10#include <asm/ross.h> /* HyperSparc stuff */ 11#include <asm/cypress.h> /* Cypress Chips */ 12#include <asm/viking.h> /* Ugh, bug city... */ 13 14enum mbus_module { 15 HyperSparc = 0, 16 Cypress = 1, 17 Cypress_vE = 2, 18 Cypress_vD = 3, 19 Swift_ok = 4, 20 Swift_bad_c = 5, 21 Swift_lots_o_bugs = 6, 22 Tsunami = 7, 23 Viking_12 = 8, 24 Viking_2x = 9, 25 Viking_30 = 10, 26 Viking_35 = 11, 27 Viking_new = 12, 28 TurboSparc = 13, 29 SRMMU_INVAL_MOD = 14, 30}; 31 32extern enum mbus_module srmmu_modtype; 33extern unsigned int viking_rev, swift_rev, cypress_rev; 34 35/* HW Mbus module bugs we have to deal with */ 36#define HWBUG_COPYBACK_BROKEN 0x00000001 37#define HWBUG_ASIFLUSH_BROKEN 0x00000002 38#define HWBUG_VACFLUSH_BITROT 0x00000004 39#define HWBUG_KERN_ACCBROKEN 0x00000008 40#define HWBUG_KERN_CBITBROKEN 0x00000010 41#define HWBUG_MODIFIED_BITROT 0x00000020 42#define HWBUG_PC_BADFAULT_ADDR 0x00000040 43#define HWBUG_SUPERSCALAR_BAD 0x00000080 44#define HWBUG_PACINIT_BITROT 0x00000100 45 46extern unsigned int hwbug_bitmask; 47 48/* First the module type values. To find out which you have, just load 49 * the mmu control register from ASI_M_MMUREG alternate address space and 50 * shift the value right 28 bits. 51 */ 52/* IMPL field means the company which produced the chip. */ 53#define MBUS_VIKING 0x4 /* bleech, Texas Instruments Module */ 54#define MBUS_LSI 0x3 /* LSI Logics */ 55#define MBUS_ROSS 0x1 /* Ross is nice */ 56#define MBUS_FMI 0x0 /* Fujitsu Microelectronics/Swift */ 57 58/* Ross Module versions */ 59#define ROSS_604_REV_CDE 0x0 /* revisions c, d, and e */ 60#define ROSS_604_REV_F 0x1 /* revision f */ 61#define ROSS_605 0xf /* revision a, a.1, and a.2 */ 62#define ROSS_605_REV_B 0xe /* revision b */ 63 64/* TI Viking Module versions */ 65#define VIKING_REV_12 0x1 /* Version 1.2 or SPARCclassic's CPU */ 66#define VIKING_REV_2 0x2 /* Version 2.1, 2.2, 2.3, and 2.4 */ 67#define VIKING_REV_30 0x3 /* Version 3.0 */ 68#define VIKING_REV_35 0x4 /* Version 3.5 */ 69 70/* LSI Logics. */ 71#define LSI_L64815 0x0 72 73/* Fujitsu */ 74#define FMI_AURORA 0x4 /* MB8690x, a Swift module... */ 75#define FMI_TURBO 0x5 /* MB86907, a TurboSparc module... */ 76 77/* For multiprocessor support we need to be able to obtain the CPU id and 78 * the MBUS Module id. 79 */ 80 81/* The CPU ID is encoded in the trap base register, 20 bits to the left of 82 * bit zero, with 2 bits being significant. 83 */ 84#define TBR_ID_SHIFT 20 85 86extern __inline__ int get_cpuid(void) 87{ 88 register int retval; 89 __asm__ __volatile__("rd %%tbr, %0\n\t" 90 "srl %0, %1, %0\n\t" : 91 "=r" (retval) : 92 "i" (TBR_ID_SHIFT)); 93 return (retval & 3); 94} 95 96extern __inline__ int get_modid(void) 97{ 98 return (get_cpuid() | 0x8); 99} 100 101 102#endif /* !(_SPARC_MBUS_H) */ 103