1/* 2 * linux/include/asm-arm/arch-integrator/irqs.h 3 * 4 * Copyright (C) 1999 ARM Limited 5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22/* Use the integrator definitions */ 23#include <asm/arch/platform.h> 24 25/* 26 * IRQ interrupts definitions are the same the INT definitions 27 * held within platform.h 28 */ 29#define IRQ_SOFTINT INT_SOFTINT 30#define IRQ_UARTINT0 INT_UARTINT0 31#define IRQ_UARTINT1 INT_UARTINT1 32#define IRQ_KMIINT0 INT_KMIINT0 33#define IRQ_KMIINT1 INT_KMIINT1 34#define IRQ_TIMERINT0 INT_TIMERINT0 35#define IRQ_TIMERINT1 INT_TIMERINT1 36#define IRQ_TIMERINT2 INT_TIMERINT2 37#define IRQ_RTCINT INT_RTCINT 38#define IRQ_EXPINT0 INT_EXPINT0 39#define IRQ_EXPINT1 INT_EXPINT1 40#define IRQ_EXPINT2 INT_EXPINT2 41#define IRQ_EXPINT3 INT_EXPINT3 42#define IRQ_PCIINT0 INT_PCIINT0 43#define IRQ_PCIINT1 INT_PCIINT1 44#define IRQ_PCIINT2 INT_PCIINT2 45#define IRQ_PCIINT3 INT_PCIINT3 46#define IRQ_V3INT INT_V3INT 47#define IRQ_CPINT0 INT_CPINT0 48#define IRQ_CPINT1 INT_CPINT1 49#define IRQ_LBUSTIMEOUT INT_LBUSTIMEOUT 50#define IRQ_APCINT INT_APCINT 51 52#define IRQMASK_SOFTINT INTMASK_SOFTINT 53#define IRQMASK_UARTINT0 INTMASK_UARTINT0 54#define IRQMASK_UARTINT1 INTMASK_UARTINT1 55#define IRQMASK_KMIINT0 INTMASK_KMIINT0 56#define IRQMASK_KMIINT1 INTMASK_KMIINT1 57#define IRQMASK_TIMERINT0 INTMASK_TIMERINT0 58#define IRQMASK_TIMERINT1 INTMASK_TIMERINT1 59#define IRQMASK_TIMERINT2 INTMASK_TIMERINT2 60#define IRQMASK_RTCINT INTMASK_RTCINT 61#define IRQMASK_EXPINT0 INTMASK_EXPINT0 62#define IRQMASK_EXPINT1 INTMASK_EXPINT1 63#define IRQMASK_EXPINT2 INTMASK_EXPINT2 64#define IRQMASK_EXPINT3 INTMASK_EXPINT3 65#define IRQMASK_PCIINT0 INTMASK_PCIINT0 66#define IRQMASK_PCIINT1 INTMASK_PCIINT1 67#define IRQMASK_PCIINT2 INTMASK_PCIINT2 68#define IRQMASK_PCIINT3 INTMASK_PCIINT3 69#define IRQMASK_V3INT INTMASK_V3INT 70#define IRQMASK_CPINT0 INTMASK_CPINT0 71#define IRQMASK_CPINT1 INTMASK_CPINT1 72#define IRQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT 73#define IRQMASK_APCINT INTMASK_APCINT 74 75/* 76 * FIQ interrupts definitions are the same the INT definitions. 77 */ 78#define FIQ_SOFTINT INT_SOFTINT 79#define FIQ_UARTINT0 INT_UARTINT0 80#define FIQ_UARTINT1 INT_UARTINT1 81#define FIQ_KMIINT0 INT_KMIINT0 82#define FIQ_KMIINT1 INT_KMIINT1 83#define FIQ_TIMERINT0 INT_TIMERINT0 84#define FIQ_TIMERINT1 INT_TIMERINT1 85#define FIQ_TIMERINT2 INT_TIMERINT2 86#define FIQ_RTCINT INT_RTCINT 87#define FIQ_EXPINT0 INT_EXPINT0 88#define FIQ_EXPINT1 INT_EXPINT1 89#define FIQ_EXPINT2 INT_EXPINT2 90#define FIQ_EXPINT3 INT_EXPINT3 91#define FIQ_PCIINT0 INT_PCIINT0 92#define FIQ_PCIINT1 INT_PCIINT1 93#define FIQ_PCIINT2 INT_PCIINT2 94#define FIQ_PCIINT3 INT_PCIINT3 95#define FIQ_V3INT INT_V3INT 96#define FIQ_CPINT0 INT_CPINT0 97#define FIQ_CPINT1 INT_CPINT1 98#define FIQ_LBUSTIMEOUT INT_LBUSTIMEOUT 99#define FIQ_APCINT INT_APCINT 100 101#define FIQMASK_SOFTINT INTMASK_SOFTINT 102#define FIQMASK_UARTINT0 INTMASK_UARTINT0 103#define FIQMASK_UARTINT1 INTMASK_UARTINT1 104#define FIQMASK_KMIINT0 INTMASK_KMIINT0 105#define FIQMASK_KMIINT1 INTMASK_KMIINT1 106#define FIQMASK_TIMERINT0 INTMASK_TIMERINT0 107#define FIQMASK_TIMERINT1 INTMASK_TIMERINT1 108#define FIQMASK_TIMERINT2 INTMASK_TIMERINT2 109#define FIQMASK_RTCINT INTMASK_RTCINT 110#define FIQMASK_EXPINT0 INTMASK_EXPINT0 111#define FIQMASK_EXPINT1 INTMASK_EXPINT1 112#define FIQMASK_EXPINT2 INTMASK_EXPINT2 113#define FIQMASK_EXPINT3 INTMASK_EXPINT3 114#define FIQMASK_PCIINT0 INTMASK_PCIINT0 115#define FIQMASK_PCIINT1 INTMASK_PCIINT1 116#define FIQMASK_PCIINT2 INTMASK_PCIINT2 117#define FIQMASK_PCIINT3 INTMASK_PCIINT3 118#define FIQMASK_V3INT INTMASK_V3INT 119#define FIQMASK_CPINT0 INTMASK_CPINT0 120#define FIQMASK_CPINT1 INTMASK_CPINT1 121#define FIQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT 122#define FIQMASK_APCINT INTMASK_APCINT 123 124/* 125 * Misc. interrupt definitions 126 */ 127#define IRQ_KEYBDINT INT_KMIINT0 128#define IRQ_MOUSEINT INT_KMIINT1 129 130#define IRQMASK_KEYBDINT INTMASK_KMIINT0 131#define IRQMASK_MOUSEINT INTMASK_KMIINT1 132 133#define NR_IRQS (MAXIRQNUM + 1) 134 135