1
2/* OEM Data for 310/325 series */
3
4const UCHAR SiS310_CRT2DelayCompensation1 = 0x04; /* 301A */
5
6const UCHAR SiS310_LCDDelayCompensation1[] =
7{
8		 0x00,0x00,0x00,    /*   800x600 */
9		 0x0b,0x0b,0x0b,    /*  1024x768 */
10		 0x08,0x08,0x08,    /* 1280x1024 */
11		 0x00,0x00,0x00,    /*   640x480 (unknown) */
12		 0x00,0x00,0x00,    /*  1024x600 (unknown) */
13		 0x00,0x00,0x00,    /*  1152x864 (unknown) */
14		 0x08,0x08,0x08,    /*  1280x960 (guessed) */
15		 0x00,0x00,0x00,    /*  1152x768 (unknown) */
16		 0x08,0x08,0x08,    /* 1400x1050 */
17		 0x08,0x08,0x08,    /*  1280x768  (guessed) */
18		 0x00,0x00,0x00,    /* 1600x1200 */
19		 0x00,0x00,0x00,    /*   320x480 (unknown) */
20		 0x00,0x00,0x00,
21		 0x00,0x00,0x00,
22		 0x00,0x00,0x00
23};
24
25const UCHAR SiS310_TVDelayCompensation1[] =
26{
27		  0x02,0x02,    /* NTSC Enhanced, Standard */
28                  0x02,0x02,    /* PAL */
29		  0x08,0x0b     /* HiVision */
30};
31
32const UCHAR SiS310_CRT2DelayCompensation2 = 0x00;   /* TW: From 650/301LV BIOS; was 0x0C; */      /* 301B */
33
34UCHAR SiS310_LCDDelayCompensation2[] =
35{
36		  0x01,0x01,0x01,    /*   800x600 */
37		  0x01,0x01,0x01,    /*  1024x768 */
38		  0x01,0x01,0x01,    /* 1280x1024 */
39                  0x01,0x01,0x01,    /*   640x480 (unknown) */
40		  0x01,0x01,0x01,    /*  1024x600 (unknown) */
41		  0x01,0x01,0x01,    /*  1152x864 (unknown) */
42		  0x01,0x01,0x01,    /*  1280x960 (guessed) */
43		  0x01,0x01,0x01,    /*  1152x768 (unknown) */
44		  0x01,0x01,0x01,    /* 1400x1050 */
45		  0x08,0x08,0x08,    /*  1280x768  (guessed) */
46		  0x01,0x01,0x01,    /* 1600x1200 */
47		  0x02,0x02,0x02,
48		  0x02,0x02,0x02,
49		  0x02,0x02,0x02,
50		  0x02,0x02,0x02
51};
52
53const UCHAR SiS310_TVDelayCompensation2[] =
54{
55		  0x03,0x03,        /* TW: From 650/301LVx 1.10.6s BIOS */
56		  0x03,0x03,
57		  0x03,0x03
58};
59
60const UCHAR SiS310_CRT2DelayCompensation3 = 0x00;   /* LVDS */
61
62const UCHAR SiS310_LCDDelayCompensation3[] =
63{
64                   0x00,0x00,0x00,    /*   800x600 */
65		   0x00,0x00,0x00,    /*  1024x768 */
66		   0x00,0x00,0x00,    /* 1280x1024 */
67		   0x00,0x00,0x00,    /*   640x480 (unknown) */
68		   0x00,0x00,0x00,    /*  1024x600 (unknown) */
69		   0x00,0x00,0x00,    /*  1152x864 (unknown) */
70		   0x00,0x00,0x00,    /*  1280x960 (guessed) */
71		   0x00,0x00,0x00,    /*  1152x768 (unknown) */
72		   0x00,0x00,0x00,    /* 1400x1050 */
73		   0x00,0x00,0x00,    /*  1280x768  (guessed) */
74		   0x00,0x00,0x00,    /* 1600x1200 */
75		   0x00,0x00,0x00,
76		   0x00,0x00,0x00,
77		   0x00,0x00,0x00,
78		   0x00,0x00,0x00
79};
80
81const UCHAR SiS310_TVDelayCompensation3[] =
82{
83		   0x0a,0x0a,
84		   0x0a,0x0a,
85		   0x0a,0x0a
86};
87
88const UCHAR SiS310_TVAntiFlick1[3][2] =
89{
90            {0x4,0x0},
91	    {0x4,0x8},
92	    {0x0,0x0}
93};
94
95const UCHAR SiS310_TVEdge1[3][2] =
96{
97            {0x0,0x4},
98	    {0x0,0x4},
99	    {0x0,0x0}
100};
101
102const UCHAR SiS310_TVYFilter1[3][8][4] =
103{
104 {
105	{0x00,0xf4,0x10,0x38},
106	{0x00,0xf4,0x10,0x38},
107	{0xeb,0x04,0x25,0x18},
108	{0xf1,0x04,0x1f,0x18},
109	{0x00,0xf4,0x10,0x38},
110	{0xeb,0x04,0x25,0x18},
111	{0xee,0x0c,0x22,0x08},
112	{0xeb,0x15,0x25,0xf6}
113 },
114 {
115	{0x00,0xf4,0x10,0x38},
116	{0x00,0xf4,0x10,0x38},
117	{0xf1,0xf7,0x1f,0x32},
118	{0xf3,0x00,0x1d,0x20},
119	{0x00,0xf4,0x10,0x38},
120	{0xf1,0xf7,0x1f,0x32},
121	{0xf3,0x00,0x1d,0x20},
122	{0xfc,0xfb,0x14,0x2a}
123 },
124 {
125	{0x00,0x00,0x00,0x00},
126	{0x00,0xf4,0x10,0x38},
127	{0x00,0xf4,0x10,0x38},
128	{0xeb,0x04,0x25,0x18},
129	{0xf7,0x06,0x19,0x14},
130	{0x00,0xf4,0x10,0x38},
131	{0xeb,0x04,0x25,0x18},
132	{0xee,0x0c,0x22,0x08}
133 }
134};
135
136const UCHAR SiS310_TVYFilter2[3][9][7] =
137{
138 {
139	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
140	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
141	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
142	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
143	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
144	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
145	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
146	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
147	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
148 },
149 {
150	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
151	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
152	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
153	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
154	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
155	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
156	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
157	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
158	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
159 },
160 {
161	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
162	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
163	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
164	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
165	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
166	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
167	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
168	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
169 }
170};
171
172const UCHAR SiS310_PALMFilter[17][4] =
173{
174	{0x00,0xf4,0x10,0x38},
175	{0x00,0xf4,0x10,0x38},
176	{0xeb,0x04,0x10,0x18},
177	{0xf7,0x06,0x19,0x14},
178	{0x00,0xf4,0x10,0x38},
179	{0xeb,0x04,0x25,0x18},
180	{0xeb,0x04,0x25,0x18},
181	{0xeb,0x15,0x25,0xf6},
182	{0xeb,0x04,0x25,0x18},
183	{0xeb,0x04,0x25,0x18},
184	{0xeb,0x04,0x25,0x18},
185	{0xeb,0x04,0x25,0x18},
186	{0xeb,0x04,0x25,0x18},
187	{0xeb,0x04,0x25,0x18},
188	{0xeb,0x04,0x25,0x18},
189	{0xeb,0x04,0x25,0x18},
190	{0xff,0xff,0xff,0xff}
191};
192
193const UCHAR SiS310_PALNFilter[17][4] =
194{
195	{0x00,0xf4,0x10,0x38},
196	{0x00,0xf4,0x10,0x38},
197	{0xeb,0x04,0x10,0x18},
198	{0xf7,0x06,0x19,0x14},
199	{0x00,0xf4,0x10,0x38},
200	{0xeb,0x04,0x25,0x18},
201	{0xeb,0x04,0x25,0x18},
202	{0xeb,0x15,0x25,0xf6},
203	{0xeb,0x04,0x25,0x18},
204	{0xeb,0x04,0x25,0x18},
205	{0xeb,0x04,0x25,0x18},
206	{0xeb,0x04,0x25,0x18},
207	{0xeb,0x04,0x25,0x18},
208	{0xeb,0x04,0x25,0x18},
209	{0xeb,0x04,0x25,0x18},
210	{0xeb,0x04,0x25,0x18},
211	{0xff,0xff,0xff,0xff}
212};
213
214
215const UCHAR SiS310_PALMFilter2[9][7] =
216{
217	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
218	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
219	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
220	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
221	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
222	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
223	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
224	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
225	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
226};
227
228const UCHAR SiS310_PALNFilter2[9][7] =
229{
230	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
231	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
232	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
233	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
234	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
235	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
236	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
237	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
238	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
239};
240
241const UCHAR SiS310_TVPhaseIncr1[3][2][4]=
242{
243 {
244	{0x21,0xed,0xba,0x08},
245	{0x21,0xed,0xba,0x08}
246 },
247 {
248	{0x2a,0x05,0xe3,0x00},
249	{0x2a,0x05,0xe3,0x00}
250 },
251 {
252	{0x2a,0x05,0xd3,0x00},
253	{0x2a,0x05,0xd3,0x00}
254 }
255};
256
257const UCHAR SiS310_TVPhaseIncr2[3][2][4]=
258{
259 {
260	{0x1e,0x8b,0xda,0xa7},   /* {0x21,0xF1,0x37,0x56}, - new (1.10.6s) */
261	{0x1e,0x8b,0xda,0xa7}    /* {0x21,0xF1,0x37,0x56} */
262 },
263 {
264	{0x2a,0x0a,0x41,0xe9},   /* {0x2a,0x09,0x86,0xe9}, */
265	{0x2a,0x0a,0x41,0xe9}    /* {0x2a,0x09,0x86,0xe9} */
266 },
267 {
268	{0x2a,0x05,0xd3,0x00},
269	{0x2a,0x05,0xd3,0x00}
270 }
271};
272
273
274
275