1/* 2 * in2000.h - Linux device driver definitions for the 3 * Always IN2000 ISA SCSI card. 4 * 5 * IMPORTANT: This file is for version 1.33 - 26/Aug/1998 6 * 7 * Copyright (c) 1996 John Shifflett, GeoLog Consulting 8 * john@geolog.com 9 * jshiffle@netcom.com 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2, or (at your option) 14 * any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 */ 22 23#ifndef IN2000_H 24#define IN2000_H 25 26#include <asm/io.h> 27 28#define PROC_INTERFACE 29#ifdef PROC_INTERFACE 30#define PROC_STATISTICS /* add code for keeping various real time stats */ 31#endif 32 33#define SYNC_DEBUG /* extra info on sync negotiation printed */ 34#define DEBUGGING_ON /* enable command-line debugging bitmask */ 35#define DEBUG_DEFAULTS 0 /* default bitmask - change from command-line */ 36 37#ifdef __i386__ 38#define FAST_READ_IO /* No problems with these on my machine */ 39#define FAST_WRITE_IO 40#endif 41 42#ifdef DEBUGGING_ON 43#define DB(f,a) if (hostdata->args & (f)) a; 44#define CHECK_NULL(p,s) /* if (!(p)) {printk("\n"); while (1) printk("NP:%s\r",(s));} */ 45#else 46#define DB(f,a) 47#define CHECK_NULL(p,s) 48#endif 49 50#define uchar unsigned char 51 52#define read1_io(a) (inb(hostdata->io_base+(a))) 53#define read2_io(a) (inw(hostdata->io_base+(a))) 54#define write1_io(b,a) (outb((b),hostdata->io_base+(a))) 55#define write2_io(w,a) (outw((w),hostdata->io_base+(a))) 56 57#ifdef __i386__ 58/* These inline assembly defines are derived from a patch 59 * sent to me by Bill Earnest. He's done a lot of very 60 * valuable thinking, testing, and coding during his effort 61 * to squeeze more speed out of this driver. I really think 62 * that we are doing IO at close to the maximum now with 63 * the fifo. (And yes, insw uses 'edi' while outsw uses 64 * 'esi'. Thanks Bill!) 65 */ 66 67#define FAST_READ2_IO() \ 68({ \ 69int __dummy_1,__dummy_2; \ 70 __asm__ __volatile__ ("\n \ 71 cld \n \ 72 orl %%ecx, %%ecx \n \ 73 jz 1f \n \ 74 rep \n \ 75 insw (%%dx),%%es:(%%edi) \n \ 761: " \ 77 : "=D" (sp) ,"=c" (__dummy_1) ,"=d" (__dummy_2) /* output */ \ 78 : "2" (f), "0" (sp), "1" (i) /* input */ \ 79 ); /* trashed */ \ 80}) 81 82#define FAST_WRITE2_IO() \ 83({ \ 84int __dummy_1,__dummy_2; \ 85 __asm__ __volatile__ ("\n \ 86 cld \n \ 87 orl %%ecx, %%ecx \n \ 88 jz 1f \n \ 89 rep \n \ 90 outsw %%ds:(%%esi),(%%dx) \n \ 911: " \ 92 : "=S" (sp) ,"=c" (__dummy_1) ,"=d" (__dummy_2)/* output */ \ 93 : "2" (f), "0" (sp), "1" (i) /* input */ \ 94 ); /* trashed */ \ 95}) 96#endif 97 98/* IN2000 io_port offsets */ 99#define IO_WD_ASR 0x00 /* R - 3393 auxstat reg */ 100#define ASR_INT 0x80 101#define ASR_LCI 0x40 102#define ASR_BSY 0x20 103#define ASR_CIP 0x10 104#define ASR_PE 0x02 105#define ASR_DBR 0x01 106#define IO_WD_ADDR 0x00 /* W - 3393 address reg */ 107#define IO_WD_DATA 0x01 /* R/W - rest of 3393 regs */ 108#define IO_FIFO 0x02 /* R/W - in2000 dual-port fifo (16 bits) */ 109#define IN2000_FIFO_SIZE 2048 /* fifo capacity in bytes */ 110#define IO_CARD_RESET 0x03 /* W - in2000 start master reset */ 111#define IO_FIFO_COUNT 0x04 /* R - in2000 fifo counter */ 112#define IO_FIFO_WRITE 0x05 /* W - clear fifo counter, start write */ 113#define IO_FIFO_READ 0x07 /* W - start fifo read */ 114#define IO_LED_OFF 0x08 /* W - turn off in2000 activity LED */ 115#define IO_SWITCHES 0x08 /* R - read in2000 dip switch */ 116#define SW_ADDR0 0x01 /* bit 0 = bit 0 of index to io addr */ 117#define SW_ADDR1 0x02 /* bit 1 = bit 1 of index io addr */ 118#define SW_DISINT 0x04 /* bit 2 true if ints disabled */ 119#define SW_INT0 0x08 /* bit 3 = bit 0 of index to interrupt */ 120#define SW_INT1 0x10 /* bit 4 = bit 1 of index to interrupt */ 121#define SW_INT_SHIFT 3 /* shift right this amount to right justify int bits */ 122#define SW_SYNC_DOS5 0x20 /* bit 5 used by Always BIOS */ 123#define SW_FLOPPY 0x40 /* bit 6 true if floppy enabled */ 124#define SW_BIT7 0x80 /* bit 7 hardwired true (ground) */ 125#define IO_LED_ON 0x09 /* W - turn on in2000 activity LED */ 126#define IO_HARDWARE 0x0a /* R - read in2000 hardware rev, stop reset */ 127#define IO_INTR_MASK 0x0c /* W - in2000 interrupt mask reg */ 128#define IMASK_WD 0x01 /* WD33c93 interrupt mask */ 129#define IMASK_FIFO 0x02 /* FIFO interrupt mask */ 130 131/* wd register names */ 132#define WD_OWN_ID 0x00 133#define WD_CONTROL 0x01 134#define WD_TIMEOUT_PERIOD 0x02 135#define WD_CDB_1 0x03 136#define WD_CDB_2 0x04 137#define WD_CDB_3 0x05 138#define WD_CDB_4 0x06 139#define WD_CDB_5 0x07 140#define WD_CDB_6 0x08 141#define WD_CDB_7 0x09 142#define WD_CDB_8 0x0a 143#define WD_CDB_9 0x0b 144#define WD_CDB_10 0x0c 145#define WD_CDB_11 0x0d 146#define WD_CDB_12 0x0e 147#define WD_TARGET_LUN 0x0f 148#define WD_COMMAND_PHASE 0x10 149#define WD_SYNCHRONOUS_TRANSFER 0x11 150#define WD_TRANSFER_COUNT_MSB 0x12 151#define WD_TRANSFER_COUNT 0x13 152#define WD_TRANSFER_COUNT_LSB 0x14 153#define WD_DESTINATION_ID 0x15 154#define WD_SOURCE_ID 0x16 155#define WD_SCSI_STATUS 0x17 156#define WD_COMMAND 0x18 157#define WD_DATA 0x19 158#define WD_QUEUE_TAG 0x1a 159#define WD_AUXILIARY_STATUS 0x1f 160 161/* WD commands */ 162#define WD_CMD_RESET 0x00 163#define WD_CMD_ABORT 0x01 164#define WD_CMD_ASSERT_ATN 0x02 165#define WD_CMD_NEGATE_ACK 0x03 166#define WD_CMD_DISCONNECT 0x04 167#define WD_CMD_RESELECT 0x05 168#define WD_CMD_SEL_ATN 0x06 169#define WD_CMD_SEL 0x07 170#define WD_CMD_SEL_ATN_XFER 0x08 171#define WD_CMD_SEL_XFER 0x09 172#define WD_CMD_RESEL_RECEIVE 0x0a 173#define WD_CMD_RESEL_SEND 0x0b 174#define WD_CMD_WAIT_SEL_RECEIVE 0x0c 175#define WD_CMD_TRANS_ADDR 0x18 176#define WD_CMD_TRANS_INFO 0x20 177#define WD_CMD_TRANSFER_PAD 0x21 178#define WD_CMD_SBT_MODE 0x80 179 180/* SCSI Bus Phases */ 181#define PHS_DATA_OUT 0x00 182#define PHS_DATA_IN 0x01 183#define PHS_COMMAND 0x02 184#define PHS_STATUS 0x03 185#define PHS_MESS_OUT 0x06 186#define PHS_MESS_IN 0x07 187 188/* Command Status Register definitions */ 189 190 /* reset state interrupts */ 191#define CSR_RESET 0x00 192#define CSR_RESET_AF 0x01 193 194 /* successful completion interrupts */ 195#define CSR_RESELECT 0x10 196#define CSR_SELECT 0x11 197#define CSR_SEL_XFER_DONE 0x16 198#define CSR_XFER_DONE 0x18 199 200 /* paused or aborted interrupts */ 201#define CSR_MSGIN 0x20 202#define CSR_SDP 0x21 203#define CSR_SEL_ABORT 0x22 204#define CSR_RESEL_ABORT 0x25 205#define CSR_RESEL_ABORT_AM 0x27 206#define CSR_ABORT 0x28 207 208 /* terminated interrupts */ 209#define CSR_INVALID 0x40 210#define CSR_UNEXP_DISC 0x41 211#define CSR_TIMEOUT 0x42 212#define CSR_PARITY 0x43 213#define CSR_PARITY_ATN 0x44 214#define CSR_BAD_STATUS 0x45 215#define CSR_UNEXP 0x48 216 217 /* service required interrupts */ 218#define CSR_RESEL 0x80 219#define CSR_RESEL_AM 0x81 220#define CSR_DISC 0x85 221#define CSR_SRV_REQ 0x88 222 223 /* Own ID/CDB Size register */ 224#define OWNID_EAF 0x08 225#define OWNID_EHP 0x10 226#define OWNID_RAF 0x20 227#define OWNID_FS_8 0x00 228#define OWNID_FS_12 0x40 229#define OWNID_FS_16 0x80 230 231 /* Control register */ 232#define CTRL_HSP 0x01 233#define CTRL_HA 0x02 234#define CTRL_IDI 0x04 235#define CTRL_EDI 0x08 236#define CTRL_HHP 0x10 237#define CTRL_POLLED 0x00 238#define CTRL_BURST 0x20 239#define CTRL_BUS 0x40 240#define CTRL_DMA 0x80 241 242 /* Timeout Period register */ 243#define TIMEOUT_PERIOD_VALUE 20 /* results in 200 ms. */ 244 245 /* Synchronous Transfer Register */ 246#define STR_FSS 0x80 247 248 /* Destination ID register */ 249#define DSTID_DPD 0x40 250#define DATA_OUT_DIR 0 251#define DATA_IN_DIR 1 252#define DSTID_SCC 0x80 253 254 /* Source ID register */ 255#define SRCID_MASK 0x07 256#define SRCID_SIV 0x08 257#define SRCID_DSP 0x20 258#define SRCID_ES 0x40 259#define SRCID_ER 0x80 260 261 262 263#define ILLEGAL_STATUS_BYTE 0xff 264 265 266#define DEFAULT_SX_PER 500 /* (ns) fairly safe */ 267#define DEFAULT_SX_OFF 0 /* aka async */ 268 269#define OPTIMUM_SX_PER 252 /* (ns) best we can do (mult-of-4) */ 270#define OPTIMUM_SX_OFF 12 /* size of in2000 fifo */ 271 272struct sx_period { 273 unsigned int period_ns; 274 uchar reg_value; 275 }; 276 277 278struct IN2000_hostdata { 279 struct Scsi_Host *next; 280 uchar chip; /* what kind of wd33c93 chip? */ 281 uchar microcode; /* microcode rev if 'B' */ 282 unsigned short io_base; /* IO port base */ 283 unsigned int dip_switch; /* dip switch settings */ 284 unsigned int hrev; /* hardware revision of card */ 285 volatile uchar busy[8]; /* index = target, bit = lun */ 286 volatile Scsi_Cmnd *input_Q; /* commands waiting to be started */ 287 volatile Scsi_Cmnd *selecting; /* trying to select this command */ 288 volatile Scsi_Cmnd *connected; /* currently connected command */ 289 volatile Scsi_Cmnd *disconnected_Q;/* commands waiting for reconnect */ 290 uchar state; /* what we are currently doing */ 291 uchar fifo; /* what the FIFO is up to */ 292 uchar level2; /* extent to which Level-2 commands are used */ 293 uchar disconnect; /* disconnect/reselect policy */ 294 unsigned int args; /* set from command-line argument */ 295 uchar incoming_msg[8]; /* filled during message_in phase */ 296 int incoming_ptr; /* mainly used with EXTENDED messages */ 297 uchar outgoing_msg[8]; /* send this during next message_out */ 298 int outgoing_len; /* length of outgoing message */ 299 unsigned int default_sx_per; /* default transfer period for SCSI bus */ 300 uchar sync_xfer[8]; /* sync_xfer reg settings per target */ 301 uchar sync_stat[8]; /* status of sync negotiation per target */ 302 uchar sync_off; /* bit mask: don't use sync with these targets */ 303#ifdef PROC_INTERFACE 304 uchar proc; /* bit mask: what's in proc output */ 305#ifdef PROC_STATISTICS 306 unsigned long cmd_cnt[8]; /* # of commands issued per target */ 307 unsigned long int_cnt; /* # of interrupts serviced */ 308 unsigned long disc_allowed_cnt[8]; /* # of disconnects allowed per target */ 309 unsigned long disc_done_cnt[8]; /* # of disconnects done per target*/ 310#endif 311#endif 312 }; 313 314 315/* defines for hostdata->chip */ 316 317#define C_WD33C93 0 318#define C_WD33C93A 1 319#define C_WD33C93B 2 320#define C_UNKNOWN_CHIP 100 321 322/* defines for hostdata->state */ 323 324#define S_UNCONNECTED 0 325#define S_SELECTING 1 326#define S_RUNNING_LEVEL2 2 327#define S_CONNECTED 3 328#define S_PRE_TMP_DISC 4 329#define S_PRE_CMP_DISC 5 330 331/* defines for hostdata->fifo */ 332 333#define FI_FIFO_UNUSED 0 334#define FI_FIFO_READING 1 335#define FI_FIFO_WRITING 2 336 337/* defines for hostdata->level2 */ 338/* NOTE: only the first 3 are trustworthy at this point - 339 * having trouble when more than 1 device is reading/writing 340 * at the same time... 341 */ 342 343#define L2_NONE 0 /* no combination commands - we get lots of ints */ 344#define L2_SELECT 1 /* start with SEL_ATN_XFER, but never resume it */ 345#define L2_BASIC 2 /* resume after STATUS ints & RDP messages */ 346#define L2_DATA 3 /* resume after DATA_IN/OUT ints */ 347#define L2_MOST 4 /* resume after anything except a RESELECT int */ 348#define L2_RESELECT 5 /* resume after everything, including RESELECT ints */ 349#define L2_ALL 6 /* always resume */ 350 351/* defines for hostdata->disconnect */ 352 353#define DIS_NEVER 0 354#define DIS_ADAPTIVE 1 355#define DIS_ALWAYS 2 356 357/* defines for hostdata->args */ 358 359#define DB_TEST 1<<0 360#define DB_FIFO 1<<1 361#define DB_QUEUE_COMMAND 1<<2 362#define DB_EXECUTE 1<<3 363#define DB_INTR 1<<4 364#define DB_TRANSFER 1<<5 365#define DB_MASK 0x3f 366 367#define A_NO_SCSI_RESET 1<<15 368 369 370/* defines for hostdata->sync_xfer[] */ 371 372#define SS_UNSET 0 373#define SS_FIRST 1 374#define SS_WAITING 2 375#define SS_SET 3 376 377/* defines for hostdata->proc */ 378 379#define PR_VERSION 1<<0 380#define PR_INFO 1<<1 381#define PR_STATISTICS 1<<2 382#define PR_CONNECTED 1<<3 383#define PR_INPUTQ 1<<4 384#define PR_DISCQ 1<<5 385#define PR_TEST 1<<6 386#define PR_STOP 1<<7 387 388 389#include <linux/version.h> 390 391# include <linux/init.h> 392# include <linux/spinlock.h> 393# define in2000__INITFUNC(function) __initfunc(function) 394# define in2000__INIT __init 395# define in2000__INITDATA __initdata 396# define CLISPIN_LOCK(flags) spin_lock_irqsave(&io_request_lock, flags) 397# define CLISPIN_UNLOCK(flags) spin_unlock_irqrestore(&io_request_lock, flags) 398 399int in2000_detect(Scsi_Host_Template *) in2000__INIT; 400int in2000_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); 401int in2000_abort(Scsi_Cmnd *); 402void in2000_setup(char *, int *) in2000__INIT; 403int in2000_proc_info(char *, char **, off_t, int, int, int); 404int in2000_biosparam(struct scsi_disk *, kdev_t, int *); 405int in2000_reset(Scsi_Cmnd *, unsigned int); 406 407 408#define IN2000_CAN_Q 16 409#define IN2000_SG SG_ALL 410#define IN2000_CPL 2 411#define IN2000_HOST_ID 7 412 413#define IN2000 { proc_name: "in2000", /* name of /proc/scsi directory entry */ \ 414 proc_info: in2000_proc_info, /* pointer to proc info function */ \ 415 name: "Always IN2000", /* device name */ \ 416 detect: in2000_detect, /* returns number of in2000's found */ \ 417 queuecommand: in2000_queuecommand, /* queue scsi command, don't wait */ \ 418 abort: in2000_abort, /* abort current command */ \ 419 reset: in2000_reset, /* reset scsi bus */ \ 420 bios_param: in2000_biosparam, /* figures out BIOS parameters for lilo, etc */ \ 421 can_queue: IN2000_CAN_Q, /* max commands we can queue up */ \ 422 this_id: IN2000_HOST_ID, /* host-adapter scsi id */ \ 423 sg_tablesize: IN2000_SG, /* scatter-gather table size */ \ 424 cmd_per_lun: IN2000_CPL, /* commands per lun */ \ 425 use_clustering: DISABLE_CLUSTERING, /* ENABLE_CLUSTERING may speed things up */ \ 426 use_new_eh_code: 0 /* new error code - not using it yet */ \ 427 } 428 429#endif /* IN2000_H */ 430