1/* Copyright(c) 2000, Compaq Computer Corporation 2 * Fibre Channel Host Bus Adapter 64-bit, 66MHz PCI 3 * Originally developed and tested on: 4 * (front): [chip] Tachyon TS HPFC-5166A/1.2 L2C1090 ... 5 * SP# P225CXCBFIEL6T, Rev XC 6 * SP# 161290-001, Rev XD 7 * (back): Board No. 010008-001 A/W Rev X5, FAB REV X5 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2, or (at your option) any 12 * later version. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * Written by Don Zimmerman 19*/ 20#ifndef CPQFCTSSTRUCTS_H 21#define CPQFCTSSTRUCTS_H 22 23#include <linux/timer.h> // timer declaration in our host data 24#include <linux/tqueue.h> // task queue sched 25#include <asm/atomic.h> 26#include "cpqfcTSioctl.h" 27 28#define DbgDelay(secs) { int wait_time; printk( " DbgDelay %ds ", secs); \ 29 for( wait_time=jiffies + (secs*HZ); \ 30 time_before(jiffies, wait_time) ;) ; } 31 32#define CPQFCTS_DRIVER_VER(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) 33// don't forget to also change MODULE_DESCRIPTION in cpqfcTSinit.c 34#define VER_MAJOR 2 35#define VER_MINOR 1 36#define VER_SUBMINOR 1 37 38// Macros for kernel (esp. SMP) tracing using a PCI analyzer 39// (e.g. x86). 40//#define PCI_KERNEL_TRACE 41#ifdef PCI_KERNEL_TRACE 42#define PCI_TRACE(x) inl( fcChip->Registers.IOBaseL +x); 43#define PCI_TRACEO(x,y) outl( x, (fcChip->Registers.IOBaseL +y)); 44#else 45 46#define PCI_TRACE(x) 47#define PCI_TRACEO(x,y) 48#endif 49 50 51//#define DEBUG_CMND 1 // debug output for Linux Scsi CDBs 52//#define DUMMYCMND_DBG 1 53 54//#define DEBUG_CPQFCTS 1 55//#undef DEBUG_CPQFCTS 56#ifdef DEBUG_CPQFCTS 57#define ENTER(x) printk("cpqfcts : entering %s()\n", x); 58#define LEAVE(x) printk("cpqfcts : leaving %s()\n", x); 59#define DEBUG(x) x 60#else 61#define ENTER(x) 62#define LEAVE(x) 63#define DEBUG(x) 64#endif /* DEBUG_CPQFCTS */ 65 66//#define DEBUG_CPQFCTS_PCI 1 67//#undef DEBUG_CPQFCTS_PCI 68#if DEBUG_CPQFCTS_PCI 69#define DEBUG_PCI(x) x 70#else 71#define DEBUG_PCI(x) 72#endif /* DEBUG_CPQFCTS_PCI */ 73 74#define STACHLITE66_TS12 "Compaq FibreChannel HBA Tachyon TS HPFC-5166A/1.2" 75#define STACHLITE66_TS13 "Compaq FibreChannel HBA Tachyon TS HPFC-5166A/1.3" 76#define STACHLITE_UNKNOWN "Compaq FibreChannel HBA Tachyon Chip/Board Ver??" 77#define SAGILENT_XL2_21 "Agilent FC HBA, Tachyon XL2 HPFC-5200B/2.1" 78 79// PDA is Peripheral Device Address, VSA is Volume Set Addressing 80// Linux SCSI parameters 81#define CPQFCTS_MAX_TARGET_ID 64 82 83// Note, changing CPQFCTS_MAX_LUN to less than 32 (e.g, 8) will result in 84// strange behavior if a box with more than, e.g. 8, is on the loop. 85#define CPQFCTS_MAX_LUN 32 // The RA-4x00 supports 32 (Linux SCSI supports 8) 86#define CPQFCTS_MAX_CHANNEL 0 // One FC port on cpqfcTS HBA 87 88#define CPQFCTS_CMD_PER_LUN 15 // power of 2 -1, must be >0 89#define CPQFCTS_REQ_QUEUE_LEN (TACH_SEST_LEN/2) // must be < TACH_SEST_LEN 90 91#define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s)) 92#ifndef DECLARE_MUTEX_LOCKED 93#define DECLARE_MUTEX_LOCKED(sem) struct semaphore sem = MUTEX_LOCKED 94#endif 95 96#define DEV_NAME "cpqfcTS" 97 98struct SupportedPCIcards 99{ 100 __u16 vendor_id; 101 __u16 device_id; 102}; 103 104// nn:nn denotes bit field 105 // TachyonHeader struct def. 106 // the fields shared with ODB 107 // need to have same value 108 109 110 111 112#ifndef BYTE 113//typedef UCHAR BYTE; 114typedef __u8 BYTE; 115#endif 116#ifndef UCHAR 117typedef __u8 UCHAR; 118#endif 119#ifndef LONG 120typedef __s32 LONG; 121#endif 122#ifndef ULONG 123typedef __u32 ULONG; 124#endif 125#ifndef PVOID 126typedef void * PVOID; 127#endif 128#ifndef USHORT 129typedef __u16 USHORT; 130#endif 131#ifndef BOOLEAN 132typedef __u8 BOOLEAN; 133#endif 134 135 136// macro for FC-PH reject codes 137// payload format for LS_RJT (FC payloads are big endian): 138// byte 0 1 2 3 (MSB) 139// DWORD 0 01 00 00 00 140// DWORD 1 resvd code expl. vendor 141 142#define LS_RJT_REASON( code, expl) (( code<<8) | (expl <<16)) 143 144 145#define TachLiteSTATUS 0x12 146 147// Fibre Channel EXCHANGE status codes for Tachyon chips/ driver software 148// 32-bit ERROR word defines 149#define INVALID_ARGS 0x1 150#define LNKDWN_OSLS 0x2 151#define LNKDWN_LASER 0x4 152#define OUTQUE_FULL 0x8 153#define DRIVERQ_FULL 0x10 154#define SEST_FULL 0x20 155#define BAD_ALPA 0x40 156#define OVERFLOW 0x80 // inbound CM 157#define COUNT_ERROR 0x100 // inbound CM 158#define LINKFAIL_RX 0x200 // inbound CM 159#define ABORTSEQ_NOTIFY 0x400 // outbound CM 160#define LINKFAIL_TX 0x800 // outbound CM 161#define HOSTPROG_ERR 0x1000 // outbound CM 162#define FRAME_TO 0x2000 // outbound CM 163#define INV_ENTRY 0x4000 // outbound CM 164#define SESTPROG_ERR 0x8000 // outbound CM 165#define OUTBOUND_TIMEOUT 0x10000L // timeout waiting for Tachyon outbound CM 166#define INITIATOR_ABORT 0x20000L // initiator exchange timeout or O/S ABORT 167#define MEMPOOL_FAIL 0x40000L // O/S memory pool allocation failed 168#define FC2_TIMEOUT 0x80000L // driver timeout for lost frames 169#define TARGET_ABORT 0x100000L // ABTS received from FC port 170#define EXCHANGE_QUEUED 0x200000L // e.g. Link State was LDn on fcStart 171#define PORTID_CHANGED 0x400000L // fc Port address changed 172#define DEVICE_REMOVED 0x800000L // fc Port address changed 173// Several error scenarios result in SEST Exchange frames 174// unexpectedly arriving in the SFQ 175#define SFQ_FRAME 0x1000000L // SFQ frames from open Exchange 176 177// Maximum number of Host Bus Adapters (HBA) / controllers supported 178// only important for mem allocation dimensions - increase as necessary 179 180#define MAX_ADAPTERS 8 181#define MAX_RX_PAYLOAD 1024 // hardware dependent max frame payload 182// Tach header struc defines 183#define SOFi3 0x7 184#define SOFf 0x8 185#define SOFn3 0xB 186#define EOFn 0x5 187#define EOFt 0x6 188 189// FCP R_CTL defines 190#define FCP_CMND 0x6 191#define FCP_XFER_RDY 0x5 192#define FCP_RSP 0x7 193#define FCP_RESPONSE 0x777 // (arbitrary #) 194#define NEED_FCP_RSP 0x77 // (arbitrary #) 195#define FCP_DATA 0x1 196 197#define RESET_TACH 0x100 // Reset Tachyon/TachLite 198#define SCSI_IWE 0x2000 // initiator write entry (for SEST) 199#define SCSI_IRE 0x3000 // initiator read entry (for SEST) 200#define SCSI_TRE 0x400 // target read entry (for SEST) 201#define SCSI_TWE 0x500 // target write entry (for SEST) 202#define TOGGLE_LASER 0x800 203#define LIP 0x900 204#define CLEAR_FCPORTS 99 // (arbitrary #) free mem for Logged in ports 205#define FMINIT 0x707 // (arbitrary) for Frame Manager Init command 206 207// BLS == Basic Link Service 208// ELS == Extended Link Service 209#define BLS_NOP 4 210#define BLS_ABTS 0x10 // FC-PH Basic Link Service Abort Sequence 211#define BLS_ABTS_ACC 0x100 // FC-PH Basic Link Service Abort Sequence Accept 212#define BLS_ABTS_RJT 0x101 // FC-PH Basic Link Service Abort Sequence Reject 213#define ELS_PLOGI 0x03 // FC-PH Port Login (arbitrary assign) 214#define ELS_SCR 0x70 // (arb assign) State Change Registration (Fabric) 215#define FCS_NSR 0x72 // (arb assign) Name Service Request (Fabric) 216#define ELS_FLOGI 0x44 // (arb assign) Fabric Login 217#define ELS_FDISC 0x41 // (arb assign) Fabric Discovery (Login) 218#define ELS_PDISC 0x50 // FC-PH2 Port Discovery 219#define ELS_ABTX 0x06 // FC-PH Abort Exchange 220#define ELS_LOGO 0x05 // FC-PH Port Logout 221#define ELS_PRLI 0x20 // FCP-SCSI Process Login 222#define ELS_PRLO 0x21 // FCP-SCSI Process Logout 223#define ELS_LOGO_ACC 0x07 // {FC-PH} Port Logout Accept 224#define ELS_PLOGI_ACC 0x08 // {FC-PH} Port Login Accept 225#define ELS_ACC 0x18 // {FC-PH} (generic) ACCept 226#define ELS_PRLI_ACC 0x22 // {FCP-SCSI} Process Login Accept 227#define ELS_RJT 0x1000000 228#define SCSI_REPORT_LUNS 0x0A0 229#define REPORT_LUNS 0xA0 // SCSI-3 command op-code 230#define FCP_TARGET_RESET 0x200 231 232#define ELS_LILP_FRAME 0x00000711 // 1st payload word of LILP frame 233 234#define SFQ_UNASSISTED_FCP 1 // ICM, DWord3, "Type" unassisted FCP 235#define SFQ_UNKNOWN 0x31 // (arbitrary) ICM, DWord3, "Type" unknown 236 237// these "LINK" bits refer to loop or non-loop 238#define LINKACTIVE 0x2 // fcLinkQ type - LINK UP Tachyon FM 'Lup' bit set 239#define LINKDOWN 0xf2 // fcLinkQ type - LINK DOWN Tachyon FM 'Ldn' bit set 240 241//#define VOLUME_SET_ADDRESSING 1 // "channel" or "bus" 1 242 243typedef struct // 32 bytes hdr ONLY (e.g. FCP_DATA buffer for SEST) 244{ 245 ULONG reserved; // dword 0 (don't use) 246 ULONG sof_eof; 247 ULONG d_id; // dword 2 - 31:24 R_CTL, 23:0 D_ID 248 ULONG s_id; // dword 3 - 31:24 CS_CTL, 23:0 S_ID 249 ULONG f_ctl; // dword 4 - 31:24 Type, 23:0 F_CTL 250 ULONG seq_cnt; // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT 251 ULONG ox_rx_id; // dword 6 - 31:16 OX_ID, 15:0 RX_ID 252 ULONG ro; // dword 7 - relative offset 253} TachFCHDR; 254 255 // NOTE!! the following struct MUST be 64 bytes. 256typedef struct // 32 bytes hdr + 32 bytes payload 257{ 258 ULONG reserved; // dword 0 (don't use - must clear to 0) 259 ULONG sof_eof; // dword 1 - 31:24 SOF:EOF, UAM,CLS, LCr, TFV, TimeStamp 260 ULONG d_id; // dword 2 - 31:24 R_CTL, 23:0 D_ID 261 ULONG s_id; // dword 3 - 31:24 CS_CTL, 23:0 S_ID 262 ULONG f_ctl; // dword 4 - 31:24 Type, 23:0 F_CTL 263 ULONG seq_cnt; // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT 264 ULONG ox_rx_id; // dword 6 - 31:16 OX_ID, 15:0 RX_ID 265 ULONG ro; // dword 7 - relative offset 266//--------- 267 __u32 pl[8]; // dwords 8-15 frame data payload 268} TachFCHDR_CMND; 269 270 271typedef struct // 32 bytes hdr + 120 bytes payload 272{ 273 ULONG reserved; // dword 0 (don't use - must clear to 0) 274 ULONG sof_eof; // dword 1 - 31:24 SOF:EOF, UAM,CLS, LCr, TFV, TimeStamp 275 ULONG d_id; // dword 2 - 31:24 R_CTL, 23:0 D_ID 276 ULONG s_id; // dword 3 - 31:24 CS_CTL, 23:0 S_ID 277 ULONG f_ctl; // dword 4 - 31:24 Type, 23:0 F_CTL 278 ULONG seq_cnt; // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT 279 ULONG ox_rx_id; // dword 6 - 31:16 OX_ID, 15:0 RX_ID 280 ULONG ro; // dword 7 - relative offset 281//--------- 282 __u32 pl[30]; // largest necessary payload (for LOGIN cmnds) 283} TachFCHDR_GCMND; 284 285typedef struct // 32 bytes hdr + 64 bytes payload 286{ 287 ULONG reserved; // dword 0 (don't use) 288 ULONG sof_eof; 289 ULONG d_id; // dword 2 - 31:24 R_CTL, 23:0 D_ID 290 ULONG s_id; // dword 3 - 31:24 CS_CTL, 23:0 S_ID 291 ULONG f_ctl; // dword 4 - 31:24 Type, 23:0 F_CTL 292 ULONG seq_cnt; // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT 293 ULONG ox_rx_id; // dword 6 - 31:16 OX_ID, 15:0 RX_ID 294 ULONG ro; // dword 7 - relative offset 295//--------- 296 __u32 pl[18]; // payload for FCP-RSP (response buffer) RA-4x00 is 72bytes 297} TachFCHDR_RSP; 298 299 300 301 302 303 304// Inbound Message Queue structures... 305typedef struct // each entry 8 words (32 bytes) 306{ 307 ULONG type; // IMQ completion message types 308 ULONG word[7]; // remainder of structure 309 // interpreted by IMQ type 310} TachyonIMQE; 311 312 313// Queues for TachLite not in original Tachyon 314// ERQ - Exchange Request Queue (for outbound commands) 315// SFQ - Single Frame Queue (for incoming frames) 316 317 // Define Tachyon Outbound Command Que 318 // (Since many Tachyon registers are Read 319 // only, maintain copies for debugging) 320 // most Tach ques need power-of-2 sizes, 321 // where registers are loaded with po2 -1 322#define TACH_SEST_LEN 512 // TachLite SEST 323 324#define ELS_EXCHANGES 64 // e.g. PLOGI, RSCN, ... 325// define the total number of outstanding (simultaneous) exchanges 326#define TACH_MAX_XID (TACH_SEST_LEN + ELS_EXCHANGES) // ELS exchanges 327 328#define ERQ_LEN 128 // power of 2, max 4096 329 330// Inbound Message Queue structures... 331#define IMQ_LEN 512 // minimum 4 entries [(power of 2) - 1] 332typedef struct // 8 words - 32 bytes 333{ 334 TachyonIMQE QEntry[IMQ_LEN]; 335 ULONG producerIndex; // IMQ Producer Index register 336 // @32 byte align 337 ULONG consumerIndex; // Consumer Index register (in Tachyon) 338 ULONG length; // Length register 339 ULONG base; 340} TachyonIMQ; // @ 32 * IMQ_LEN align 341 342 343 344typedef struct // inbound completion message 345{ 346 ULONG Type; 347 ULONG Index; 348 ULONG TransferLength; 349} TachyonInbCM; 350 351 352 353// arbitrary numeric tags for TL structures 354#define TL_FCHS 1 // TachLite Fibre Channel Header Structure 355#define TL_IWE 2 // initiator write entry (for SEST) 356#define TL_TWE 3 // target write entry (for SEST) 357#define TL_IRE 4 // initiator read entry (for SEST) 358#define TL_TRE 5 // target read entry (for SEST) 359#define TL_IRB 6 // I/O request block 360 361 // for INCOMING frames 362#define SFQ_LEN 32 // minimum 32 entries, max 4096 363 364typedef struct // Single Frame Que 365{ 366 TachFCHDR_CMND QEntry[SFQ_LEN]; // must be 64 bytes!! 367 ULONG producerIndex; // IMQ Producer Index register 368 // @32 byte align 369 ULONG consumerIndex; // Consumer Index register (in Tachyon) 370 ULONG length; // Length register 371 ULONG base; 372} TachLiteSFQ; 373 374 375typedef struct // I/O Request Block flags 376{ 377 UCHAR BRD : 1; 378 UCHAR : 1; // reserved 379 UCHAR SFA : 1; 380 UCHAR DNC : 1; 381 UCHAR DIN : 1; 382 UCHAR DCM : 1; 383 UCHAR CTS : 1; 384 UCHAR SBV : 1; // IRB entry valid - IRB'B' only 385} IRBflags; 386 387typedef struct // I/O Request Block 388{ // Request 'A' 389 ULONG Req_A_SFS_Len; // total frame len (hdr + payload), min 32 390 ULONG Req_A_SFS_Addr; // 32-bit pointer to FCHS struct (to be sent) 391 ULONG Req_A_SFS_D_ID; // 24-bit FC destination (i.e. 8 bit al_pa) 392 ULONG Req_A_Trans_ID; // X_ID (OX_ID or RX_ID) and/or Index in SEST 393 // Request 'B' 394 ULONG Req_B_SFS_Len; // total frame len (hdr + payload), min 32 395 ULONG Req_B_SFS_Addr; // 32-bit pointer to FCHS struct (to be sent) 396 ULONG Req_B_SFS_D_ID; // 24-bit FC destination (i.e. 8 bit al_pa) 397 ULONG Req_B_Trans_ID; // X_ID (OX_ID or RX_ID) and/or Index in SEST 398} TachLiteIRB; 399 400 401typedef struct // TachLite placeholder for IRBs 402{ // aligned @sizeof(ERQ) for TachLite 403 // MAX commands is sum of SEST len and ERQ 404 // we know that each SEST entry requires an 405 // IRB (ERQ) entry; in addition, we provide 406 // ERQ_LEN 407 TachLiteIRB QEntry[ERQ_LEN]; // Base register; entries 32 bytes ea. 408 ULONG consumerIndex; // Consumer Index register 409 ULONG producerIndex; // ERQ Producer Index register 410 ULONG length; // Length register 411 ULONG base; // copy of base ptr for debug 412 // struct is sized for largest expected cmnd (LOGIN) 413} TachLiteERQ; 414 415// for now, just 32 bit DMA, eventually 40something, with code changes 416#define CPQFCTS_DMA_MASK ((unsigned long) (0x00000000FFFFFFFF)) 417 418#define TL_MAX_SG_ELEM_LEN 0x7ffff // Max buffer length a single S/G entry 419 // may represent (a hardware limitation). The 420 // only reason to ever change this is if you 421 // want to exercise very-hard-to-reach code in 422 // cpqfcTSworker.c:build_SEST_sglist(). 423 424#define TL_DANGER_SGPAGES 7 // arbitrary high water mark for # of S/G pages 425 // we must exceed to elicit a warning indicative 426 // of EXTREMELY large data transfers or 427 // EXTREME memory fragmentation. 428 // (means we just used up 2048 S/G elements, 429 // Never seen this is real life, only in 430 // testing with tricked up driver.) 431 432#define TL_EXT_SG_PAGE_COUNT 256 // Number of Extended Scatter/Gather a/l PAIRS 433 // Tachyon register (IOBaseU 0x68) 434 // power-of-2 value ONLY! 4 min, 256 max 435 436 // byte len is #Pairs * 2 ULONG/Pair * 4 bytes/ULONG 437#define TL_EXT_SG_PAGE_BYTELEN (TL_EXT_SG_PAGE_COUNT *2 *4) 438 439 440 441// SEST entry types: IWE, IRE, TWE, TRE 442typedef struct 443{ 444 ULONG Hdr_Len; 445 ULONG Hdr_Addr; 446 ULONG RSP_Len; 447 ULONG RSP_Addr; 448 ULONG Buff_Off; 449#define USES_EXTENDED_SGLIST(this_sest, x_ID) \ 450 (!((this_sest)->u[ x_ID ].IWE.Buff_Off & 0x80000000)) 451 ULONG Link; 452 ULONG RX_ID; 453 ULONG Data_Len; 454 ULONG Exp_RO; 455 ULONG Exp_Byte_Cnt; 456 // --- extended/local Gather Len/Address pairs 457 ULONG GLen1; 458 ULONG GAddr1; 459 ULONG GLen2; 460 ULONG GAddr2; 461 ULONG GLen3; 462 ULONG GAddr3; 463} TachLiteIWE; 464 465 466typedef struct 467{ 468 ULONG Seq_Accum; 469 ULONG reserved; // must clear to 0 470 ULONG RSP_Len; 471 ULONG RSP_Addr; 472 ULONG Buff_Off; 473 ULONG Buff_Index; // ULONG 5 474 ULONG Exp_RO; 475 ULONG Byte_Count; 476 ULONG reserved_; // ULONG 8 477 ULONG Exp_Byte_Cnt; 478 // --- extended/local Scatter Len/Address pairs 479 ULONG SLen1; 480 ULONG SAddr1; 481 ULONG SLen2; 482 ULONG SAddr2; 483 ULONG SLen3; 484 ULONG SAddr3; 485} TachLiteIRE; 486 487 488typedef struct // Target Write Entry 489{ 490 ULONG Seq_Accum; // dword 0 491 ULONG reserved; // dword 1 must clear to 0 492 ULONG Remote_Node_ID; 493 ULONG reserved1; // dword 3 must clear to 0 494 ULONG Buff_Off; 495 ULONG Buff_Index; // ULONG 5 496 ULONG Exp_RO; 497 ULONG Byte_Count; 498 ULONG reserved_; // ULONG 8 499 ULONG Exp_Byte_Cnt; 500 // --- extended/local Scatter Len/Address pairs 501 ULONG SLen1; 502 ULONG SAddr1; 503 ULONG SLen2; 504 ULONG SAddr2; 505 ULONG SLen3; 506 ULONG SAddr3; 507} TachLiteTWE; 508 509typedef struct 510{ 511 ULONG Hdr_Len; 512 ULONG Hdr_Addr; 513 ULONG RSP_Len; // DWord 2 514 ULONG RSP_Addr; 515 ULONG Buff_Off; 516 ULONG Buff_Index; // DWord 5 517 ULONG reserved; 518 ULONG Data_Len; 519 ULONG reserved_; 520 ULONG reserved__; 521 // --- extended/local Gather Len/Address pairs 522 ULONG GLen1; // DWord A 523 ULONG GAddr1; 524 ULONG GLen2; 525 ULONG GAddr2; 526 ULONG GLen3; 527 ULONG GAddr3; 528} TachLiteTRE; 529 530typedef struct ext_sg_page_ptr_t *PSGPAGES; 531typedef struct ext_sg_page_ptr_t 532{ 533 unsigned char page[TL_EXT_SG_PAGE_BYTELEN * 2]; // 2x for alignment 534 dma_addr_t busaddr; // need the bus addresses and 535 unsigned int maplen; // lengths for later pci unmapping. 536 PSGPAGES next; 537} SGPAGES; // linked list of S/G pairs, by Exchange 538 539typedef struct // SCSI Exchange State Table 540{ 541 union // Entry can be IWE, IRE, TWE, TRE 542 { // 64 bytes per entry 543 TachLiteIWE IWE; 544 TachLiteIRE IRE; 545 TachLiteTWE TWE; 546 TachLiteTRE TRE; 547 } u[TACH_SEST_LEN]; 548 549 TachFCHDR DataHDR[TACH_SEST_LEN]; // for SEST FCP_DATA frame hdr (no pl) 550 TachFCHDR_RSP RspHDR[TACH_SEST_LEN]; // space for SEST FCP_RSP frame 551 PSGPAGES sgPages[TACH_SEST_LEN]; // head of linked list of Pool-allocations 552 ULONG length; // Length register 553 ULONG base; // copy of base ptr for debug 554} TachSEST; 555 556 557 558typedef struct // each register has it's own address 559 // and value (used for write-only regs) 560{ 561 void* address; 562 volatile ULONG value; 563} FCREGISTER; 564 565typedef struct // Host copy - TachLite Registers 566{ 567 ULONG IOBaseL, IOBaseU; // I/O port lower and upper TL register addresses 568 ULONG MemBase; // memory mapped register addresses 569 void* ReMapMemBase; // O/S VM reference for MemBase 570 ULONG wwn_hi; // WWN is set once at startup 571 ULONG wwn_lo; 572 ULONG my_al_pa; // al_pa received after LIP() 573 ULONG ROMCTR; // flags for on-board RAM/ROM 574 ULONG RAMBase; // on-board RAM (i.e. some Tachlites) 575 ULONG SROMBase; // on-board EEPROM (some Tachlites) 576 ULONG PCIMCTR; // PCI Master Control Reg (has bus width) 577 578 FCREGISTER INTEN; // copy of interrupt enable mask 579 FCREGISTER INTPEND; // interrupt pending 580 FCREGISTER INTSTAT; // interrupt status 581 FCREGISTER SFQconsumerIndex; 582 FCREGISTER ERQproducerIndex; 583 FCREGISTER TYconfig; // TachYon (chip level) 584 FCREGISTER TYcontrol; 585 FCREGISTER TYstatus; 586 FCREGISTER FMconfig; // Frame Manager (FC loop level) 587 FCREGISTER FMcontrol; 588 FCREGISTER FMstatus; 589 FCREGISTER FMLinkStatus1; 590 FCREGISTER FMLinkStatus2; 591 FCREGISTER FMBB_CreditZero; 592 FCREGISTER status; 593 FCREGISTER ed_tov; // error detect time-out value 594 FCREGISTER rcv_al_pa; // received arb. loop physical address 595 FCREGISTER primitive; // e.g. LIP(), OPN(), ... 596} TL_REGISTERS; 597 598 599 600typedef struct 601{ 602 ULONG ok; 603 ULONG invalidArgs; 604 ULONG linkDown; 605 ULONG linkUp; 606 ULONG outQueFull; 607 ULONG SESTFull; 608 ULONG hpe; // host programming err (from Tach) 609 ULONG FC4aborted; // aborts from Application or upper driver layer 610 ULONG FC2aborted; // aborts from our driver's timeouts 611 ULONG timeouts; // our driver timeout (on individual exchanges) 612 ULONG logouts; // explicit - sent LOGO; implicit - device removed 613 ULONG retries; 614 ULONG linkFailTX; 615 ULONG linkFailRX; 616 ULONG CntErrors; // byte count expected != count received (typ. SEST) 617 ULONG e_stores; // elastic store errs 618 ULONG resets; // hard or soft controller resets 619 ULONG FMinits; // TACH Frame Manager Init (e.g. LIPs) 620 ULONG lnkQueFull; // too many LOGIN, loop commands 621 ULONG ScsiQueFull; // too many FCP-SCSI inbound frames 622 ULONG LossofSignal; // FM link status 1 regs 623 ULONG BadRXChar; // FM link status 1 regs 624 ULONG LossofSync; // FM link status 1 regs 625 ULONG Rx_EOFa; // FM link status 2 regs (received EOFa) 626 ULONG Dis_Frm; // FM link status 2 regs (discarded frames) 627 ULONG Bad_CRC; // FM link status 2 regs 628 ULONG BB0_Timer; // FM BB_Credit Zero Timer Reg 629 ULONG loopBreaks; // infinite loop exits 630 ULONG lastBB0timer; // static accum. buffer needed by Tachlite 631} FCSTATS; 632 633 634typedef struct // Config Options 635{ // LS Bit first 636 USHORT : 1; // bit0: 637 USHORT flogi : 1; // bit1: We sent FLOGI - wait for Fabric logins 638 USHORT fabric: 1; // bit2: Tachyon detected Fabric (FM stat LG) 639 USHORT LILPin: 1; // bit3: We can use an FC-AL LILP frame 640 USHORT target: 1; // bit4: this Port has SCSI target capability 641 USHORT initiator: 1; // bit5: this Port has SCSI initiator capability 642 USHORT extLoopback: 1; // bit6: loopback at GBIC 643 USHORT intLoopback: 1; // bit7: loopback in HP silicon 644 USHORT : 1; // bit8: 645 USHORT : 1; // bit9: 646 USHORT : 1; // bit10: 647 USHORT : 1; // bit11: 648 USHORT : 1; // bit12: 649 USHORT : 1; // bit13: 650 USHORT : 1; // bit14: 651 USHORT : 1; // bit15: 652} FC_OPTIONS; 653 654 655 656typedef struct dyn_mem_pair 657{ 658 void *BaseAllocated; // address as allocated from O/S; 659 unsigned long AlignedAddress; // aligned address (used by Tachyon DMA) 660 dma_addr_t dma_handle; 661 size_t size; 662} ALIGNED_MEM; 663 664 665 666 667// these structs contain only CRUCIAL (stuff we actually use) parameters 668// from FC-PH(n) logins. (Don't save entire LOGIN payload to save mem.) 669 670// Implicit logout happens when the loop goes down - we require PDISC 671// to restore. Explicit logout is when WE decide never to talk to someone, 672// or when a target refuses to talk to us, i.e. sends us a LOGO frame or 673// LS_RJT reject in response to our PLOGI request. 674 675#define IMPLICIT_LOGOUT 1 676#define EXPLICIT_LOGOUT 2 677 678typedef struct 679{ 680 UCHAR channel; // SCSI "bus" 681 UCHAR target; 682 UCHAR InqDeviceType; // byte 0 from SCSI Inquiry response 683 UCHAR VolumeSetAddressing; // FCP-SCSI LUN coding (40h for VSA) 684 UCHAR LunMasking; // True if selective presentation supported 685 UCHAR lun[CPQFCTS_MAX_LUN]; 686} SCSI_NEXUS; 687 688 689typedef struct 690{ 691 union 692 { 693 UCHAR ucWWN[8]; // a FC 64-bit World Wide Name/ PortID of target 694 // addressing of single target on single loop... 695 u64 liWWN; 696 } u; 697 698 ULONG port_id; // a FC 24-bit address of port (lower 8 bits = al_pa) 699 700 Scsi_Cmnd ScsiCmnd; // command buffer for Report Luns 701#define REPORT_LUNS_PL 256 702 UCHAR ReportLunsPayload[REPORT_LUNS_PL]; 703 704 SCSI_NEXUS ScsiNexus; // LUNs per FC device 705 706 ULONG LOGO_counter; // might try several times before logging out for good 707 ULONG LOGO_timer; // after LIP, ports expecting PDISC must time-out and 708 // LOGOut if successful PDISC not completed in 2 secs 709 710 ULONG concurrent_seq; // must be 1 or greater 711 ULONG rx_data_size; // e.g. 128, 256, 1024, 2048 per FC-PH spec 712 ULONG BB_credit; 713 ULONG EE_credit; 714 715 ULONG fcp_info; // from PRLI (i.e. INITIATOR/ TARGET flags) 716 // flags for login process 717 BOOLEAN Originator; // Login sequence Originated (if false, we 718 // responded to another port's login sequence) 719 BOOLEAN plogi; // PLOGI frame ACCepted (originated or responded) 720 BOOLEAN pdisc; // PDISC frame was ORIGINATED (self-login logic) 721 BOOLEAN prli; // PRLI frame ACCepted (originated or responded) 722 BOOLEAN flogi; // FLOGI frame ACCepted (originated or responded) 723 BOOLEAN logo; // port permanently logged out (invalid login param) 724 BOOLEAN flogiReq; // Fabric login required (set in LIP process) 725 UCHAR highest_ver; 726 UCHAR lowest_ver; 727 728 729 // when the "target" (actually FC Port) is waiting for login 730 // (e.g. after Link reset), set the device_blocked bit; 731 // after Port completes login, un-block target. 732 UCHAR device_blocked; // see Scsi_Device struct 733 734 // define singly-linked list of logged-in ports 735 // once a port_id is identified, it is remembered, 736 // even if the port is removed indefinitely 737 PVOID pNextPort; // actually, type PFC_LOGGEDIN_PORT; void for Compiler 738 739} FC_LOGGEDIN_PORT, *PFC_LOGGEDIN_PORT; 740 741 742 743// This serves as the ESB (Exchange Status Block), 744// and has timeout counter; used for ABORTs 745typedef struct 746{ // FC-1 X_IDs 747 ULONG type; // ELS_PLOGI, SCSI_IWE, ... (0 if free) 748 PFC_LOGGEDIN_PORT pLoggedInPort; // FC device on other end of Exchange 749 Scsi_Cmnd *Cmnd; // Linux SCSI command packet includes S/G list 750 ULONG timeOut; // units of ??, DEC by driver, Abort when 0 751 ULONG reTries; // need one or more retries? 752 ULONG status; // flags indicating errors (0 if none) 753 TachLiteIRB IRB; // I/O Request Block, gets copied to ERQ 754 TachFCHDR_GCMND fchs; // location of IRB's Req_A_SFS_Addr 755} FC_EXCHANGE, *PFC_EXCHANGE; 756 757// Unfortunately, Linux limits our kmalloc() allocations to 128k. 758// Because of this and the fact that our ScsiRegister allocation 759// is also constrained, we move this large structure out for 760// allocation after Scsi Register. 761// (In other words, this cumbersome indirection is necessary 762// because of kernel memory allocation constraints!) 763 764typedef struct // we will allocate this dynamically 765{ 766 FC_EXCHANGE fcExchange[ TACH_MAX_XID ]; 767} FC_EXCHANGES; 768 769 770 771 772 773 774 775 776 777 778 779typedef struct 780{ 781 char Name[64]; // name of controller ("HP Tachlite TL Rev2.0, 33MHz, 64bit bus") 782 //PVOID pAdapterDevExt; // back pointer to device object/extension 783 ULONG ChipType; // local numeric key for Tachyon Type / Rev. 784 ULONG status; // our Driver - logical status 785 786 TL_REGISTERS Registers; // reg addresses & host memory copies 787 // FC-4 mapping of 'transaction' to X_IDs 788 UCHAR LILPmap[32*4]; // Loop Position Map of ALPAs (late FC-AL only) 789 FC_OPTIONS Options; // e.g. Target, Initiator, loopback... 790 UCHAR highest_FCPH_ver; // FC-PH version limits 791 UCHAR lowest_FCPH_ver; // FC-PH version limits 792 793 FC_EXCHANGES *Exchanges; 794 ULONG fcLsExchangeLRU; // Least Recently Used counter (Link Service) 795 ULONG fcSestExchangeLRU; // Least Recently Used counter (FCP-SCSI) 796 FC_LOGGEDIN_PORT fcPorts; // linked list of every FC port ever seen 797 FCSTATS fcStats; // FC comm err counters 798 799 // Host memory QUEUE pointers 800 TachLiteERQ *ERQ; // Exchange Request Que 801 TachyonIMQ *IMQ; // Inbound Message Que 802 TachLiteSFQ *SFQ; // Single Frame Queue 803 TachSEST *SEST; // SCSI Exchange State Table 804 805 dma_addr_t exch_dma_handle; 806 807 // these function pointers are for "generic" functions, which are 808 // replaced with Host Bus Adapter types at 809 // runtime. 810 int (*CreateTachyonQues)( void* , int); 811 int (*DestroyTachyonQues)( void* , int); 812 int (*LaserControl)(void*, int ); // e.g. On/Off 813 int (*ResetTachyon)(void*, int ); 814 void (*FreezeTachyon)(void*, int ); 815 void (*UnFreezeTachyon)(void*, int ); 816 int (*InitializeTachyon)(void*, int, int ); 817 int (*InitializeFrameManager)(void*, int ); 818 int (*ProcessIMQEntry)(void*); 819 int (*ReadWriteWWN)(void*, int ReadWrite); 820 int (*ReadWriteNVRAM)(void*, void*, int ReadWrite); 821 822} TACHYON, *PTACHYON; 823 824 825void cpqfcTSClearLinkStatusCounters(TACHYON * fcChip); 826 827int CpqTsCreateTachLiteQues( void* pHBA, int opcode); 828int CpqTsDestroyTachLiteQues( void* , int); 829int CpqTsInitializeTachLite( void *pHBA, int opcode1, int opcode2); 830 831int CpqTsProcessIMQEntry(void* pHBA); 832int CpqTsResetTachLite(void *pHBA, int type); 833void CpqTsFreezeTachlite(void *pHBA, int type); 834void CpqTsUnFreezeTachlite(void *pHBA, int type); 835int CpqTsInitializeFrameManager(void *pHBA, int); 836int CpqTsLaserControl( void* addrBase, int opcode ); 837int CpqTsReadWriteWWN(void*, int ReadWrite); 838int CpqTsReadWriteNVRAM(void*, void* data, int ReadWrite); 839 840void cpqfcTS_WorkTask( struct Scsi_Host *HostAdapter); 841void cpqfcTSWorkerThread( void *host); 842 843int cpqfcTS_GetNVRAM_data( UCHAR *wwnbuf, UCHAR *buf ); 844ULONG cpqfcTS_ReadNVRAM( void* GPIOin, void* GPIOout , USHORT count, 845 UCHAR *buf ); 846 847BOOLEAN tl_write_i2c_nvram( void* GPIOin, void* GPIOout, 848 USHORT startOffset, // e.g. 0x2f for WWN start 849 USHORT count, 850 UCHAR *buf ); 851 852 853// define misc functions 854int cpqfcTSGetLPSM( PTACHYON fcChip, char cErrorString[]); 855int cpqfcTSDecodeGBICtype( PTACHYON fcChip, char cErrorString[]); 856void* fcMemManager( struct pci_dev *pdev, 857 ALIGNED_MEM *dyn_mem_pair, ULONG n_alloc, ULONG ab, 858 ULONG ulAlignedAddress, dma_addr_t *dma_handle); 859 860void BigEndianSwap( UCHAR *source, UCHAR *dest, USHORT cnt); 861 862//ULONG virt_to_phys( PVOID virtaddr ); 863 864 865// Linux interrupt handler 866void cpqfcTS_intr_handler( int irq,void *dev_id,struct pt_regs *regs); 867void cpqfcTSheartbeat( unsigned long ptr ); 868 869 870 871// The biggest Q element we deal with is Aborts - we 872// need 4 bytes for x_ID, and a Scsi_Cmnd (~284 bytes) 873//#define LINKQ_ITEM_SIZE ((4+sizeof(Scsi_Cmnd)+3)/4) 874#define LINKQ_ITEM_SIZE (3*16) 875typedef struct 876{ 877 ULONG Type; // e.g. LINKUP, SFQENTRY, PDISC, BLS_ABTS, ... 878 ULONG ulBuff[ LINKQ_ITEM_SIZE ]; 879} LINKQ_ITEM; 880 881#define FC_LINKQ_DEPTH TACH_MAX_XID 882typedef struct 883{ 884 ULONG producer; 885 ULONG consumer; // when producer equals consumer, Q empty 886 887 LINKQ_ITEM Qitem[ FC_LINKQ_DEPTH ]; 888 889} FC_LINK_QUE, *PFC_LINK_QUE; 890 891 892 // DPC routines post to here on Inbound SCSI frames 893 // User thread processes 894#define FC_SCSIQ_DEPTH 32 895 896typedef struct 897{ 898 int Type; // e.g. SCSI 899 ULONG ulBuff[ 3*16 ]; 900} SCSIQ_ITEM; 901 902typedef struct 903{ 904 ULONG producer; 905 ULONG consumer; // when producer equals consumer, Q empty 906 907 SCSIQ_ITEM Qitem[ FC_SCSIQ_DEPTH ]; 908 909} FC_SCSI_QUE, *PFC_SCSI_QUE; 910 911 912 913 914 915#define DYNAMIC_ALLOCATIONS 4 // Tachyon aligned allocations: ERQ,IMQ,SFQ,SEST 916 917// Linux space allocated per HBA (chip state, etc.) 918typedef struct 919{ 920 struct Scsi_Host *HostAdapter; // back pointer to Linux Scsi struct 921 922 TACHYON fcChip; // All Tachyon registers, Queues, functions 923 ALIGNED_MEM dynamic_mem[DYNAMIC_ALLOCATIONS]; 924 925 struct pci_dev *PciDev; 926 dma_addr_t fcLQ_dma_handle; 927 928 Scsi_Cmnd *LinkDnCmnd[CPQFCTS_REQ_QUEUE_LEN]; // collects Cmnds during LDn 929 // (for Acceptable targets) 930 Scsi_Cmnd *BoardLockCmnd[CPQFCTS_REQ_QUEUE_LEN]; // SEST was full 931 932 Scsi_Cmnd *BadTargetCmnd[CPQFCTS_MAX_TARGET_ID]; // missing targets 933 934 u_char HBAnum; // 0-based host number 935 936 937 struct timer_list cpqfcTStimer; // FC utility timer for implicit 938 // logouts, FC protocol timeouts, etc. 939 int fcStatsTime; // Statistics delta reporting time 940 941 struct task_struct *worker_thread; // our kernel thread 942 int PortDiscDone; // set by SendLogins(), cleared by LDn 943 944 struct semaphore *TachFrozen; 945 struct semaphore *TYOBcomplete; // handshake for Tach outbound frames 946 struct semaphore *fcQueReady; // FibreChannel work for our kernel thread 947 struct semaphore *notify_wt; // synchronizes kernel thread kill 948 struct semaphore *BoardLock; 949 950 PFC_LINK_QUE fcLQ; // the WorkerThread operates on this 951 952 spinlock_t hba_spinlock; // held/released by WorkerThread 953 954} CPQFCHBA; 955 956#define CPQ_SPINLOCK_HBA( x ) spin_lock(&x->hba_spinlock); 957#define CPQ_SPINUNLOCK_HBA(x) spin_unlock(&x->hba_spinlock); 958 959 960 961void cpqfcTSImplicitLogout( CPQFCHBA* cpqfcHBAdata, 962 PFC_LOGGEDIN_PORT pFcPort); 963 964 965void cpqfcTSTerminateExchange( CPQFCHBA*, SCSI_NEXUS *target, int ); 966 967PFC_LOGGEDIN_PORT fcPortLoggedIn( 968 CPQFCHBA *cpqfcHBAdata, 969 TachFCHDR_GCMND* fchs, 970 BOOLEAN, 971 BOOLEAN); 972void fcProcessLoggedIn( 973 CPQFCHBA *cpqfcHBAdata, TachFCHDR_GCMND* fchs); 974 975 976ULONG cpqfcTSBuildExchange( 977 CPQFCHBA *cpqfcHBAdata, 978 ULONG type, // e.g. PLOGI 979 TachFCHDR_GCMND* InFCHS, // incoming FCHS 980 void *Data, // the CDB, scatter/gather, etc. 981 LONG *ExchangeID ); // allocated exchange ID 982 983ULONG cpqfcTSStartExchange( 984 CPQFCHBA *cpqfcHBAdata, 985 LONG ExchangeID ); 986 987void cpqfcTSCompleteExchange( 988 struct pci_dev *pcidev, 989 PTACHYON fcChip, 990 ULONG exchange_ID); 991 992 993PFC_LOGGEDIN_PORT fcFindLoggedInPort( 994 PTACHYON fcChip, 995 Scsi_Cmnd *Cmnd, // (We want the channel/target/lun Nexus from Cmnd) 996 ULONG port_id, // search linked list for al_pa, or 997 UCHAR wwn[8], // search linked list for WWN, or... 998 PFC_LOGGEDIN_PORT *pLastLoggedInPort 999); 1000 1001void cpqfcTSPutLinkQue( 1002 CPQFCHBA *cpqfcHBAdata, 1003 int Type, 1004 void *QueContent); 1005 1006void fcPutScsiQue( 1007 CPQFCHBA *cpqfcHBAdata, 1008 int Type, 1009 void *QueContent); 1010 1011void fcLinkQReset( 1012 CPQFCHBA *); 1013void fcScsiQReset( 1014 CPQFCHBA *); 1015void fcSestReset( 1016 CPQFCHBA *); 1017 1018void cpqfc_pci_unmap(struct pci_dev *pcidev, 1019 Scsi_Cmnd *cmd, 1020 PTACHYON fcChip, 1021 ULONG x_ID); 1022 1023extern const UCHAR valid_al_pa[]; 1024extern const int number_of_al_pa; 1025 1026#define FCP_RESID_UNDER 0x80000 1027#define FCP_RESID_OVER 0x40000 1028#define FCP_SNS_LEN_VALID 0x20000 1029#define FCP_RSP_LEN_VALID 0x10000 1030 1031// RSP_CODE definitions (dpANS Fibre Channel Protocol for SCSI, pg 34) 1032#define FCP_DATA_LEN_NOT_BURST_LEN 0x1000000 1033#define FCP_CMND_FIELD_INVALID 0x2000000 1034#define FCP_DATA_RO_NOT_XRDY_RO 0x3000000 1035#define FCP_TASKFUNCTION_NS 0x4000000 1036#define FCP_TASKFUNCTION_FAIL 0x5000000 1037 1038// FCP-SCSI response status struct 1039typedef struct // see "TachFCHDR_RSP" definition - 64 bytes 1040{ 1041 __u32 reserved; 1042 __u32 reserved1; 1043 __u32 fcp_status; // field validity and SCSI status 1044 __u32 fcp_resid; 1045 __u32 fcp_sns_len; // length of FCP_SNS_INFO field 1046 __u32 fcp_rsp_len; // length of FCP_RSP_INFO field (expect 8) 1047 __u32 fcp_rsp_info; // 4 bytes of FCP protocol response information 1048 __u32 fcp_rsp_info2; // (4 more bytes, since most implementations use 8) 1049 __u8 fcp_sns_info[36]; // bytes for SCSI sense (ASC, ASCQ) 1050 1051} FCP_STATUS_RESPONSE, *PFCP_STATUS_RESPONSE; 1052 1053 1054// Fabric State Change Registration 1055typedef struct scrpl 1056{ 1057 __u32 command; 1058 __u32 function; 1059} SCR_PL; 1060 1061// Fabric Name Service Request 1062typedef struct nsrpl 1063{ 1064 __u32 CT_Rev; // (& IN_ID) WORD 0 1065 __u32 FCS_Type; // WORD 1 1066 __u32 Command_code; // WORD 2 1067 __u32 reason_code; // WORD 3 1068 __u32 FCP; // WORD 4 (lower byte) 1069 1070} NSR_PL; 1071 1072 1073 1074// "FC.H" 1075#define MAX_RX_SIZE 0x800 // Max Receive Buffer Size is 2048 1076#define MIN_RX_SIZE 0x100 // Min Size is 256, per FC-PLDA Spec 1077#define MAX_TARGET_RXIDS SEST_DEPTH 1078#define TARGET_RX_SIZE SEST_BUFFER_LENGTH 1079 1080#define CLASS_1 0x01 1081#define CLASS_2 0x02 1082#define CLASS_3 0x03 1083 1084#define FC_PH42 0x08 1085#define FC_PH43 0x09 1086#define FC_PH3 0x20 1087 1088#define RR_TOV 2 // Minimum Time for target to wait for 1089 // PDISC after a LIP. 1090#define E_D_TOV 2 // Minimum Time to wait for Sequence 1091 // Completion. 1092#define R_A_TOV 0 // Minimum Time for Target to wait 1093 // before reclaiming resources. 1094// 1095// R_CTL Field 1096// 1097// Routing Bits (31-28) 1098// 1099#define FC4_DEVICE_DATA 0x00000000 1100#define EXT_LINK_DATA 0x20000000 1101#define FC4_LINK_DATA 0x30000000 1102#define VIDEO_DATA 0x40000000 1103#define BASIC_LINK_DATA 0x80000000 1104#define LINK_CONTROL 0xC0000000 1105#define ROUTING_MASK 0xF0000000 1106 1107// 1108// Information Bits (27-24) 1109// 1110#define UNCAT_INFORMATION 0x00000000 1111#define SOLICITED_DATA 0x01000000 1112#define UNSOLICITED_CONTROL 0x02000000 1113#define SOLICITED_CONTROL 0x03000000 1114#define UNSOLICITED_DATA 0x04000000 1115#define DATA_DESCRIPTOR 0x05000000 1116#define UNSOLICITED_COMMAND 0x06000000 1117#define COMMAND_STATUS 0x07000000 1118#define INFO_MASK 0x0F000000 1119// 1120// (Link Control Codes) 1121// 1122#define ACK_1 0x00000000 1123#define ACK_0_OR_N 0x01000000 1124#define P_RJT 0x02000000 1125#define F_RJT 0x03000000 1126#define P_BSY 0x04000000 1127#define FABRIC_BUSY_TO_DF 0x05000000 // Fabric Busy to Data Frame 1128#define FABRIC_BUSY_TO_LC 0x06000000 // Fabric Busy to Link Ctl Frame 1129#define LINK_CREDIT_RESET 0x07000000 1130// 1131// (Link Service Command Codes) 1132// 1133//#define LS_RJT 0x01000000 // LS Reject 1134 1135#define LS_ACC 0x02000000 // LS Accept 1136#define LS_PLOGI 0x03000000 // N_PORT Login 1137#define LS_FLOGI 0x04000000 // F_PORT Login 1138#define LS_LOGO 0x05000000 // Logout 1139#define LS_ABTX 0x06000000 // Abort Exchange 1140#define LS_RCS 0x07000000 // Read Connection Status 1141#define LS_RES 0x08000000 // Read Exchange Status 1142#define LS_RSS 0x09000000 // Read Sequence Status 1143#define LS_RSI 0x0A000000 // Request Seq Initiative 1144#define LS_ESTS 0x0B000000 // Establish Steaming 1145#define LS_ESTC 0x0C000000 // Estimate Credit 1146#define LS_ADVC 0x0D000000 // Advice Credit 1147#define LS_RTV 0x0E000000 // Read Timeout Value 1148#define LS_RLS 0x0F000000 // Read Link Status 1149#define LS_ECHO 0x10000000 // Echo 1150#define LS_TEST 0x11000000 // Test 1151#define LS_RRQ 0x12000000 // Reinstate Rec. Qual. 1152#define LS_PRLI 0x20000000 // Process Login 1153#define LS_PRLO 0x21000000 // Process Logout 1154#define LS_TPRLO 0x24000000 // 3rd Party Process Logout 1155#define LS_PDISC 0x50000000 // Process Discovery 1156#define LS_FDISC 0x51000000 // Fabric Discovery 1157#define LS_ADISC 0x52000000 // Discover Address 1158#define LS_RNC 0x53000000 // Report Node Capability 1159#define LS_SCR 0x62000000 // State Change Registration 1160#define LS_MASK 0xFF000000 1161 1162// 1163// TYPE Bit Masks 1164// 1165#define BASIC_LINK_SERVICE 0x00000000 1166#define EXT_LINK_SERVICE 0x01000000 1167 1168#define LLC 0x04000000 1169#define LLC_SNAP 0x05000000 1170#define SCSI_FCP 0x08000000 1171#define SCSI_GPP 0x09000000 1172#define IPI3_MASTER 0x11000000 1173#define IPI3_SLAVE 0x12000000 1174#define IPI3_PEER 0x13000000 1175#define CP_IPI3_MASTER 0x15000000 1176#define CP_IPI3_SLAVE 0x16000000 1177#define CP_IPI3_PEER 0x17000000 1178#define SBCCS_CHANNEL 0x19000000 1179#define SBCCS_CONTROL 0x1A000000 1180#define FIBRE_SERVICES 0x20000000 1181#define FC_FG 0x21000000 1182#define FC_XS 0x22000000 1183#define FC_AL 0x23000000 1184#define SNMP 0x24000000 1185#define HIPPI_FP 0x40000000 1186#define TYPE_MASK 0xFF000000 1187 1188typedef struct { 1189 UCHAR seq_id_valid; 1190 UCHAR seq_id; 1191 USHORT reserved; // 2 bytes reserved 1192 ULONG ox_rx_id; 1193 USHORT low_seq_cnt; 1194 USHORT high_seq_cnt; 1195} BA_ACC_PAYLOAD; 1196 1197typedef struct { 1198 UCHAR reserved; 1199 UCHAR reason_code; 1200 UCHAR reason_explain; 1201 UCHAR vendor_unique; 1202} BA_RJT_PAYLOAD; 1203 1204 1205typedef struct { 1206 ULONG command_code; 1207 ULONG sid; 1208 USHORT ox_id; 1209 USHORT rx_id; 1210} RRQ_MESSAGE; 1211 1212typedef struct { 1213 ULONG command_code; 1214 UCHAR vendor; 1215 UCHAR explain; 1216 UCHAR reason; 1217 UCHAR reserved; 1218} REJECT_MESSAGE; 1219 1220 1221#define N_OR_F_PORT 0x1000 1222#define RANDOM_RELATIVE_OFFSET 0x4000 1223#define CONTINUOSLY_INCREASING 0x8000 1224 1225#define CLASS_VALID 0x8000 1226#define INTERMIX_MODE 0x4000 1227#define TRANSPARENT_STACKED 0x2000 1228#define LOCKDOWN_STACKED 0x1000 1229#define SEQ_DELIVERY 0x800 1230 1231#define XID_NOT_SUPPORTED 0x00 1232#define XID_SUPPORTED 0x4000 1233#define XID_REQUIRED 0xC000 1234 1235#define ASSOCIATOR_NOT_SUPPORTED 0x00 1236#define ASSOCIATOR_SUPPORTED 0x1000 1237#define ASSOCIATOR_REQUIRED 0x3000 1238 1239#define INIT_ACK0_SUPPORT 0x800 1240#define INIT_ACKN_SUPPORT 0x400 1241 1242#define RECIP_ACK0_SUPPORT 0x8000 1243#define RECIP_ACKN_SUPPORT 0x4000 1244 1245#define X_ID_INTERLOCK 0x2000 1246 1247#define ERROR_POLICY 0x1800 // Error Policy Supported 1248#define ERROR_DISCARD 0x00 // Only Discard Supported 1249#define ERROR_DISC_PROCESS 0x02 // Discard and process supported 1250 1251#define NODE_ID 0x01 1252#define IEEE_EXT 0x20 1253 1254// 1255// Categories Supported Per Sequence 1256// 1257#define CATEGORIES_PER_SEQUENCE 0x300 1258#define ONE_CATEGORY_SEQUENCE 0x00 // 1 Category per Sequence 1259#define TWO_CATEGORY_SEQUENCE 0x01 // 2 Categories per Sequence 1260#define MANY_CATEGORY_SEQUENCE 0x03 // > 2 Categories/Sequence 1261 1262typedef struct { 1263 1264 USHORT initiator_control; 1265 USHORT service_options; 1266 1267 USHORT rx_data_size; 1268 USHORT recipient_control; 1269 1270 USHORT ee_credit; 1271 USHORT concurrent_sequences; 1272 1273 USHORT reserved; 1274 USHORT open_sequences; 1275 1276} CLASS_PARAMETERS; 1277 1278typedef struct { 1279 ULONG login_cmd; 1280 // 1281 // Common Service Parameters 1282 // 1283 struct { 1284 1285 USHORT bb_credit; 1286 UCHAR lowest_ver; 1287 UCHAR highest_ver; 1288 1289 USHORT bb_rx_size; 1290 USHORT common_features; 1291 1292 USHORT rel_offset; 1293 USHORT concurrent_seq; 1294 1295 1296 ULONG e_d_tov; 1297 } cmn_services; 1298 1299 // 1300 // Port Name 1301 // 1302 UCHAR port_name[8]; 1303 1304 // 1305 // Node/Fabric Name 1306 // 1307 UCHAR node_name[8]; 1308 1309 // 1310 // Class 1, 2 and 3 Service Parameters 1311 // 1312 CLASS_PARAMETERS class1; 1313 CLASS_PARAMETERS class2; 1314 CLASS_PARAMETERS class3; 1315 1316 ULONG reserved[4]; 1317 1318 // 1319 // Vendor Version Level 1320 // 1321 UCHAR vendor_id[2]; 1322 UCHAR vendor_version[6]; 1323 ULONG buffer_size; 1324 USHORT rxid_start; 1325 USHORT total_rxids; 1326} LOGIN_PAYLOAD; 1327 1328 1329typedef struct 1330{ 1331 ULONG cmd; // 4 bytes 1332 UCHAR n_port_identifier[3]; 1333 UCHAR reserved; 1334 UCHAR port_name[8]; 1335} LOGOUT_PAYLOAD; 1336 1337 1338// 1339// PRLI Request Service Parameter Defines 1340// 1341#define PRLI_ACC 0x01 1342#define PRLI_REQ 0x02 1343#define ORIG_PROCESS_ASSOC_VALID 0x8000 1344#define RESP_PROCESS_ASSOC_VALID 0x4000 1345#define ESTABLISH_PAIR 0x2000 1346#define DATA_OVERLAY_ALLOWED 0x40 1347#define INITIATOR_FUNCTION 0x20 1348#define TARGET_FUNCTION 0x10 1349#define CMD_DATA_MIXED 0x08 1350#define DATA_RESP_MIXED 0x04 1351#define READ_XFER_RDY 0x02 1352#define WRITE_XFER_RDY 0x01 1353 1354#define RESPONSE_CODE_MASK 0xF00 1355#define REQUEST_EXECUTED 0x100 1356#define NO_RESOURCES 0x200 1357#define INIT_NOT_COMPLETE 0x300 1358#define IMAGE_DOES_NOT_EXIST 0x400 1359#define BAD_PREDEFINED_COND 0x500 1360#define REQ_EXEC_COND 0x600 1361#define NO_MULTI_PAGE 0x700 1362 1363typedef struct { 1364 USHORT payload_length; 1365 UCHAR page_length; 1366 UCHAR cmd; 1367 1368 1369 ULONG valid; 1370 1371 ULONG orig_process_associator; 1372 1373 ULONG resp_process_associator; 1374 1375 ULONG fcp_info; 1376} PRLI_REQUEST; 1377 1378typedef struct { 1379 1380 USHORT payload_length; 1381 UCHAR page_length; 1382 UCHAR cmd; 1383 1384 ULONG valid; 1385 ULONG orig_process_associator; 1386 1387 ULONG resp_process_associator; 1388 ULONG reserved; 1389} PRLO_REQUEST; 1390 1391typedef struct { 1392 ULONG cmd; 1393 1394 ULONG hard_address; 1395 1396 UCHAR port_name[8]; 1397 1398 UCHAR node_name[8]; 1399 1400 ULONG s_id; 1401} ADISC_PAYLOAD; 1402 1403struct ext_sg_entry_t { 1404 __u32 len:18; /* buffer length, bits 0-17 */ 1405 __u32 uba:13; /* upper bus address bits 18-31 */ 1406 __u32 lba; /* lower bus address bits 0-31 */ 1407}; 1408 1409// J. McCarty's LINK.H 1410// 1411// LS_RJT Reason Codes 1412// 1413 1414#define INVALID_COMMAND_CODE 0x01 1415#define LOGICAL_ERROR 0x03 1416#define LOGICAL_BUSY 0x05 1417#define PROTOCOL_ERROR 0x07 1418#define UNABLE_TO_PERFORM 0x09 1419#define COMMAND_NOT_SUPPORTED 0x0B 1420#define LS_VENDOR_UNIQUE 0xFF 1421 1422// 1423// LS_RJT Reason Codes Explanations 1424// 1425#define NO_REASON 0x00 1426#define OPTIONS_ERROR 0x01 1427#define INITIATOR_CTL_ERROR 0x03 1428#define RECIPIENT_CTL_ERROR 0x05 1429#define DATA_FIELD_SIZE_ERROR 0x07 1430#define CONCURRENT_SEQ_ERROR 0x09 1431#define CREDIT_ERROR 0x0B 1432#define INVALID_PORT_NAME 0x0D 1433#define INVALID_NODE_NAME 0x0E 1434#define INVALID_CSP 0x0F // Invalid Service Parameters 1435#define INVALID_ASSOC_HDR 0x11 // Invalid Association Header 1436#define ASSOC_HDR_REQUIRED 0x13 // Association Header Required 1437#define LS_INVALID_S_ID 0x15 1438#define INVALID_OX_RX_ID 0x17 // Invalid OX_ID RX_ID Combination 1439#define CMD_IN_PROCESS 0x19 1440#define INVALID_IDENTIFIER 0x1F // Invalid N_PORT Identifier 1441#define INVALID_SEQ_ID 0x21 1442#define ABT_INVALID_XCHNG 0x23 // Attempt to Abort an invalid Exchange 1443#define ABT_INACTIVE_XCHNG 0x25 // Attempt to Abort an inactive Exchange 1444#define NEED_REC_QUAL 0x27 // Recovery Qualifier required 1445#define NO_LOGIN_RESOURCES 0x29 // No resources to support login 1446#define NO_DATA 0x2A // Unable to supply requested data 1447#define REQUEST_NOT_SUPPORTED 0x2C // Request Not Supported 1448 1449// 1450// Link Control Codes 1451// 1452 1453// 1454// P_BSY Action Codes 1455// 1456#define SEQUENCE_TERMINATED 0x01000000 1457#define SEQUENCE_ACTIVE 0x02000000 1458 1459// 1460// P_BSY Reason Codes 1461// 1462#define PHYS_NPORT_BUSY 0x010000 1463#define NPORT_RESOURCE_BUSY 0x020000 1464 1465// 1466// P_RJT, F_RJT Action Codes 1467// 1468 1469#define RETRYABLE_ERROR 0x01000000 1470#define NON_RETRYABLE_ERROR 0x02000000 1471 1472// 1473// P_RJT, F_RJT Reason Codes 1474// 1475#define INVALID_D_ID 0x010000 1476#define INVALID_S_ID 0x020000 1477#define NPORT_NOT_AVAIL_TMP 0x030000 1478#define NPORT_NOT_AVAIL_PERM 0x040000 1479#define CLASS_NOT_SUPPORTED 0x050000 1480#define USAGE_ERROR 0x060000 1481#define TYPE_NOT_SUPPORTED 0x070000 1482#define INVAL_LINK_CONTROL 0x080000 1483#define INVAL_R_CTL 0x090000 1484#define INVAL_F_CTL 0x0A0000 1485#define INVAL_OX_ID 0x0B0000 1486#define INVAL_RX_ID 0x0C0000 1487#define INVAL_SEQ_ID 0x0D0000 1488#define INVAL_DF_CTL 0x0E0000 1489#define INVAL_SEQ_CNT 0x0F0000 1490#define INVAL_PARAMS 0x100000 1491#define EXCHANGE_ERROR 0x110000 1492#define LS_PROTOCOL_ERROR 0x120000 1493#define INCORRECT_LENGTH 0x130000 1494#define UNEXPECTED_ACK 0x140000 1495#define LOGIN_REQ 0x160000 1496#define EXCESSIVE_SEQ 0x170000 1497#define NO_EXCHANGE 0x180000 1498#define SEC_HDR_NOT_SUPPORTED 0x190000 1499#define NO_FABRIC 0x1A0000 1500#define P_VENDOR_UNIQUE 0xFF0000 1501 1502// 1503// BA_RJT Reason Codes 1504// 1505#define BA_INVALID_COMMAND 0x00010000 1506#define BA_LOGICAL_ERROR 0x00030000 1507#define BA_LOGICAL_BUSY 0x00050000 1508#define BA_PROTOCOL_ERROR 0x00070000 1509#define BA_UNABLE_TO_PERFORM 0x00090000 1510 1511// 1512// BA_RJT Reason Explanation Codes 1513// 1514#define BA_NO_REASON 0x00000000 1515#define BA_INVALID_OX_RX 0x00000300 1516#define BA_SEQUENCE_ABORTED 0x00000500 1517 1518 1519 1520#endif /* CPQFCTSSTRUCTS_H */ 1521 1522