1/* -*- linux-c -*- */
2/* $Id: 8253xutl.c,v 1.1.1.1 2008/10/15 03:26:45 james26_jang Exp $
3 * 8253xutl.c: SYNC TTY Driver for the SIEMENS SAB8253X DUSCC.
4 *
5 * Implementation, modifications and extensions
6 * Copyright (C) 2001 By Joachim Martillo, Telford Tools, Inc.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14/* Standard in kernel modules */
15#define DEFINE_VARIABLE
16#include <linux/module.h>   /* Specifically, a module */
17#include <asm/io.h>
18#include <linux/timer.h>
19#include <linux/interrupt.h>
20#include <linux/tty.h>
21#include <linux/tty_flip.h>
22#include <linux/mm.h>
23#include <linux/version.h>
24#include <asm/uaccess.h>
25#include "8253xctl.h"
26#include "8253x.h"
27#include <linux/pci.h>
28#include <linux/fs.h>
29#include "sp502.h"
30
31#ifdef MODULE
32#undef XCONFIG_SERIAL_CONSOLE
33#endif
34
35void sab8253x_start_txS(struct sab_port *port)
36{
37	unsigned long flags;
38	register int count;
39	register int total;
40	register int offset;
41	char temporary[32];
42	register unsigned int slopspace;
43	register int sendsize;
44	unsigned int totaltransmit;
45	unsigned fifospace;
46	unsigned loadedcount;
47	struct tty_struct *tty = port->tty; /* a little gross tty flags whether
48					       invoked from a tty or the network */
49
50	fifospace = port->xmit_fifo_size; /* This code can handle fragmented frames
51					     although currently none are generated*/
52	loadedcount = 0;
53
54	if(port->sabnext2.transmit == NULL)
55	{
56		return;
57	}
58
59	save_flags(flags);
60	cli();
61
62
63	if(count = port->sabnext2.transmit->Count, (count & OWNER) == OWN_SAB)
64	{
65		count &= ~OWN_SAB; /* OWN_SAB is really 0 but cannot guarantee in the future */
66
67		if(port->sabnext2.transmit->HostVaddr)
68		{
69			total = (port->sabnext2.transmit->HostVaddr->tail -
70				 port->sabnext2.transmit->HostVaddr->data); /* packet size */
71		}
72		else
73		{
74			total = 0;		/* the data is only the crc/trailer */
75		}
76
77		if(tty && (tty->stopped || tty->hw_stopped) && (count == total))
78		{			/* works for frame that only has a trailer (crc) */
79			port->interrupt_mask1 |= SAB82532_IMR1_XPR;
80			WRITEB(port, imr1, port->interrupt_mask1);
81			restore_flags(flags);	/* can't send */
82			return;
83		}
84
85		offset = (total - count);	/* offset to data still to send */
86
87		port->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS);
88		WRITEB(port, imr1, port->interrupt_mask1);
89		port->all_sent = 0;
90
91		if(READB(port,star) & SAB82532_STAR_XFW)
92		{
93			if(count <= fifospace)
94			{
95				port->xmit_cnt = count;
96				slopspace = 0;
97				sendsize = 0;
98				if(port->sabnext2.transmit->sendcrc)
99				/* obviously should not happen for async but might use for
100				   priority transmission */
101				{
102					slopspace = fifospace - count;
103				}
104				if(slopspace)
105				{
106					if(count)
107					{
108						memcpy(temporary, &port->sabnext2.transmit->HostVaddr->data[offset],
109						       count);
110					}
111					sendsize = MIN(slopspace, (4 - port->sabnext2.transmit->crcindex));
112				/* how many bytes to send */
113					memcpy(&temporary[count],
114					       &((unsigned char*)(&port->sabnext2.transmit->crc))
115					       [port->sabnext2.transmit->crcindex],
116					       sendsize);
117					port->sabnext2.transmit->crcindex += sendsize;
118					if(port->sabnext2.transmit->crcindex >= 4)
119					{
120						port->sabnext2.transmit->sendcrc = 0;
121					}
122					port->xmit_buf = temporary;
123				}
124				else
125				{
126					port->xmit_buf =	/* set up wrifefifo variables */
127						&port->sabnext2.transmit->HostVaddr->data[offset];
128				}
129				port->xmit_cnt += sendsize;
130				count = 0;
131			}
132			else
133			{
134				count -= fifospace;
135				port->xmit_cnt = fifospace;
136				port->xmit_buf =	/* set up wrifefifo variables */
137					&port->sabnext2.transmit->HostVaddr->data[offset];
138
139			}
140			port->xmit_tail= 0;
141			loadedcount = port->xmit_cnt;
142			(*port->writefifo)(port);
143			totaltransmit = Sab8253xCountTransmitDescriptors(port);
144			if(tty && (totaltransmit < (sab8253xs_listsize/2))) /* only makes sense on a TTY */
145			{
146				sab8253x_sched_event(port, SAB8253X_EVENT_WRITE_WAKEUP);
147			}
148
149			if((sab8253xt_listsize - totaltransmit) > (sab8253xt_listsize/2))
150			{
151				port->buffergreedy = 0;
152			}
153			else
154			{
155				port->buffergreedy = 1;
156			}
157
158			port->xmit_buf = NULL; /* this var is used to indicate whether to call kfree */
159
160			/* fifospace -= loadedcount;*/
161			/* Here to make mods to handle arbitrarily fragmented frames look to 8253xtty.c for help */
162
163			if ((count <= 0) && (port->sabnext2.transmit->sendcrc == 0))
164			{
165				port->sabnext2.transmit->Count = OWN_DRIVER;
166				if(!tty)
167				{		/* called by network driver */
168					++(port->Counters.transmitpacket);
169				}
170#ifdef FREEININTERRUPT		    /* treat this routine as if taking place in interrupt */
171				if(port->sabnext2.transmit->HostVaddr)
172				{
173					skb_unlink(port->sabnext2.transmit->HostVaddr);
174					dev_kfree_skb_any(port->sabnext2.transmit->HostVaddr);
175					port->sabnext2.transmit->HostVaddr = 0; /* no skb */
176				}
177				port->sabnext2.transmit->crcindex = 0; /* no single byte */
178#endif
179				sab8253x_cec_wait(port);
180				WRITEB(port, cmdr, SAB82532_CMDR_XME|SAB82532_CMDR_XTF); /* Terminate the frame */
181
182				port->sabnext2.transmit = port->sabnext2.transmit->VNext;
183
184				if(!tty && port->tx_full)	/* invoked from the network driver */
185				{
186					port->tx_full = 0; /* there is a free slot */
187					switch(port->open_type)
188					{
189					case OPEN_SYNC_NET:
190#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
191						port->dev->start = 1;
192						port->dev->tbusy = 0;	/* maybe need mark_bh here */
193#else
194						netif_start_queue(port->dev);
195#endif
196						break;
197
198					case OPEN_SYNC_CHAR:
199						wake_up_interruptible(&port->write_wait);
200						break;
201
202					default:
203						break;
204					}
205				}
206
207				if((port->sabnext2.transmit->Count & OWNER) == OWN_SAB)
208				{		/* new frame to send */
209					port->interrupt_mask1 &= ~(SAB82532_IMR1_XPR);
210					WRITEB(port, imr1, port->interrupt_mask1);
211				}
212				else
213				{
214					port->interrupt_mask1 |= SAB82532_IMR1_XPR;
215					WRITEB(port, imr1, port->interrupt_mask1);
216					if((port->open_type == OPEN_SYNC_CHAR) && port->async_queue)
217					{		/* if indication of transmission is needed by the */
218						/* application on a per-frame basis kill_fasync */
219						/* can provide it */
220						kill_fasync(&port->async_queue, SIGIO, POLL_OUT);
221					}
222				}
223				restore_flags(flags);
224				return;
225			}
226			/* Issue a Transmit FIFO command. */
227			sab8253x_cec_wait(port);
228			WRITEB(port, cmdr, SAB82532_CMDR_XTF);
229			port->sabnext2.transmit->Count = (count|OWN_SAB);
230		}
231		port->interrupt_mask1 &= ~(SAB82532_IMR1_XPR); /* more to send */
232		WRITEB(port, imr1, port->interrupt_mask1);
233	}
234	else
235	{				/* nothing to send */
236		port->interrupt_mask1 |= SAB82532_IMR1_XPR;
237		WRITEB(port, imr1, port->interrupt_mask1);
238	}
239	restore_flags(flags);
240	return;
241}
242
243void sab8253x_transmit_charsS(struct sab_port *port,
244			      union sab8253x_irq_status *stat)
245{
246	if (stat->sreg.isr1 & SAB82532_ISR1_ALLS)
247	{
248		port->interrupt_mask1 |= SAB82532_IMR1_ALLS;
249		WRITEB(port, imr1, port->interrupt_mask1);
250		port->all_sent = 1;
251	}
252	sab8253x_start_txS(port);
253}
254
255/*
256 * This routine is called to set the UART divisor registers to match
257 * the specified baud rate for a serial port.
258 */
259
260/***************************************************************************
261 * sab_baudenh:      Function to compute the "enhanced" baudrate.
262 *
263 *
264 *     Parameters   :
265 *                  encbaud  2* the baudrate. We use the
266 *                           double value so as to support 134.5 (in only)
267 *                  clkspeed The board clock speed in Hz.
268 *                  bgr      Value of reg BGR for baudrate(output)
269 *                  ccr2     Value of reg // CCR2 for baudrate (output)
270 *                  ccr4     Value of reg CCR4 for baudrate (output)
271 *                  truebaud The actual baudrate achieved (output).
272 *
273 *
274 *     Return value : Return FALSE the parameters could not be computed,
275 *
276 *     Prerequisite : The various ports must have been initialized
277 *
278 *     Remark       : Stolen from the Aurora ase driver.
279 *
280 *     Author       : fw
281 *
282 *     Revision     : Oct 9 2000, creation
283 ***************************************************************************/
284/*
285 * Macro to check to see if the high n bits of the given unsigned long
286 *  are zero.
287 */
288#define HIZERO(x, n)        ( ((unsigned long) ((x) << (n)) >> (n)) == (x))
289/* form an n-bit bitmask */
290#define NBM(n)                  (~(((~(unsigned long) 0) >> (n)) << (n)))
291/* shift x by y bits to right, rounded */
292#define ROUND_SHIFT(x, y)       (((unsigned long) (x) + (NBM(y - 1) + 1)) >> (y))
293/* perform rounded division */
294#define ROUND_DIV(x, y) (((x) + ((y) >> 1)) / (y))
295#define ABSDIF(x, y)    ((x) > (y) ? ((x) - (y)) : ((y) - (x)))
296static unsigned int
297sab8253x_baudenh(unsigned long encbaud, unsigned long clk_speed,
298		 unsigned char *bgr, unsigned char *ccr2,
299		 unsigned long *truebaudp)
300{
301	register unsigned short	 tmp;
302	register unsigned char	 ccr2tmp;
303	unsigned long		 power2, mant;
304	unsigned int			 fastclock;
305
306	if (encbaud == 0) {
307		return FALSE;
308	}
309
310	/*
311	 * Keep dividing quotien by two until it is between the value of 1 and 64,
312	 *  inclusive.
313	 */
314
315	fastclock = (clk_speed >= 10000000);	/* >= 10 MHz */
316
317	for (power2 = 0; power2 < 16; power2++)
318	{
319		/* divisor = baud * 2^M * 16 */
320		if (!HIZERO(encbaud, power2 + 3))
321		{
322			if (!HIZERO(encbaud, power2))
323			{	/* baud rate still too big? */
324				mant = ROUND_DIV(ROUND_SHIFT(clk_speed, power2 + 3), encbaud);
325
326				/* mant = (clk_speed / (8 * 2^M)) / (baud * 2) */
327				/*	= clk_speed / (baud * 16 * 2^M) */
328			}
329			else
330			{
331				mant = ROUND_DIV(ROUND_SHIFT(clk_speed, 3), encbaud << power2);
332				/* mant = (clk_speed / 8) / (baud * 2 * 2^M) */
333				/*	= clk_speed / (baud * 16 * 2^M) */
334			}
335		}
336		else
337		{
338			mant = ROUND_DIV(clk_speed, encbaud << (power2 + 3));
339			/* mant = clk_speed / (baud * 2 * 8 * 2^M) */
340			/*	    = clk_speed / (baud * 16 * 2^M) */
341		}
342
343		/* mant = clk_speed / (baud * 2^M * 16) */
344
345		if (mant < 2
346		    || (mant <= 64 && (!fastclock || power2 != 0)))
347		{
348			break;
349		}
350	}
351
352	/*
353	 * Did we not succeed?  (Baud rate is too small)
354	 */
355	if (mant > 64)
356	{
357		return FALSE;
358	}
359
360	/*
361	 * Now, calculate the true baud rate.
362	 */
363
364	if (mant < 1 || (mant == 1 && power2 == 0))
365	{
366		/* bgr and ccr2 should be initialized to 0 */
367		*truebaudp = ROUND_SHIFT(clk_speed, 4);
368	}
369	else
370	{
371		*truebaudp = ROUND_DIV(clk_speed, mant << (4 + power2));
372		/* divisor is not zero because mant is [1, 64] */
373		mant--; /* now [0, 63] */
374
375		/*
376		 * Encode the N and M values into the bgr and ccr2 registers.
377		 */
378
379		tmp = ((unsigned short) mant) | ((unsigned short) power2 << 6);
380
381		ccr2tmp = SAB82532_CCR2_BDF;
382		if ((tmp & 0x200) != 0)
383		{
384			ccr2tmp |= SAB82532_CCR2_BR9;
385		}
386		if ((tmp & 0x100) != 0)
387		{
388			ccr2tmp |= SAB82532_CCR2_BR8;
389		}
390
391		*ccr2 = ccr2tmp | (*ccr2 & ~(SAB82532_CCR2_BDF|SAB82532_CCR2_BR8|SAB82532_CCR2_BR9));
392		*bgr = (unsigned char) tmp;
393	}
394
395	return TRUE;
396}
397
398/*
399 * Calculate the standard mode baud divisor using an integral algorithm.
400 */
401/***************************************************************************
402 * sab_baudstd:      Function to compute the "standard " baudrate.
403 *
404 *
405 *     Parameters   :
406 *                  encbaud  2* the baudrate. We use the
407 *                           double value so as to support 134.5 (in only)
408 *                  clkspeed The board clock speed in Hz.
409 *                  bgr      Value of reg BGR for baudrate(output)
410 *                  ccr2     Value of reg CCR2 for baudrate (output)
411 *                  ccr4     Value of reg CCR4 for baudrate (output)
412 *                  truebaud The actual baudrate achieved (output).
413 *
414 *
415 *     Return value : Return FALSE the parameters could not be computed,
416 *
417 *     Prerequisite : The various ports must have been initialized
418 *
419 *     Remark       : Stolen from the Aurora ase driver.
420 *
421 *     Author       : fw
422 *
423 *     Revision     : Oct 9 2000, creation
424 ***************************************************************************/
425static unsigned int
426sab8253x_baudstd(unsigned long encbaud, unsigned long clk_speed,
427		 unsigned char *bgr, unsigned char *ccr2,
428		 unsigned long *truebaudp)
429{
430  register unsigned short	 quot;
431  register unsigned char	 ccr2tmp;
432
433  if (encbaud == 0)
434  {
435	  return FALSE;
436  }
437
438  /*
439   * This divisor algorithm is a little strange.  The
440   *  divisors are all multiples of 2, except for the
441   *  magic value of 1.
442   *
443   * What we do is do most of the algorithm for multiples
444   *  of 1, and then switch at the last minute to multiples
445   *  of 2.
446   */
447
448  /*
449   * Will we lose any information by left shifting encbaud?
450   *  If so, then right shift clk_speed instead.
451   */
452  if (!HIZERO(encbaud, 3))
453  {
454	  quot = (unsigned short) ROUND_DIV(ROUND_SHIFT(clk_speed, 3),
455					    encbaud);
456	  /* quot = (clk_speed / 8) / (baud * 2) = clk_speed / (16 * baud) */
457  }
458  else
459  {
460	  /* encbaud isn't a multiple of 2^29 (baud not mult. of 2^28) */
461	  quot = (unsigned short) ROUND_DIV(clk_speed, encbaud << 3);
462  }
463
464  /* quot = clk_speed / (baud * 16) */
465  if (quot < 2)
466  {
467	  /* bgr and ccr2 should be initialized to 0 */
468	  *truebaudp = ROUND_SHIFT(clk_speed, 4);
469	  return TRUE;
470  }
471
472  /*
473   * Divide the quotient by two.
474   */
475  quot = ROUND_SHIFT(quot, 1);
476
477  if (quot <= 0x400)
478  {
479	  /* quot = [1, 0x400]  -> (quot << 5) != 0 */
480	  *truebaudp = ROUND_DIV(clk_speed, ((unsigned long) quot << 5));
481	  quot--;
482
483	  ccr2tmp = SAB82532_CCR2_BDF;
484	  if ((quot & 0x200) != 0)
485	  {
486		  ccr2tmp |= SAB82532_CCR2_BR9;
487	  }
488	  if ((quot & 0x100) != 0)
489	  {
490		  ccr2tmp |=SAB82532_CCR2_BR8;
491	  }
492
493	  *ccr2 = ccr2tmp | (*ccr2 & ~(SAB82532_CCR2_BDF|SAB82532_CCR2_BR8|SAB82532_CCR2_BR9));
494	  *bgr = (unsigned char) quot;
495  }
496  else
497  {			/* the baud rate is too small. */
498	  return FALSE;
499  }
500
501  return TRUE;
502}
503
504/***************************************************************************
505 * sab_baud:      Function to compute the best register value to achieve
506 *                a given baudrate.
507 *
508 *
509 *     Parameters   :
510 *                  port:    The port being used  (in only)
511 *                  encbaud: 2* the baudrate. We use the
512 *                           double value so as to support 134.5 (in only)
513 *                  bgr      Value of reg BGR for baudrate(output)
514 *                  ccr2     Value of reg CCR2 for baudrate (output)
515 *                  ccr4     Value of reg CCR4 for baudrate (output)
516 *                  truebaud The actual baudrate achieved (output).
517 *
518 *
519 *     Return value : Return TRUE if the vaudrate can be set, FALSE otherwise
520 *
521 *     Prerequisite : The various ports must have been initialized
522 *
523 *     Remark       : Stolen from the Aurora ase driver.
524 *
525 *     Author       : fw
526 *
527 *     Revision     : Oct 9 2000, creation
528 ***************************************************************************/
529unsigned int
530sab8253x_baud(sab_port_t *port, unsigned long encbaud,
531	      unsigned char *bgr, unsigned char *ccr2,
532	      unsigned char *ccr4, unsigned long *truebaudp)
533{
534	unsigned char	 bgr_std, bgr_enh, ccr2_std, ccr2_enh, ccr4_enh;
535	unsigned int		 ok_std, ok_enh;
536	unsigned long	 truebaud_std, truebaud_enh, truebaud,clkspeed;
537
538	bgr_std = bgr_enh = 0;
539	ccr2_std = ccr2_enh = 0;
540	ccr4_enh = 0;
541
542	/*
543	 * the port/chip/board structure will tell us:
544	 *  1) clock speed
545	 *  2) chip revision (to figure out if the enhanced method is
546	 *     available.
547	 */
548
549	clkspeed = port->chip->c_cim ? port->chip->c_cim->ci_clkspeed :  port->board->b_clkspeed;
550
551#ifdef NODEBUGGING
552	printk("With clk speed %ld, baud rate = %ld\n",clkspeed, encbaud);
553#endif
554
555	ok_std = sab8253x_baudstd(encbaud, clkspeed, &bgr_std,
556				  &ccr2_std, &truebaud_std);
557#ifdef NODEBUGGING
558	printk("Std gives bgr = 0x%x, ccr2=0x%x for speed %ld\n",bgr_std,ccr2_std,truebaud_std);
559#endif
560	if(port->chip->c_revision >= SAB82532_VSTR_VN_3_2)
561	{
562		ok_enh = sab8253x_baudenh(encbaud, clkspeed,
563					  &bgr_enh, &ccr2_enh, &truebaud_enh);
564#ifdef NODEBUGGING
565		printk("Enh gives bgr = 0x%x, ccr2=0x%x for speed %ld\n",bgr_enh,ccr2_enh,truebaud_enh);
566#endif
567	}
568	else
569		ok_enh = FALSE;
570
571	/*
572	 * Did both methods return values?
573	 */
574	if (ok_std && ok_enh)
575	{
576		/*
577		 * Find the closest of the two.
578		 */
579		if (ABSDIF((truebaud_enh<<1), encbaud) <
580		    ABSDIF((truebaud_std<<1), encbaud))
581		{
582			ok_std = FALSE;
583		}
584		else
585		{
586			ok_enh = FALSE;
587		}
588	}
589
590	/*
591	 * Now return the values.
592	 */
593
594	if (ok_std || ok_enh)
595	{
596		truebaud = ok_std ? truebaud_std : truebaud_enh;
597
598		/*
599		 * If the true baud rate is off by more than 5%, then
600		 *  we don't support it.
601		 */
602		if (ROUND_DIV(ABSDIF((truebaud<<1), encbaud), encbaud) != 0)
603		{
604			/*
605			 * We're not even in the right ballpark.  This
606			 *  test is here to deal with overflow conditions.
607			 */
608			return FALSE;
609		}
610		else if (ROUND_DIV(ABSDIF((truebaud<<1), encbaud) * 100,
611				   encbaud) >= 5)
612		{
613			return FALSE;
614		}
615
616		*truebaudp = truebaud;
617
618		if (ok_enh)
619		{
620			*ccr4 |= SAB82532_CCR4_EBRG;
621			*ccr2 = ccr2_enh;
622			*bgr = bgr_enh;
623#ifdef DEBUGGING
624			printk("Enhanced Baud at %ld, ccr4 = 0x%x, ccr2 = 9x%x, bgr = 0x%x\n",
625			       truebaud,*ccr4,*ccr2,*bgr);
626#endif
627		}
628		else
629		{
630			*ccr4 &= ~SAB82532_CCR4_EBRG;
631			*ccr2 = ccr2_std;
632			*bgr = bgr_std;
633#ifdef DEBUGGING
634			printk("Standard Baud at %ld, ccr4 = 0x%x, ccr2 = 9x%x, bgr = 0x%x\n",
635			       truebaud,*ccr4,*ccr2,*bgr);
636#endif
637		}
638
639		return TRUE;
640	}
641	else
642	{
643		return FALSE;
644	}
645}
646
647int Sab8253xCountTransmit(SAB_PORT *port)
648{
649	register RING_DESCRIPTOR *rd;
650	register int total;
651	register int count;
652	unsigned long flags;
653	RING_DESCRIPTOR *start;
654
655	if(port->sabnext2.transmit == NULL)
656	{
657		return 0;
658	}
659
660	save_flags(flags);
661	cli();
662	rd = port->sabnext2.transmit;
663	start = rd;
664	total = 0;
665	while(1)
666	{
667		count = rd->Count;
668		if((count & OWNER) == OWN_DRIVER)
669		{
670			break;
671		}
672		total += (count & ~OWNER);
673		if(rd->sendcrc)
674		{
675			total += (4 - rd->crcindex);
676		}
677		rd = rd->VNext;
678		if(rd == start)
679		{
680			break;
681		}
682	}
683	restore_flags(flags);
684	return total;
685}
686
687int Sab8253xCountTransmitDescriptors(SAB_PORT *port)
688{
689	register RING_DESCRIPTOR *rd;
690	register int total;
691	register int count;
692	unsigned long flags;
693	RING_DESCRIPTOR *start;
694
695	if(port->sabnext2.transmit == NULL)
696	{
697		return 0;
698	}
699
700	save_flags(flags);
701	cli();
702	rd = port->sabnext2.transmit;
703	start = rd;
704	total = 0;
705	while(1)
706	{
707		count = rd->Count;
708		if((count & OWNER) == OWN_DRIVER)
709		{
710			break;
711		}
712		++total;
713		rd = rd->VNext;
714		if(rd == start)
715		{
716			break;
717		}
718	}
719	restore_flags(flags);
720	return total;
721}
722
723int getccr0configS(struct sab_port *port)
724{
725	return port->ccontrol.ccr0;
726}
727
728int getccr1configS(struct sab_port *port)
729{
730	return port->ccontrol.ccr1;
731}
732
733int getccr2configS(struct sab_port *port)
734{
735	return port->ccontrol.ccr2;
736}
737
738int getccr3configS(struct sab_port *port)
739{
740	return port->ccontrol.ccr3;
741}
742
743int getccr4configS(struct sab_port *port)
744{
745	return port->ccontrol.ccr4;
746}
747
748int getrlcrconfigS(struct sab_port *port)
749{
750	return port->ccontrol.rlcr;
751}
752
753int getmodeS(struct sab_port *port)
754{
755	return port->ccontrol.mode;
756}
757
758void sab8253x_init_lineS(struct sab_port *port)
759{
760	unsigned char stat;
761
762	if(port->chip->c_cim)
763	{
764		if(port->chip->c_cim->ci_type == CIM_SP502)
765		{
766			aura_sp502_program(port, SP502_OFF_MODE);
767		}
768	}
769
770	/*
771	 * Wait for any commands or immediate characters
772	 */
773	sab8253x_cec_wait(port);
774
775	/*
776	 * Clear the FIFO buffers.
777	 */
778
779	WRITEB(port, cmdr, SAB82532_CMDR_RHR);
780	sab8253x_cec_wait(port);
781	WRITEB(port,cmdr,SAB82532_CMDR_XRES);
782
783
784	/*
785	 * Clear the interrupt registers.
786	 */
787	stat = READB(port, isr0);	/* acks ints */
788	stat = READB(port, isr1);
789
790	/*
791	 * Now, initialize the UART
792	 */
793	WRITEB(port, ccr0, 0);	  /* power-down */
794	WRITEB(port, ccr0, getccr0configS(port));
795	WRITEB(port, ccr1, getccr1configS(port));
796	WRITEB(port, ccr2, getccr2configS(port));
797	WRITEB(port, ccr3, getccr3configS(port));
798	WRITEB(port, ccr4, getccr4configS(port));	/* 32 byte receive fifo */
799	WRITEB(port, mode, getmodeS(port));
800	WRITEB(port, tic /* really rlcr */, getrlcrconfigS(port));
801	/* power-up */
802
803	switch(port->ccontrol.ccr4 & SAB82532_CCR4_RF02)
804	{
805	case SAB82532_CCR4_RF32:
806		port->recv_fifo_size = 32;
807		break;
808	case SAB82532_CCR4_RF16:
809		port->recv_fifo_size = 16;
810		break;
811	case SAB82532_CCR4_RF04:
812		port->recv_fifo_size = 4;
813		break;
814	case SAB82532_CCR4_RF02:
815		port->recv_fifo_size = 2;
816		break;
817	default:
818		port->recv_fifo_size = 32;
819		port->ccontrol.ccr4 &= ~SAB82532_CCR4_RF02;
820		break;
821	}
822
823	if(port->ccontrol.ccr2 & SAB82532_CCR2_TOE)
824	{
825		RAISE(port, txclkdir);
826	}
827	else
828	{
829		LOWER(port, txclkdir);
830	}
831
832	SET_REG_BIT(port,ccr0,SAB82532_CCR0_PU);
833
834	if(port->chip->c_cim)
835	{
836		if(port->chip->c_cim->ci_type == CIM_SP502)
837		{
838			aura_sp502_program(port, port->sigmode);
839		}
840	}
841}
842
843/* frees up all skbuffs currently */
844/* held by driver */
845void Sab8253xFreeAllFreeListSKBUFFS(SAB_PORT* priv) /* empty the skbuffer list */
846/* either on failed open */
847/* or on close*/
848{
849	struct sk_buff* skb;
850
851	if(priv->sab8253xbuflist == NULL)
852	{
853		return;
854	}
855
856	DEBUGPRINT((KERN_ALERT "sab8253x: freeing %i skbuffs.\n",
857		    skb_queue_len(priv->sab8253xbuflist)));
858
859	while(skb_queue_len(priv->sab8253xbuflist) > 0)
860	{
861		skb = skb_dequeue(priv->sab8253xbuflist);
862		dev_kfree_skb_any(skb);
863	}
864	kfree(priv->sab8253xbuflist);
865	priv->sab8253xbuflist = NULL;
866}
867
868int Sab8253xSetUpLists(SAB_PORT *priv)
869{
870	if(priv->sab8253xbuflist)
871	{
872		if(priv->sab8253xc_rcvbuflist)
873		{
874			return 0;
875		}
876		else
877		{
878			return -1;
879		}
880		return 0;
881	}
882	else if(priv->sab8253xc_rcvbuflist)
883	{
884		return -1;
885	}
886
887	priv->sab8253xbuflist = (struct sk_buff_head*) kmalloc(sizeof(struct sk_buff_head), GFP_KERNEL);
888	if(priv->sab8253xbuflist == NULL)
889	{
890		return -1;
891	}
892	priv->sab8253xc_rcvbuflist = (struct sk_buff_head*) kmalloc(sizeof(struct sk_buff_head), GFP_KERNEL);
893	if(priv->sab8253xc_rcvbuflist == NULL)
894	{
895		kfree(priv->sab8253xbuflist);
896		return -1;
897	}
898	skb_queue_head_init(priv->sab8253xbuflist);
899	skb_queue_head_init(priv->sab8253xc_rcvbuflist);
900	return 0;
901}
902
903/* sets up transmit ring and one receive sk_buff */
904
905/* set up transmit and receive
906   sk_buff control structures */
907int Sab8253xInitDescriptors2(SAB_PORT *priv, int listsize, int rbufsize)
908{
909	RING_DESCRIPTOR *desc;
910	RING_DESCRIPTOR *xdesc;
911
912	if(priv->dcontrol2.transmit != NULL)
913
914	{
915		if(priv->dcontrol2.receive != NULL)
916		{
917			return 0;
918		}
919		return -1;
920	}
921	else if(priv->dcontrol2.receive != NULL)
922	{
923		return -1;
924	}
925
926	priv->dcontrol2.transmit = (RING_DESCRIPTOR*)
927		kmalloc(sizeof(RING_DESCRIPTOR) * listsize, GFP_KERNEL);
928	/* dcontrol2 is an historical
929	   artifact from when the code
930	   talked to an intelligent controller */
931	if(priv->dcontrol2.transmit == NULL)
932	{
933		return -1;
934	}
935
936	priv->dcontrol2.receive = (RING_DESCRIPTOR*)
937		kmalloc(sizeof(RING_DESCRIPTOR), GFP_KERNEL); /* only one receive sk_buffer */
938	if(priv->dcontrol2.receive == NULL)
939	{
940		kfree(priv->dcontrol2.transmit);
941		priv->dcontrol2.transmit = NULL;
942		return -1;
943	}
944
945	for(xdesc = priv->dcontrol2.transmit;
946	    xdesc < &priv->dcontrol2.transmit[listsize - 1];
947	    xdesc = &xdesc[1])	/* set up transmit descriptors */
948	{
949		xdesc->HostVaddr = NULL;
950		xdesc->VNext = &xdesc[1];
951		xdesc->Count = 0 | OWN_DRIVER;
952		xdesc->crc = 0;
953		xdesc->sendcrc = 0;
954		xdesc->crcindex = 0;
955	}
956	xdesc->HostVaddr = NULL;
957	xdesc->VNext = priv->dcontrol2.transmit; /* circular list */
958	xdesc->Count = 0 | OWN_DRIVER;
959	xdesc->crc = 0;
960	xdesc->sendcrc = 0;
961	xdesc->crcindex = 0;
962
963	desc = priv->dcontrol2.receive; /* only need one descriptor for receive */
964	desc->HostVaddr = NULL;
965	desc->VNext = &desc[0];
966
967	desc = priv->dcontrol2.receive;
968	desc->HostVaddr = dev_alloc_skb(rbufsize);
969	if(desc->HostVaddr == NULL)
970	{
971		printk(KERN_ALERT "Unable to allocate skb_buffers (rx 0).\n");
972		printk(KERN_ALERT "Driver initialization failed.\n");
973		kfree(priv->dcontrol2.transmit);
974		kfree(priv->dcontrol2.receive);
975		priv->dcontrol2.transmit = NULL; /* get rid of descriptor ring */
976		priv->dcontrol2.receive = NULL; /* get rid of descriptor */
977		/* probably should do some deallocation of sk_buffs*/
978		/* but will take place in the open */
979		return -1;
980	}
981	skb_queue_head(priv->sab8253xbuflist, (struct sk_buff*) desc->HostVaddr);
982	desc->Count = rbufsize|OWN_SAB;	/* belongs to int handler */
983	desc->crc = 0;
984	desc->sendcrc = 0;
985	desc->crcindex = 0;
986
987	/* setup the various pointers */
988	priv->active2 = priv->dcontrol2; /* insert new skbuff */
989	priv->sabnext2 = priv->dcontrol2; /* transmit from here */
990
991	return 0;
992}
993
994/* loads program, waits for PPC */
995/* and completes initialization*/
996
997void Sab8253xCleanUpTransceiveN(SAB_PORT* priv)
998{
999	Sab8253xFreeAllFreeListSKBUFFS(priv);
1000	Sab8253xFreeAllReceiveListSKBUFFS(priv);
1001
1002	/* these are also cleaned up in the module cleanup routine */
1003	/* should probably only be done here */
1004	if(priv->dcontrol2.receive)
1005	{
1006		kfree(priv->dcontrol2.receive);
1007		priv->dcontrol2.receive = NULL;
1008	}
1009	if(priv->dcontrol2.transmit)
1010	{
1011		kfree(priv->dcontrol2.transmit);
1012		priv->dcontrol2.transmit = NULL;
1013	}
1014	priv->active2 = priv->dcontrol2;
1015	priv->sabnext2 = priv->dcontrol2;
1016}
1017
1018void Sab8253xFreeAllReceiveListSKBUFFS(SAB_PORT* priv) /* empty the skbuffer list */
1019/* either on failed open */
1020/* or on close*/
1021{
1022	struct sk_buff* skb;
1023
1024	if(priv->sab8253xc_rcvbuflist == NULL)
1025	{
1026		return;
1027	}
1028
1029	DEBUGPRINT((KERN_ALERT "sab8253x: freeing %i skbuffs.\n",
1030		    skb_queue_len(priv->sab8253xc_rcvbuflist)));
1031
1032	while(skb_queue_len(priv->sab8253xc_rcvbuflist) > 0)
1033	{
1034		skb = skb_dequeue(priv->sab8253xc_rcvbuflist);
1035		dev_kfree_skb_any(skb);
1036	}
1037	kfree(priv->sab8253xc_rcvbuflist);
1038	priv->sab8253xc_rcvbuflist = NULL;
1039}
1040
1041/*
1042 * This routine is called to set the UART divisor registers to match
1043 * the specified baud rate for a serial port.
1044 */
1045
1046void sab8253x_change_speedN(struct sab_port *port)
1047{
1048	unsigned long	flags;
1049	unsigned char ccr2=0, ccr4=0, ebrg=0;
1050	int bits = 8;
1051
1052#ifdef DEBUGGING
1053	printk("Change speed!  ");
1054#endif
1055
1056	if(!sab8253x_baud(port, (port->baud)*2, &ebrg, &ccr2, &ccr4, &(port->baud)))
1057	{
1058		printk("Aurora Warning. baudrate %ld could not be set! Using 115200", port->baud);
1059		port->baud = 115200;
1060		sab8253x_baud(port, (port->baud*2), &ebrg, &ccr2, &ccr4, &(port->baud));
1061	}
1062
1063	if (port->baud)
1064	{
1065		port->timeout = (port->xmit_fifo_size * HZ * bits) / port->baud;
1066		port->cec_timeout = port->tec_timeout >> 2;
1067	}
1068	else
1069	{
1070		port->timeout = 0;
1071		port->cec_timeout = SAB8253X_MAX_CEC_DELAY;
1072	}
1073	port->timeout += HZ / 50;		/* Add .02 seconds of slop */
1074
1075	save_flags(flags);
1076	cli();
1077	sab8253x_cec_wait(port);
1078
1079	WRITEB(port, bgr, ebrg);
1080	WRITEB(port, ccr2, READB(port, ccr2) & ~(0xc0)); /* clear out current baud rage */
1081	WRITEB(port, ccr2, READB(port, ccr2) | ccr2);
1082	WRITEB(port, ccr4, (READB(port,ccr4) & ~SAB82532_CCR4_EBRG) | ccr4);
1083
1084	if (port->flags & FLAG8253X_CTS_FLOW)
1085	{
1086		WRITEB(port, mode, READB(port,mode) & ~(SAB82532_MODE_RTS));
1087		port->interrupt_mask1 &= ~(SAB82532_IMR1_CSC);
1088		WRITEB(port, imr1, port->interrupt_mask1);
1089	}
1090	else
1091	{
1092		WRITEB(port, mode, READB(port,mode) | SAB82532_MODE_RTS);
1093		port->interrupt_mask1 |= SAB82532_IMR1_CSC;
1094		WRITEB(port, imr1, port->interrupt_mask1);
1095	}
1096	WRITEB(port, mode, READB(port, mode) | SAB82532_MODE_RAC);
1097	restore_flags(flags);
1098}
1099
1100void sab8253x_shutdownN(struct sab_port *port)
1101{
1102	unsigned long flags;
1103
1104	if (!(port->flags & FLAG8253X_INITIALIZED))
1105	{
1106		return;
1107	}
1108
1109	save_flags(flags); cli(); /* Disable interrupts */
1110
1111	/*
1112	 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1113	 * here so the queue might never be waken up
1114	 */
1115	wake_up_interruptible(&port->delta_msr_wait);
1116
1117	/* Disable Interrupts */
1118
1119	port->interrupt_mask0 = 0xff;
1120	WRITEB(port, imr0, port->interrupt_mask0);
1121	port->interrupt_mask1 = 0xff;
1122	WRITEB(port, imr1, port->interrupt_mask1);
1123
1124	LOWER(port,rts);
1125	LOWER(port,dtr);
1126
1127	/* Disable Receiver */
1128	CLEAR_REG_BIT(port,mode,SAB82532_MODE_RAC);
1129
1130	/* Power Down */
1131	CLEAR_REG_BIT(port,ccr0,SAB82532_CCR0_PU);
1132
1133	port->flags &= ~FLAG8253X_INITIALIZED;
1134	restore_flags(flags);
1135}
1136
1137int sab8253x_block_til_ready(struct tty_struct *tty, struct file * filp,
1138			     struct sab_port *port)
1139{
1140	DECLARE_WAITQUEUE(wait, current);
1141	int retval;
1142	int do_clocal = 0;
1143	unsigned long flags;
1144
1145	/*
1146	 * If the device is in the middle of being closed, then block
1147	 * until it's done, and then try again.
1148	 */
1149	if (tty_hung_up_p(filp) ||
1150	    (port->flags & FLAG8253X_CLOSING))
1151	{
1152		if (port->flags & FLAG8253X_CLOSING)
1153		{
1154			interruptible_sleep_on(&port->close_wait); /* finish up previous close */
1155		}
1156#ifdef SERIAL_DO_RESTART
1157		if (port->flags & FLAG8253X_HUP_NOTIFY)
1158		{
1159			return -EAGAIN;
1160		}
1161		else
1162		{
1163			return -ERESTARTSYS;
1164		}
1165#else
1166		return -EAGAIN;
1167#endif
1168	}
1169
1170	/*
1171	 * If this is a callout device, then just make sure the normal
1172	 * device isn't being used.
1173	 */
1174	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT)
1175	{
1176		if (port->flags & FLAG8253X_NORMAL_ACTIVE)
1177		{
1178			return -EBUSY;	/* async, sync tty or network driver active */
1179		}
1180		if ((port->flags & FLAG8253X_CALLOUT_ACTIVE) &&
1181		    (port->flags & FLAG8253X_SESSION_LOCKOUT) &&
1182		    (port->session != current->session))
1183		{
1184			return -EBUSY;
1185		}
1186		if ((port->flags & FLAG8253X_CALLOUT_ACTIVE) &&
1187		    (port->flags & FLAG8253X_PGRP_LOCKOUT) &&
1188		    (port->pgrp != current->pgrp))
1189		{
1190			return -EBUSY;
1191		}
1192		port->flags |= FLAG8253X_CALLOUT_ACTIVE; /* doing a callout */
1193		return 0;
1194	}
1195
1196	/* sort out async vs sync tty, not call out */
1197	/*
1198	 * If non-blocking mode is set, or the port is not enabled,
1199	 * then make the check up front and then exit.
1200	 */
1201
1202	if ((filp->f_flags & O_NONBLOCK) ||
1203	    (tty->flags & (1 << TTY_IO_ERROR)))
1204	{
1205		if (port->flags & FLAG8253X_CALLOUT_ACTIVE)
1206		{
1207			return -EBUSY;
1208		}
1209		port->flags |= FLAG8253X_NORMAL_ACTIVE;
1210		return 0;
1211	}
1212
1213	if (port->flags & FLAG8253X_CALLOUT_ACTIVE)
1214	{
1215		if (port->normal_termios.c_cflag & CLOCAL)
1216		{
1217			do_clocal = 1;
1218		}
1219	}
1220	else if (tty->termios->c_cflag & CLOCAL)
1221	{
1222		do_clocal = 1;
1223	}
1224
1225	/*
1226	 * Block waiting for the carrier detect and the line to become
1227	 * free (i.e., not in use by the callout).  While we are in
1228	 * this loop, port->count is dropped by one, so that
1229	 * sab8253x_close() knows when to free things.  We restore it upon
1230	 * exit, either normal or abnormal.
1231	 */
1232
1233	/* The port decrement logic is probably */
1234	/* broken -- hence if def'd out -- it does*/
1235	retval = 0;
1236	add_wait_queue(&port->open_wait, &wait); /* starts the wait but does not block here */
1237	port->blocked_open++;
1238	while (1)
1239	{
1240		save_flags(flags);
1241		cli();
1242		if (!(port->flags & FLAG8253X_CALLOUT_ACTIVE) &&
1243		    (tty->termios->c_cflag & CBAUD))
1244		{
1245			RAISE(port, dtr);
1246			RAISE(port, rts);	/* maybe not correct for sync */
1247			/*
1248			 * ??? Why changing the mode here?
1249			 *  port->regs->rw.mode |= SAB82532_MODE_FRTS;
1250			 *  port->regs->rw.mode &= ~(SAB82532_MODE_RTS);
1251			 */
1252		}
1253		restore_flags(flags);
1254		current->state = TASK_INTERRUPTIBLE;
1255		if (tty_hung_up_p(filp) ||
1256		    !(port->flags & FLAG8253X_INITIALIZED))
1257		{
1258#ifdef SERIAL_DO_RESTART
1259			if (port->flags & FLAG8253X_HUP_NOTIFY)
1260			{
1261				retval = -EAGAIN;
1262			}
1263			else
1264			{
1265				retval = -ERESTARTSYS;
1266			}
1267#else
1268			retval = -EAGAIN;
1269#endif
1270			break;
1271		}
1272		if (!(port->flags & FLAG8253X_CALLOUT_ACTIVE) &&
1273		    !(port->flags & FLAG8253X_CLOSING) &&
1274		    (do_clocal || ISON(port,dcd)))
1275		{
1276			break;
1277		}
1278#ifdef DEBUG_OPEN
1279		printk("sab8253x_block_til_ready:2 flags = 0x%x\n",port->flags);
1280#endif
1281		if (signal_pending(current))
1282		{
1283			retval = -ERESTARTSYS;
1284			break;
1285		}
1286#ifdef DEBUG_OPEN
1287		printk("sab8253x_block_til_ready blocking: ttyS%d, count = %d, flags = %x, clocal = %d, vstr = %02x\n",
1288		       port->line, port->count, port->flags, do_clocal, READB(port,vstr));
1289#endif
1290		schedule();
1291	}
1292	current->state = TASK_RUNNING;
1293	remove_wait_queue(&port->open_wait, &wait);
1294	port->blocked_open--;
1295#ifdef DEBUG_OPEN
1296	printk("sab8253x_block_til_ready after blocking: ttys%d, count = %d\n",
1297	       port->line, port->count);
1298#endif
1299	if (retval)
1300	{
1301		return retval;
1302	}
1303	port->flags |= FLAG8253X_NORMAL_ACTIVE;
1304	return 0;
1305}
1306
1307/*
1308 * sab8253x_wait_until_sent() --- wait until the transmitter is empty
1309 */
1310void sab8253x_wait_until_sent(struct tty_struct *tty, int timeout)
1311{
1312	struct sab_port *port = (struct sab_port *)tty->driver_data;
1313	unsigned long orig_jiffies, char_time;
1314
1315	if (sab8253x_serial_paranoia_check(port,tty->device,"sab8253x_wait_until_sent"))
1316	{
1317		return;
1318	}
1319
1320	orig_jiffies = jiffies;
1321	/*
1322	 * Set the check interval to be 1/5 of the estimated time to
1323	 * send a single character, and make it at least 1.  The check
1324	 * interval should also be less than the timeout.
1325	 *
1326	 * Note: we have to use pretty tight timings here to satisfy
1327	 * the NIST-PCTS.
1328	 */
1329	char_time = (port->timeout - HZ/50) / port->xmit_fifo_size;
1330	char_time = char_time / 5;
1331	if (char_time == 0)
1332	{
1333		char_time = 1;
1334	}
1335	if (timeout)
1336	{
1337		char_time = MIN(char_time, timeout);
1338	}
1339	while ((Sab8253xCountTransmit(port) > 0) || !port->all_sent)
1340	{
1341		current->state = TASK_INTERRUPTIBLE;
1342		schedule_timeout(char_time);
1343		if (signal_pending(current))
1344		{
1345			break;
1346		}
1347		if (timeout && time_after(jiffies, orig_jiffies + timeout))
1348		{
1349			break;
1350		}
1351	}
1352}
1353
1354void sab8253x_flush_buffer(struct tty_struct *tty)
1355{
1356	struct sab_port *port = (struct sab_port *)tty->driver_data;
1357	unsigned long flags;
1358	register RING_DESCRIPTOR *freeme;
1359
1360	if(sab8253x_serial_paranoia_check(port, tty->device, "sab8253x_flush_buffer"))
1361	{
1362		return;
1363	}
1364
1365	if(port->sabnext2.transmit == NULL)
1366	{
1367		return;
1368	}
1369
1370	save_flags(flags);
1371	cli();			/* need to turn off ints because mucking
1372				   with sabnext2 */
1373#ifndef FREEININTERRUPT
1374	freeme = port->active2.transmit;
1375	do				/* just go all around */
1376	{
1377		if(freeme->HostVaddr)
1378		{
1379			skb_unlink((struct sk_buff*)freeme->HostVaddr);
1380			dev_kfree_skb_any((struct sk_buff*)freeme->HostVaddr);
1381			freeme->HostVaddr = NULL;
1382		}
1383		freeme->sendcrc = 0;
1384		freeme->crcindex = 0;
1385		freeme->Count = OWN_DRIVER;
1386		freeme = (RING_DESCRIPTOR*) freeme->VNext;
1387	}
1388	while(freeme != port->active2.transmit);
1389#else  /* buffers only from sabnext2.transmit to active2.transmit */
1390	while((port->sabnext2.transmit->Count & OWNER) == OWN_SAB) /* clear out stuff waiting to be transmitted */
1391	{
1392		freeme = port->sabnext2.transmit;
1393		if(freeme->HostVaddr)
1394		{
1395			skb_unlink((struct sk_buff*)freeme->HostVaddr);
1396			dev_kfree_skb_any((struct sk_buff*)freeme->HostVaddr);
1397			freeme->HostVaddr = NULL;
1398		}
1399		freeme->sendcrc = 0;
1400		freeme->crcindex = 0;
1401		freeme->Count = OWN_DRIVER;
1402		port->sabnext2.transmit = freeme->VNext;
1403	}
1404#endif
1405	port->sabnext2.transmit = port->active2.transmit; /* should already be equal to be sure */
1406	sab8253x_cec_wait(port);
1407	WRITEB(port,cmdr,SAB82532_CMDR_XRES);
1408	restore_flags(flags);
1409
1410	wake_up_interruptible(&tty->write_wait); /* wake up tty driver */
1411	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1412	    tty->ldisc.write_wakeup)
1413	{
1414		(*tty->ldisc.write_wakeup)(tty);
1415	}
1416}
1417
1418