1/* -*- linux-c -*- */
2/*
3 * Copyright (C) 2001 By Joachim Martillo, Telford Tools, Inc.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 **/
11
12/* These structures and symbols are less related to the ESCC2s and ESCC8s per se and more to */
13/* the architecture of Aurora cards or to the logic of the driver */
14
15#ifndef _ATICNTRL_H_
16#define _ATICNTRL_H_
17
18#include <linux/ioport.h>
19#include <linux/pci.h>
20#include <linux/netdevice.h>
21#include <linux/autoconf.h>
22#include <asm/page.h>
23#include "Reg9050.h"
24#include "8253x.h"
25
26#define FALSE	0
27#define TRUE	1
28
29#define NUMINTS 32
30
31/* The following are suggested by serial.h -- all not currently used */
32#define FLAG8253X_HUP_NOTIFY	0x0001 /* Notify getty on hangups and closes
33					  on the callout port */
34#define FLAG8253X_FOURPORT	0x0002 /* Set OU1, OUT2 per AST Fourport settings */
35#define FLAG8253X_SAK		0x0004 /* Secure Attention Key (Orange book) */
36#define FLAG8253X_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
37#define FLAG8253X_SPD_MASK	0x1030
38#define FLAG8253X_SPD_HI	0x0010	/* Use 56000 instead of 38400 bps */
39#define FLAG8253X_SPD_VHI	0x0020  /* Use 115200 instead of 38400 bps */
40#define FLAG8253X_SPD_CUST	0x0030  /* Use user-specified divisor */
41#define FLAG8253X_SKIP_TEST	0x0040 /* Skip UART test during autoconfiguration */
42#define FLAG8253X_AUTO_IRQ	0x0080 /* Do automatic IRQ during autoconfiguration */
43
44#define FLAG8253X_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
45#define FLAG8253X_PGRP_LOCKOUT    0x0200 /* Lock out cua opens based on pgrp */
46#define FLAG8253X_CALLOUT_NOHUP   0x0400 /* Don't do hangups for cua device */
47
48#define FLAG8253X_HARDPPS_CD	0x0800	/* Call hardpps when CD goes high  */
49#define FLAG8253X_SPD_SHI	0x1000	/* Use 230400 instead of 38400 bps */
50#define FLAG8253X_SPD_WARP	0x1010	/* Use 460800 instead of 38400 bps */
51
52#define FLAG8253X_LOW_LATENCY	0x2000 /* Request low latency behaviour */
53
54#define FLAG8253X_BUGGY_UART	0x4000 /* This is a buggy UART, skip some safety
55					* checks.  Note: can be dangerous! */
56
57#define FLAG8253X_AUTOPROBE	0x8000 /* Port was autoprobed by PCI or PNP code */
58
59#define FLAG8253X_FLAGS		0x7FFF	/* Possible legal async flags */
60#define FLAG8253X_USR_MASK	0x3430	/* Legal flags that non-privileged
61					 * users can set or reset */
62
63/* Internal flags used only by the 8253x driver */
64#define FLAG8253X_INITIALIZED	0x80000000 /* Serial port was initialized */
65#define FLAG8253X_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
66#define FLAG8253X_NORMAL_ACTIVE	0x20000000 /* Normal device is active */
67#define FLAG8253X_BOOT_AUTOCONF	0x10000000 /* Autoconfigure port on bootup */
68#define FLAG8253X_CLOSING	0x08000000 /* Serial port is closing */
69#define FLAG8253X_CTS_FLOW	0x04000000 /* Do CTS flow control */
70#define FLAG8253X_CHECK_CD	0x02000000 /* i.e., CLOCAL */
71#define FLAG8253X_NETWORK	0x01000000 /* the logic of callout
72					    * and reconnect works differently
73					    * for network ports*/
74
75#define FLAG8253X_CONS_FLOW	0x00800000 /* flow control for console  */
76
77#define FLAG8253X_INTERNAL_FLAGS 0xFF800000 /* Internal flags */
78
79#define SAB8253X_CLOSING_WAIT_INF	0
80#define SAB8253X_CLOSING_WAIT_NONE	65535
81
82#define SAB8253X_EVENT_WRITE_WAKEUP 0
83
84typedef struct AuraXX20params
85{
86	unsigned debug;		/* lots of kernel warnings */
87	unsigned listsize;		/* size of descriptor list */
88} AURAXX20PARAMS;
89
90/* initialization functions */
91extern unsigned int
92plx9050_eprom_read(unsigned int* eprom_ctl, unsigned short *ptr, unsigned char addr, unsigned short len);
93extern unsigned int
94plx9050_eprom_cmd(unsigned int* eprom_ctl, unsigned char cmd, unsigned char addr, unsigned short data);
95extern void dump_ati_adapter_registers(unsigned int *addr, int len);
96
97/* common routine */
98extern void sab8253x_interrupt(int irq, void *dev_id, struct pt_regs *regs);
99
100/* net device functions */
101extern int Sab8253xInitDescriptors2(SAB_PORT *priv, int listsize, int rbufsize);
102extern int sab8253xn_init(struct net_device *dev); /* called by registration */
103extern int sab8253xn_write2(struct sk_buff *skb, struct net_device *dev);
104				/* hard_start_xmit */
105extern int sab8253xn_ioctl(struct net_device *dev, struct ifreq *ifr,
106			   int cmd);
107				/* interrupt handler */
108extern void sab8253xn_handler2(int irq, void *devidp, struct pt_regs* ptregsp);
109extern int sab8253xn_open(struct net_device *dev);
110extern int sab8253xn_release(struct net_device *dev);	/* stop */
111extern struct net_device_stats *sab8253xn_stats(struct net_device *dev);
112
113extern struct net_device *Sab8253xRoot;
114extern struct net_device auraXX20n_prototype;
115extern SAB_PORT *current_sab_port;
116extern int sab8253xn_listsize;
117extern int sab8253xn_rbufsize;
118extern int sab8253xt_listsize;
119extern int sab8253xt_rbufsize;
120extern int sab8253xs_listsize;
121extern int sab8253xs_rbufsize;
122extern int sab8253xc_listsize;
123extern int sab8253xc_rbufsize;
124
125/* character device functions */
126
127extern int
128sab8253xc_read(struct file *filep, char *cptr, size_t cnt, loff_t *loffp);
129extern int sab8253xc_write(struct file *filep, const char *cptr, size_t cnt, loff_t *loffp);
130extern int sab8253xc_open(struct inode *inodep, struct file *filep);
131extern int sab8253xc_release(struct inode *inodep, struct file *filep);
132extern unsigned int sab8253xc_poll(struct file *, struct poll_table_struct *);
133extern int sab8253xc_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
134extern int sab8253xc_fasync(int, struct file *, int);
135
136/* number of characters left in xmit buffer before we ask for more */
137#define WAKEUP_CHARS 256
138
139#define SERIAL_PARANOIA_CHECK
140#define SERIAL_DO_RESTART
141
142/* sync tty functions */
143
144/* general macros */
145#define DEBUGPRINT(arg) if(DRIVER_DEBUG()) printk arg
146#define	MIN(a,b) (((a)<(b))?(a):(b))
147#define	MAX(a,b) (((a)>(b))?(a):(b))
148
149extern AURAXX20PARAMS AuraXX20DriverParams;
150#define DRIVER_DEBUG() (AuraXX20DriverParams.debug)
151#define DRIVER_LISTSIZE() (AuraXX20DriverParams.listsize)
152#define XSETDRIVER_LISTSIZE(arg) (AuraXX20DriverParams.listsize = (arg))
153
154#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
155#define	net_device_stats enet_statistics
156#define net_device device
157#define pci_base_address(p, n)  (p)->base_address[n]
158#define dev_kfree_skb_irq(s) dev_kfree_skb((s))
159#define dev_kfree_skb_any(s) dev_kfree_skb((s))
160#else  /* LINUX_VERSION_CODE */
161#define NETSTATS_VER2
162#define pci_base_address(p, n) pci_resource_start((p), (n))
163#endif /* LINUX_VERSION_CODE */
164
165				/* The sample LINUX driver */
166				/* uses these no reason not */
167				/* to be more dynamic.*/
168
169/* Below are things that should be placed in <linux/pci_ids.h> */
170#ifndef PCI_VENDOR_ID_AURORATECH
171#define PCI_VENDOR_ID_AURORATECH 0x125c
172                                  /* Saturn and Apollo boards */
173#define PCI_DEVICE_ID_AURORATECH_MULTI   0x0101
174                                  /* WAN/LAN Multiservers */
175#define PCI_DEVICE_ID_AURORATECH_WANMS   0x0102
176                                  /* Comnpact PCI boards */
177#define PCI_DEVICE_ID_AURORATECH_CPCI    0x0103
178#endif /* PCI_VENDOR_ID_AURORATECH */
179
180extern int sab8253x_vendor_id;
181extern int sab8253x_cpci_device_id;
182extern int sab8253x_wmcs_device_id;
183extern int sab8253x_mpac_device_id;
184
185#define PCIMEMVALIDMULTI	((sab8253x_vendor_id << 16) | sab8253x_mpac_device_id)
186#define PCIMEMVALIDCPCI		((sab8253x_vendor_id << 16) | sab8253x_cpci_device_id)
187#define PCIMEMVALIDWMCS		(sab8253x_vendor_id | (sab8253x_wmcs_device_id << 16))
188
189/*
190 * Some values defining boards
191 *
192 * First 1, 2, 4 and 8 ports Multiports
193 */
194
195#define AURORA_8X20_CHIP_NPORTS      8
196#define AURORA_4X20_CHIP_NPORTS      2 /* uses two ESCC2s */
197#define AURORA_2X20_CHIP_NPORTS      2
198#define AURORA_1X20_CHIP_NPORTS      1
199
200				/* sizes of PLX9050 address space */
201#define AURORA_4X20_SIZE		0x800
202#define AURORA_4X20_CHIP_OFFSET           0x400
203#define AURORA_8X20_SIZE		0x200
204#define AURORA_8X20_CHIP_OFFSET           0x0
205#define AURORA_2X20_SIZE		0x80 /* This looks wrong probably las0 size */
206#define AURORA_2X20_CHIP_OFFSET           0x0
207
208#define AURORA_MULTI_1PORTBIT		PLX_CTRL_USERIO3DATA
209#define AURORA_MULTI_SYNCBIT		PLX_CTRL_USERIO3DIR
210
211#define AURORA_MULTI_CLKSPEED	((unsigned long) 29491200) /* 29.4912 MHz */
212#define SUN_SE_CLKSPEED	        ((unsigned long) 29491200) /* 29.4912 MHz */
213
214/*
215 * Per-CIM structure
216 */
217
218#define CIM_SEPLEN	128	/* serial EPROM length on a CIM */
219#define CIM_REVLEN	17
220#define CIM_SNLEN	17
221#define CIM_MFGLOCLEN	17
222#define CIM_MFGDATELEN	33
223
224/* CIM types: */
225#define CIM_UNKNOWN	0
226#define CIM_RS232	1	/* RS-232 only CIM */
227#define CIM_SP502	2	/* SP502 multi-mode CIM */
228
229/* CIM flags: */
230#define CIM_SYNC	0x0000001	/* sync allowed */
231#define CIM_PROTOTYPE	0x0000002	/* prototype */
232#define CIM_LAST	0x0000100	/* the last CIM */
233
234typedef struct aura_cim
235{
236	int			ci_type;	/* CIM type */
237	unsigned long	 	ci_flags;	/* CIM flags */
238	int			ci_num;	/* the canonical number of this CIM */
239	int			ci_port0lbl;	/* what's the label on port 0 */
240	unsigned int	 	ci_nports;	/* the number of ports on this CIM */
241	struct sab_board	*ci_board;	/* pointer back to the board */
242	struct sab_chip		*ci_chipbase;	/* first chip */
243	struct sab_port		*ci_portbase;	/* first port */
244	unsigned long	 	ci_clkspeed;	/* the clock speed */
245	unsigned int		ci_clkspdsrc;
246	int			ci_spdgrd;	/* chip speed grade */
247	unsigned int		ci_spdgrdsrc;
248	unsigned char	 	ci_sep[CIM_SEPLEN];
249	unsigned char	 	ci_rev[CIM_REVLEN];	/* revision information */
250	unsigned char	 	ci_sn[CIM_SNLEN];	/* serial number */
251	unsigned char	 	ci_mfgdate[CIM_MFGDATELEN];
252	unsigned char	 	ci_mfgloc[CIM_MFGLOCLEN];
253	struct aura_cim		*next;
254	struct aura_cim		*next_by_mcs;
255} aura_cim_t, AURA_CIM;
256
257/*
258 * Board structure
259 */
260
261typedef struct sab_board
262{
263	struct sab_board 	*nextboard;
264	struct sab_board	*next_on_interrupt;
265
266	struct sab_chip		*board_chipbase;	/* chip list for this board */
267	struct sab_port		*board_portbase;	/* port list for this board */
268	unsigned int		board_number;
269
270#define BD_1020P	1
271#define BD_1520P	2
272#define BD_2020P	3
273#define BD_2520P	4
274#define BD_4020P	5
275#define BD_4520P	6
276#define BD_8020P	7
277#define BD_8520P	8
278#define BD_SUNSE	9	/* Sun's built-in 82532 -- not supported by this driver*/
279#define BD_WANMCS	10
280#define BD_1020CP	11	/* CPCI start here */
281#define BD_1520CP	12
282#define BD_2020CP	13
283#define BD_2520CP	14
284#define BD_4020CP	15
285#define BD_4520CP	16
286#define BD_8020CP	17
287#define BD_8520CP	18
288#define BD_ISCPCI(x)	((x) == BD_1020CP || (x) == BD_1520CP		\
289			 || (x) == BD_2020CP || (x) == BD_2520CP	\
290			 || (x) == BD_4020CP || (x) == BD_4520CP	\
291			 || (x) == BD_8020CP || (x) == BD_8520CP)
292
293	unsigned char		b_type;
294	unsigned char		b_nchips;	/* num chips for this board */
295	unsigned char		b_nports;	/* num ports for this board */
296	unsigned char		b_flags;	/* flags: */
297#define BD_SYNC		0x01	/* sync is allowed on this board */
298#define BD_INTRHI	0x02	/* intr is hi level (SPARC only) */
299	struct pci_dev      	b_dev;         /* what does PCI knows about us */
300	int                  	b_irq;           /* For faster access */
301	unsigned char		*b_chipregbase;	/* chip register io */
302	long		 	b_clkspeed;	/* the clock speed */
303	int			b_spdgrd;	/* chip speed grade */
304	unsigned short		b_intrmask;	/* wanmcs interrupt mask */
305	unsigned char*		virtbaseaddress0;
306	unsigned int		length0;
307	unsigned char*		virtbaseaddress1;
308	unsigned int		length1;
309	unsigned char*		virtbaseaddress2;
310	unsigned int		length2;
311	unsigned char*		virtbaseaddress3;
312	unsigned int		length3;
313
314  /*
315   * Pointer to hardware-specific electrical interface code.  This
316   *  routine will set the electrical interface to whatever is in
317   *  the given interface/txena pair.
318   * Returns 0 if it could not set the value, non-zero otherwise.
319   */
320	int			(*b_setif)(struct sab_port *line,
321					   int interface, int txena);
322	/*
323	 * hardware mapping
324	 */
325	unsigned int	 	b_eprom[64];	/* serial EPROM contents */
326	AURA_CIM		*b_cimbase;	/* CIM information */
327	PLX9050		*b_bridge;	/* PCI bridge ctlr. regs. */
328} sab_board_t, SAB_BOARD;	/* really hate the _t convention */
329
330#define SEPROM 1		/* driver got clock speed from SEPROM */
331
332#define SAB8253X_XMIT_SIZE PAGE_SIZE
333
334extern char *aura_functionality[];
335
336#endif /* _ATICNTRL_H_ */
337
338