1/******************************************************************************* 2 3 4 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 2 of the License, or (at your option) 9 any later version. 10 11 This program is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 more details. 15 16 You should have received a copy of the GNU General Public License along with 17 this program; if not, write to the Free Software Foundation, Inc., 59 18 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 20 The full GNU General Public License is included in this distribution in the 21 file called LICENSE. 22 23 Contact Information: 24 Linux NICS <linux.nics@intel.com> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29 30/* glue for the OS independant part of e1000 31 * includes register access macros 32 */ 33 34#ifndef _E1000_OSDEP_H_ 35#define _E1000_OSDEP_H_ 36 37#include <linux/types.h> 38#include <linux/pci.h> 39#include <linux/delay.h> 40#include <asm/io.h> 41#include <linux/interrupt.h> 42#include <linux/sched.h> 43 44#ifndef msec_delay 45#define msec_delay(x) do { if(in_interrupt()) { \ 46 /* Don't mdelay in interrupt context! */ \ 47 BUG(); \ 48 } else { \ 49 set_current_state(TASK_UNINTERRUPTIBLE); \ 50 schedule_timeout((x * HZ)/1000); \ 51 } } while(0) 52#endif 53 54#define PCI_COMMAND_REGISTER PCI_COMMAND 55#define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE 56 57typedef enum { 58 FALSE = 0, 59 TRUE = 1 60} boolean_t; 61 62#define ASSERT(x) if(!(x)) BUG() 63#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B) 64 65#if DBG 66#define DEBUGOUT(S) printk(KERN_DEBUG S "\n") 67#define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) 68#else 69#define DEBUGOUT(S) 70#define DEBUGOUT1(S, A...) 71#endif 72 73#define DEBUGFUNC(F) DEBUGOUT(F) 74#define DEBUGOUT2 DEBUGOUT1 75#define DEBUGOUT3 DEBUGOUT2 76#define DEBUGOUT7 DEBUGOUT3 77 78 79#define E1000_WRITE_REG(a, reg, value) ( \ 80 ((a)->mac_type >= e1000_82543) ? \ 81 (writel((value), ((a)->hw_addr + E1000_##reg))) : \ 82 (writel((value), ((a)->hw_addr + E1000_82542_##reg)))) 83 84#define E1000_READ_REG(a, reg) ( \ 85 ((a)->mac_type >= e1000_82543) ? \ 86 readl((a)->hw_addr + E1000_##reg) : \ 87 readl((a)->hw_addr + E1000_82542_##reg)) 88 89#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ 90 ((a)->mac_type >= e1000_82543) ? \ 91 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2))) : \ 92 writel((value), ((a)->hw_addr + E1000_82542_##reg + ((offset) << 2)))) 93 94#define E1000_READ_REG_ARRAY(a, reg, offset) ( \ 95 ((a)->mac_type >= e1000_82543) ? \ 96 readl((a)->hw_addr + E1000_##reg + ((offset) << 2)) : \ 97 readl((a)->hw_addr + E1000_82542_##reg + ((offset) << 2))) 98 99#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS) 100 101#endif /* _E1000_OSDEP_H_ */ 102