1/* 2 * linux/drivers/ide/icside.c 3 * 4 * Copyright (c) 1996,1997 Russell King. 5 * 6 * Changelog: 7 * 08-Jun-1996 RMK Created 8 * 12-Sep-1997 RMK Added interrupt enable/disable 9 * 17-Apr-1999 RMK Added support for V6 EASI 10 * 22-May-1999 RMK Added support for V6 DMA 11 */ 12 13#include <linux/config.h> 14#include <linux/string.h> 15#include <linux/module.h> 16#include <linux/ioport.h> 17#include <linux/slab.h> 18#include <linux/blkdev.h> 19#include <linux/errno.h> 20#include <linux/hdreg.h> 21#include <linux/ide.h> 22#include <linux/pci.h> 23#include <linux/init.h> 24 25#include <asm/dma.h> 26#include <asm/ecard.h> 27#include <asm/io.h> 28 29extern char *ide_xfer_verbose (byte xfer_rate); 30 31/* 32 * Maximum number of interfaces per card 33 */ 34#define MAX_IFS 2 35 36#define ICS_IDENT_OFFSET 0x8a0 37 38#define ICS_ARCIN_V5_INTRSTAT 0x000 39#define ICS_ARCIN_V5_INTROFFSET 0x001 40#define ICS_ARCIN_V5_IDEOFFSET 0xa00 41#define ICS_ARCIN_V5_IDEALTOFFSET 0xae0 42#define ICS_ARCIN_V5_IDESTEPPING 4 43 44#define ICS_ARCIN_V6_IDEOFFSET_1 0x800 45#define ICS_ARCIN_V6_INTROFFSET_1 0x880 46#define ICS_ARCIN_V6_INTRSTAT_1 0x8a4 47#define ICS_ARCIN_V6_IDEALTOFFSET_1 0x8e0 48#define ICS_ARCIN_V6_IDEOFFSET_2 0xc00 49#define ICS_ARCIN_V6_INTROFFSET_2 0xc80 50#define ICS_ARCIN_V6_INTRSTAT_2 0xca4 51#define ICS_ARCIN_V6_IDEALTOFFSET_2 0xce0 52#define ICS_ARCIN_V6_IDESTEPPING 4 53 54struct cardinfo { 55 unsigned int dataoffset; 56 unsigned int ctrloffset; 57 unsigned int stepping; 58}; 59 60static struct cardinfo icside_cardinfo_v5 = { 61 ICS_ARCIN_V5_IDEOFFSET, 62 ICS_ARCIN_V5_IDEALTOFFSET, 63 ICS_ARCIN_V5_IDESTEPPING 64}; 65 66static struct cardinfo icside_cardinfo_v6_1 = { 67 ICS_ARCIN_V6_IDEOFFSET_1, 68 ICS_ARCIN_V6_IDEALTOFFSET_1, 69 ICS_ARCIN_V6_IDESTEPPING 70}; 71 72static struct cardinfo icside_cardinfo_v6_2 = { 73 ICS_ARCIN_V6_IDEOFFSET_2, 74 ICS_ARCIN_V6_IDEALTOFFSET_2, 75 ICS_ARCIN_V6_IDESTEPPING 76}; 77 78static const card_ids icside_cids[] = { 79 { MANU_ICS, PROD_ICS_IDE }, 80 { MANU_ICS2, PROD_ICS2_IDE }, 81 { 0xffff, 0xffff } 82}; 83 84typedef enum { 85 ics_if_unknown, 86 ics_if_arcin_v5, 87 ics_if_arcin_v6 88} iftype_t; 89 90/* ---------------- Version 5 PCB Support Functions --------------------- */ 91/* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr) 92 * Purpose : enable interrupts from card 93 */ 94static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr) 95{ 96 unsigned int memc_port = (unsigned int)ec->irq_data; 97 outb (0, memc_port + ICS_ARCIN_V5_INTROFFSET); 98} 99 100/* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr) 101 * Purpose : disable interrupts from card 102 */ 103static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr) 104{ 105 unsigned int memc_port = (unsigned int)ec->irq_data; 106 inb (memc_port + ICS_ARCIN_V5_INTROFFSET); 107} 108 109static const expansioncard_ops_t icside_ops_arcin_v5 = { 110 icside_irqenable_arcin_v5, 111 icside_irqdisable_arcin_v5, 112 NULL, 113 NULL, 114 NULL, 115 NULL 116}; 117 118 119/* ---------------- Version 6 PCB Support Functions --------------------- */ 120/* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr) 121 * Purpose : enable interrupts from card 122 */ 123static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr) 124{ 125 unsigned int ide_base_port = (unsigned int)ec->irq_data; 126 127 outb (0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_1); 128 outb (0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_2); 129} 130 131/* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr) 132 * Purpose : disable interrupts from card 133 */ 134static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr) 135{ 136 unsigned int ide_base_port = (unsigned int)ec->irq_data; 137 138 inb (ide_base_port + ICS_ARCIN_V6_INTROFFSET_1); 139 inb (ide_base_port + ICS_ARCIN_V6_INTROFFSET_2); 140} 141 142/* Prototype: icside_irqprobe(struct expansion_card *ec) 143 * Purpose : detect an active interrupt from card 144 */ 145static int icside_irqpending_arcin_v6(struct expansion_card *ec) 146{ 147 unsigned int ide_base_port = (unsigned int)ec->irq_data; 148 149 return inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 || 150 inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_2) & 1; 151} 152 153static const expansioncard_ops_t icside_ops_arcin_v6 = { 154 icside_irqenable_arcin_v6, 155 icside_irqdisable_arcin_v6, 156 icside_irqpending_arcin_v6, 157 NULL, 158 NULL, 159 NULL 160}; 161 162/* Prototype: icside_identifyif (struct expansion_card *ec) 163 * Purpose : identify IDE interface type 164 * Notes : checks the description string 165 */ 166static iftype_t __init icside_identifyif (struct expansion_card *ec) 167{ 168 unsigned int addr; 169 iftype_t iftype; 170 int id = 0; 171 172 iftype = ics_if_unknown; 173 174 addr = ecard_address (ec, ECARD_IOC, ECARD_FAST) + ICS_IDENT_OFFSET; 175 176 id = inb (addr) & 1; 177 id |= (inb (addr + 1) & 1) << 1; 178 id |= (inb (addr + 2) & 1) << 2; 179 id |= (inb (addr + 3) & 1) << 3; 180 181 switch (id) { 182 case 0: /* A3IN */ 183 printk("icside: A3IN unsupported\n"); 184 break; 185 186 case 1: /* A3USER */ 187 printk("icside: A3USER unsupported\n"); 188 break; 189 190 case 3: /* ARCIN V6 */ 191 printk(KERN_DEBUG "icside: detected ARCIN V6 in slot %d\n", ec->slot_no); 192 iftype = ics_if_arcin_v6; 193 break; 194 195 case 15:/* ARCIN V5 (no id) */ 196 printk(KERN_DEBUG "icside: detected ARCIN V5 in slot %d\n", ec->slot_no); 197 iftype = ics_if_arcin_v5; 198 break; 199 200 default:/* we don't know - complain very loudly */ 201 printk("icside: ***********************************\n"); 202 printk("icside: *** UNKNOWN ICS INTERFACE id=%d ***\n", id); 203 printk("icside: ***********************************\n"); 204 printk("icside: please report this to linux@arm.linux.org.uk\n"); 205 printk("icside: defaulting to ARCIN V5\n"); 206 iftype = ics_if_arcin_v5; 207 break; 208 } 209 210 return iftype; 211} 212 213#ifdef CONFIG_BLK_DEV_IDEDMA_ICS 214/* 215 * SG-DMA support. 216 * 217 * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers. 218 * There is only one DMA controller per card, which means that only 219 * one drive can be accessed at one time. NOTE! We do not enforce that 220 * here, but we rely on the main IDE driver spotting that both 221 * interfaces use the same IRQ, which should guarantee this. 222 */ 223#define NR_ENTRIES 256 224#define TABLE_SIZE (NR_ENTRIES * 8) 225 226static int ide_build_sglist(ide_hwif_t *hwif, struct request *rq) 227{ 228 struct buffer_head *bh; 229 struct scatterlist *sg = hwif->sg_table; 230 int nents = 0; 231 232 if (rq->cmd == READ) 233 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE; 234 else 235 hwif->sg_dma_direction = PCI_DMA_TODEVICE; 236 bh = rq->bh; 237 do { 238 unsigned char *virt_addr = bh->b_data; 239 unsigned int size = bh->b_size; 240 241 while ((bh = bh->b_reqnext) != NULL) { 242 if ((virt_addr + size) != (unsigned char *)bh->b_data) 243 break; 244 size += bh->b_size; 245 } 246 memset(&sg[nents], 0, sizeof(*sg)); 247 sg[nents].address = virt_addr; 248 sg[nents].length = size; 249 nents++; 250 } while (bh != NULL); 251 252 return pci_map_sg(NULL, sg, nents, hwif->sg_dma_direction); 253} 254 255static int 256icside_build_dmatable(ide_drive_t *drive, int reading) 257{ 258 return HWIF(drive)->sg_nents = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq); 259} 260 261/* Teardown mappings after DMA has completed. */ 262static void icside_destroy_dmatable(ide_drive_t *drive) 263{ 264 struct scatterlist *sg = HWIF(drive)->sg_table; 265 int nents = HWIF(drive)->sg_nents; 266 267 pci_unmap_sg(NULL, sg, nents, HWIF(drive)->sg_dma_direction); 268} 269 270static int 271icside_config_if(ide_drive_t *drive, int xfer_mode) 272{ 273 int func = ide_dma_off; 274 275 switch (xfer_mode) { 276 case XFER_MW_DMA_2: 277 /* 278 * The cycle time is limited to 250ns by the r/w 279 * pulse width (90ns), however we should still 280 * have a maximum burst transfer rate of 8MB/s. 281 */ 282 drive->drive_data = 250; 283 break; 284 285 case XFER_MW_DMA_1: 286 drive->drive_data = 250; 287 break; 288 289 case XFER_MW_DMA_0: 290 drive->drive_data = 480; 291 break; 292 293 default: 294 drive->drive_data = 0; 295 break; 296 } 297 298 if (!drive->init_speed) 299 drive->init_speed = (byte) xfer_mode; 300 301 if (drive->drive_data && 302 ide_config_drive_speed(drive, (byte) xfer_mode) == 0) 303 func = ide_dma_on; 304 else 305 drive->drive_data = 480; 306 307 printk("%s: %s selected (peak %dMB/s)\n", drive->name, 308 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); 309 310 drive->current_speed = (byte) xfer_mode; 311 312 return func; 313} 314 315static int 316icside_set_speed(ide_drive_t *drive, byte speed) 317{ 318 return icside_config_if(drive, speed); 319} 320 321/* 322 * dma_intr() is the handler for disk read/write DMA interrupts 323 */ 324static ide_startstop_t icside_dmaintr(ide_drive_t *drive) 325{ 326 int i; 327 byte stat, dma_stat; 328 329 dma_stat = HWIF(drive)->dmaproc(ide_dma_end, drive); 330 stat = GET_STAT(); /* get drive status */ 331 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) { 332 if (!dma_stat) { 333 struct request *rq = HWGROUP(drive)->rq; 334 rq = HWGROUP(drive)->rq; 335 for (i = rq->nr_sectors; i > 0;) { 336 i -= rq->current_nr_sectors; 337 ide_end_request(1, HWGROUP(drive)); 338 } 339 return ide_stopped; 340 } 341 printk("%s: dma_intr: bad DMA status (dma_stat=%x)\n", 342 drive->name, dma_stat); 343 } 344 return ide_error(drive, "dma_intr", stat); 345} 346 347/* 348 * The following is a sick duplication from ide-dma.c ;( 349 * 350 * This should be defined in one place only. 351 */ 352struct drive_list_entry { 353 char * id_model; 354 char * id_firmware; 355}; 356 357static struct drive_list_entry drive_whitelist [] = { 358 { "Micropolis 2112A", "ALL" }, 359 { "CONNER CTMA 4000", "ALL" }, 360 { "CONNER CTT8000-A", "ALL" }, 361 { "ST34342A", "ALL" }, 362 { NULL, 0 } 363}; 364 365static struct drive_list_entry drive_blacklist [] = { 366 { "WDC AC11000H", "ALL" }, 367 { "WDC AC22100H", "ALL" }, 368 { "WDC AC32500H", "ALL" }, 369 { "WDC AC33100H", "ALL" }, 370 { "WDC AC31600H", "ALL" }, 371 { "WDC AC32100H", "24.09P07" }, 372 { "WDC AC23200L", "21.10N21" }, 373 { "Compaq CRD-8241B", "ALL" }, 374 { "CRD-8400B", "ALL" }, 375 { "CRD-8480B", "ALL" }, 376 { "CRD-8480C", "ALL" }, 377 { "CRD-8482B", "ALL" }, 378 { "CRD-84", "ALL" }, 379 { "SanDisk SDP3B", "ALL" }, 380 { "SanDisk SDP3B-64", "ALL" }, 381 { "SANYO CD-ROM CRD", "ALL" }, 382 { "HITACHI CDR-8", "ALL" }, 383 { "HITACHI CDR-8335", "ALL" }, 384 { "HITACHI CDR-8435", "ALL" }, 385 { "Toshiba CD-ROM XM-6202B", "ALL" }, 386 { "CD-532E-A", "ALL" }, 387 { "E-IDE CD-ROM CR-840", "ALL" }, 388 { "CD-ROM Drive/F5A", "ALL" }, 389 { "RICOH CD-R/RW MP7083A", "ALL" }, 390 { "WPI CDD-820", "ALL" }, 391 { "SAMSUNG CD-ROM SC-148C", "ALL" }, 392 { "SAMSUNG CD-ROM SC-148F", "ALL" }, 393 { "SAMSUNG CD-ROM SC", "ALL" }, 394 { "SanDisk SDP3B-64", "ALL" }, 395 { "SAMSUNG CD-ROM SN-124", "ALL" }, 396 { "PLEXTOR CD-R PX-W8432T", "ALL" }, 397 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" }, 398 { "_NEC DV5800A", "ALL" }, 399 { NULL, 0 } 400}; 401 402static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table) 403{ 404 for ( ; drive_table->id_model ; drive_table++) 405 if ((!strcmp(drive_table->id_model, id->model)) && 406 ((!strstr(drive_table->id_firmware, id->fw_rev)) || 407 (!strcmp(drive_table->id_firmware, "ALL")))) 408 return 1; 409 return 0; 410} 411 412/* 413 * For both Blacklisted and Whitelisted drives. 414 * This is setup to be called as an extern for future support 415 * to other special driver code. 416 */ 417static int check_drive_lists(ide_drive_t *drive, int good_bad) 418{ 419 struct hd_driveid *id = drive->id; 420 421 if (good_bad) { 422 return in_drive_list(id, drive_whitelist); 423 } else { 424 int blacklist = in_drive_list(id, drive_blacklist); 425 if (blacklist) 426 printk("%s: Disabling DMA for %s\n", drive->name, id->model); 427 return(blacklist); 428 } 429 return 0; 430} 431 432static int 433icside_dma_check(ide_drive_t *drive) 434{ 435 struct hd_driveid *id = drive->id; 436 ide_hwif_t *hwif = HWIF(drive); 437 int autodma = hwif->autodma; 438 int xfer_mode = XFER_PIO_2; 439 int func = ide_dma_off_quietly; 440 441 if (!id || !(id->capability & 1) || !autodma) 442 goto out; 443 444 /* 445 * Consult the list of known "bad" drives 446 */ 447 if (check_drive_lists(drive, 0)) { 448 func = ide_dma_off; 449 goto out; 450 } 451 452 /* 453 * Enable DMA on any drive that has multiword DMA 454 */ 455 if (id->field_valid & 2) { 456 if (id->dma_mword & 4) { 457 xfer_mode = XFER_MW_DMA_2; 458 func = ide_dma_on; 459 } else if (id->dma_mword & 2) { 460 xfer_mode = XFER_MW_DMA_1; 461 func = ide_dma_on; 462 } else if (id->dma_mword & 1) { 463 xfer_mode = XFER_MW_DMA_0; 464 func = ide_dma_on; 465 } 466 goto out; 467 } 468 469 /* 470 * Consult the list of known "good" drives 471 */ 472 if (check_drive_lists(drive, 1)) { 473 if (id->eide_dma_time > 150) 474 goto out; 475 xfer_mode = XFER_MW_DMA_1; 476 func = ide_dma_on; 477 } 478 479out: 480 func = icside_config_if(drive, xfer_mode); 481 482 return hwif->dmaproc(func, drive); 483} 484 485static int 486icside_dma_verbose(ide_drive_t *drive) 487{ 488 printk(", DMA"); 489 return 1; 490} 491 492static int 493icside_dmaproc(ide_dma_action_t func, ide_drive_t *drive) 494{ 495 ide_hwif_t *hwif = HWIF(drive); 496 int count, reading = 0; 497 498 switch (func) { 499 case ide_dma_off: 500 printk("%s: DMA disabled\n", drive->name); 501 /*FALLTHROUGH*/ 502 503 case ide_dma_off_quietly: 504 case ide_dma_on: 505 drive->using_dma = (func == ide_dma_on); 506 return 0; 507 508 case ide_dma_check: 509 return icside_dma_check(drive); 510 511 case ide_dma_read: 512 reading = 1; 513 case ide_dma_write: 514 count = icside_build_dmatable(drive, reading); 515 if (!count) 516 return 1; 517 disable_dma(hwif->hw.dma); 518 519 /* Route the DMA signals to 520 * to the correct interface. 521 */ 522 outb(hwif->select_data, hwif->config_data); 523 524 /* Select the correct timing 525 * for this drive 526 */ 527 set_dma_speed(hwif->hw.dma, drive->drive_data); 528 529 set_dma_sg(hwif->hw.dma, HWIF(drive)->sg_table, count); 530 set_dma_mode(hwif->hw.dma, reading ? DMA_MODE_READ 531 : DMA_MODE_WRITE); 532 533 drive->waiting_for_dma = 1; 534 if (drive->media != ide_disk) 535 return 0; 536 537 ide_set_handler(drive, &icside_dmaintr, WAIT_CMD, NULL); 538 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, 539 IDE_COMMAND_REG); 540 541 case ide_dma_begin: 542 enable_dma(hwif->hw.dma); 543 return 0; 544 545 case ide_dma_end: 546 drive->waiting_for_dma = 0; 547 disable_dma(hwif->hw.dma); 548 icside_destroy_dmatable(drive); 549 return get_dma_residue(hwif->hw.dma) != 0; 550 551 case ide_dma_test_irq: 552 return inb((unsigned long)hwif->hw.priv) & 1; 553 554 case ide_dma_bad_drive: 555 case ide_dma_good_drive: 556 return check_drive_lists(drive, (func == ide_dma_good_drive)); 557 558 case ide_dma_verbose: 559 return icside_dma_verbose(drive); 560 561 case ide_dma_timeout: 562 default: 563 printk("icside_dmaproc: unsupported %s func: %d\n", 564 ide_dmafunc_verbose(func), func); 565 } 566 return 1; 567} 568 569static int 570icside_setup_dma(ide_hwif_t *hwif, int autodma) 571{ 572 printk(" %s: SG-DMA", hwif->name); 573 574 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * NR_ENTRIES, 575 GFP_KERNEL); 576 if (!hwif->sg_table) 577 goto failed; 578 579 hwif->dmatable_cpu = NULL; 580 hwif->dmatable_dma = 0; 581 hwif->speedproc = icside_set_speed; 582 hwif->dmaproc = icside_dmaproc; 583 hwif->autodma = autodma; 584 585 printk(" capable%s\n", autodma ? 586 ", auto-enable" : ""); 587 588 return 1; 589 590failed: 591 printk(" -- ERROR, unable to allocate DMA table\n"); 592 return 0; 593} 594#endif 595 596static ide_hwif_t * 597icside_find_hwif(unsigned long dataport) 598{ 599 ide_hwif_t *hwif; 600 int index; 601 602 for (index = 0; index < MAX_HWIFS; ++index) { 603 hwif = &ide_hwifs[index]; 604 if (hwif->io_ports[IDE_DATA_OFFSET] == (ide_ioreg_t)dataport) 605 goto found; 606 } 607 608 for (index = 0; index < MAX_HWIFS; ++index) { 609 hwif = &ide_hwifs[index]; 610 if (!hwif->io_ports[IDE_DATA_OFFSET]) 611 goto found; 612 } 613 614 return NULL; 615found: 616 return hwif; 617} 618 619static ide_hwif_t * 620icside_setup(unsigned long base, struct cardinfo *info, int irq) 621{ 622 unsigned long port = base + info->dataoffset; 623 ide_hwif_t *hwif; 624 625 hwif = icside_find_hwif(base); 626 if (hwif) { 627 int i; 628 629 memset(&hwif->hw, 0, sizeof(hw_regs_t)); 630 631 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 632 hwif->hw.io_ports[i] = (ide_ioreg_t)port; 633 hwif->io_ports[i] = (ide_ioreg_t)port; 634 port += 1 << info->stepping; 635 } 636 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset; 637 hwif->io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset; 638 hwif->hw.irq = irq; 639 hwif->irq = irq; 640 hwif->hw.dma = NO_DMA; 641 hwif->noprobe = 0; 642 hwif->chipset = ide_acorn; 643 } 644 645 return hwif; 646} 647 648static int __init icside_register_v5(struct expansion_card *ec, int autodma) 649{ 650 unsigned long slot_port; 651 ide_hwif_t *hwif; 652 653 slot_port = ecard_address(ec, ECARD_MEMC, 0); 654 655 ec->irqaddr = (unsigned char *)ioaddr(slot_port + ICS_ARCIN_V5_INTRSTAT); 656 ec->irqmask = 1; 657 ec->irq_data = (void *)slot_port; 658 ec->ops = (expansioncard_ops_t *)&icside_ops_arcin_v5; 659 660 /* 661 * Be on the safe side - disable interrupts 662 */ 663 inb(slot_port + ICS_ARCIN_V5_INTROFFSET); 664 665 hwif = icside_setup(slot_port, &icside_cardinfo_v5, ec->irq); 666 667 return hwif ? 0 : -1; 668} 669 670static int __init icside_register_v6(struct expansion_card *ec, int autodma) 671{ 672 unsigned long slot_port, port; 673 ide_hwif_t *hwif, *mate; 674 int sel = 0; 675 676 slot_port = ecard_address(ec, ECARD_IOC, ECARD_FAST); 677 port = ecard_address(ec, ECARD_EASI, ECARD_FAST); 678 679 if (port == 0) 680 port = slot_port; 681 else 682 sel = 1 << 5; 683 684 outb(sel, slot_port); 685 686 ec->irq_data = (void *)port; 687 ec->ops = (expansioncard_ops_t *)&icside_ops_arcin_v6; 688 689 /* 690 * Be on the safe side - disable interrupts 691 */ 692 inb(port + ICS_ARCIN_V6_INTROFFSET_1); 693 inb(port + ICS_ARCIN_V6_INTROFFSET_2); 694 695 hwif = icside_setup(port, &icside_cardinfo_v6_1, ec->irq); 696 mate = icside_setup(port, &icside_cardinfo_v6_2, ec->irq); 697 698#ifdef CONFIG_BLK_DEV_IDEDMA_ICS 699 if (ec->dma != NO_DMA) { 700 if (request_dma(ec->dma, hwif->name)) 701 goto no_dma; 702 703 if (hwif) { 704 hwif->config_data = slot_port; 705 hwif->select_data = sel; 706 hwif->hw.dma = ec->dma; 707 hwif->hw.priv = (void *) 708 (port + ICS_ARCIN_V6_INTRSTAT_1); 709 hwif->channel = 0; 710 icside_setup_dma(hwif, autodma); 711 } 712 if (mate) { 713 mate->config_data = slot_port; 714 mate->select_data = sel | 1; 715 mate->hw.dma = ec->dma; 716 mate->hw.priv = (void *) 717 (port + ICS_ARCIN_V6_INTRSTAT_2); 718 mate->channel = 1; 719 icside_setup_dma(mate, autodma); 720 } 721 } 722no_dma: 723#endif 724 return hwif || mate ? 0 : -1; 725} 726 727int __init icside_init(void) 728{ 729 int autodma = 0; 730 731#ifdef CONFIG_IDEDMA_ICS_AUTO 732 autodma = 1; 733#endif 734 735 ecard_startfind (); 736 737 do { 738 struct expansion_card *ec; 739 int result; 740 741 ec = ecard_find(0, icside_cids); 742 if (ec == NULL) 743 break; 744 745 ecard_claim(ec); 746 747 switch (icside_identifyif(ec)) { 748 case ics_if_arcin_v5: 749 result = icside_register_v5(ec, autodma); 750 break; 751 752 case ics_if_arcin_v6: 753 result = icside_register_v6(ec, autodma); 754 break; 755 756 default: 757 result = -1; 758 break; 759 } 760 761 if (result) 762 ecard_release(ec); 763 } while (1); 764 765 return 0; 766} 767