1/*
2 *  linux/drivers/ide/cmd640.c		Version 1.02  Sep 01, 1996
3 *
4 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
5 */
6
7/*
8 *  Original authors:	abramov@cecmow.enet.dec.com (Igor Abramov)
9 *  			mlord@pobox.com (Mark Lord)
10 *
11 *  See linux/MAINTAINERS for address of current maintainer.
12 *
13 *  This file provides support for the advanced features and bugs
14 *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
15 *
16 *  These chips are basically fucked by design, and getting this driver
17 *  to work on every motherboard design that uses this screwed chip seems
18 *  bloody well impossible.  However, we're still trying.
19 *
20 *  Version 0.97 worked for everybody.
21 *
22 *  User feedback is essential.  Many thanks to the beta test team:
23 *
24 *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
25 *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
26 *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
27 *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
28 *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
29 *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
30 *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
31 *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
32 *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
33 *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
34 *  liug@mama.indstate.edu, and others.
35 *
36 *  Version 0.01	Initial version, hacked out of ide.c,
37 *			and #include'd rather than compiled separately.
38 *			This will get cleaned up in a subsequent release.
39 *
40 *  Version 0.02	Fixes for vlb initialization code, enable prefetch
41 *			for versions 'B' and 'C' of chip by default,
42 *			some code cleanup.
43 *
44 *  Version 0.03	Added reset of secondary interface,
45 *			and black list for devices which are not compatible
46 *			with prefetch mode. Separate function for setting
47 *			prefetch is added, possibly it will be called some
48 *			day from ioctl processing code.
49 *
50 *  Version 0.04	Now configs/compiles separate from ide.c
51 *
52 *  Version 0.05	Major rewrite of interface timing code.
53 *			Added new function cmd640_set_mode to set PIO mode
54 *			from ioctl call. New drives added to black list.
55 *
56 *  Version 0.06	More code cleanup. Prefetch is enabled only for
57 *			detected hard drives, not included in prefetch
58 *			black list.
59 *
60 *  Version 0.07	Changed to more conservative drive tuning policy.
61 *			Unknown drives, which report PIO < 4 are set to
62 *			(reported_PIO - 1) if it is supported, or to PIO0.
63 *			List of known drives extended by info provided by
64 *			CMD at their ftp site.
65 *
66 *  Version 0.08	Added autotune/noautotune support.
67 *
68 *  Version 0.09	Try to be smarter about 2nd port enabling.
69 *  Version 0.10	Be nice and don't reset 2nd port.
70 *  Version 0.11	Try to handle more weird situations.
71 *
72 *  Version 0.12	Lots of bug fixes from Laszlo Peter
73 *			irq unmasking disabled for reliability.
74 *			try to be even smarter about the second port.
75 *			tidy up source code formatting.
76 *  Version 0.13	permit irq unmasking again.
77 *  Version 0.90	massive code cleanup, some bugs fixed.
78 *			defaults all drives to PIO mode0, prefetch off.
79 *			autotune is OFF by default, with compile time flag.
80 *			prefetch can be turned OFF/ON using "hdparm -p8/-p9"
81 *			 (requires hdparm-3.1 or newer)
82 *  Version 0.91	first release to linux-kernel list.
83 *  Version 0.92	move initial reg dump to separate callable function
84 *			change "readahead" to "prefetch" to avoid confusion
85 *  Version 0.95	respect original BIOS timings unless autotuning.
86 *			tons of code cleanup and rearrangement.
87 *			added CONFIG_BLK_DEV_CMD640_ENHANCED option
88 *			prevent use of unmask when prefetch is on
89 *  Version 0.96	prevent use of io_32bit when prefetch is off
90 *  Version 0.97	fix VLB secondary interface for sjd@slip.net
91 *			other minor tune-ups:  0.96 was very good.
92 *  Version 0.98	ignore PCI version when disabled by BIOS
93 *  Version 0.99	display setup/active/recovery clocks with PIO mode
94 *  Version 1.00	Mmm.. cannot depend on PCMD_ENA in all systems
95 *  Version 1.01	slow/fast devsel can be selected with "hdparm -p6/-p7"
96 *			 ("fast" is necessary for 32bit I/O in some systems)
97 *  Version 1.02	fix bug that resulted in slow "setup times"
98 *			 (patch courtesy of Zoltan Hidvegi)
99 */
100
101#undef REALLY_SLOW_IO		/* most systems can safely undef this */
102#define CMD640_PREFETCH_MASKS 1
103
104#include <linux/config.h>
105#include <linux/types.h>
106#include <linux/kernel.h>
107#include <linux/delay.h>
108#include <linux/timer.h>
109#include <linux/mm.h>
110#include <linux/ioport.h>
111#include <linux/blkdev.h>
112#include <linux/hdreg.h>
113#include <linux/ide.h>
114#include <linux/init.h>
115
116#include <asm/io.h>
117
118#include "ide_modes.h"
119
120/*
121 * This flag is set in ide.c by the parameter:  ide0=cmd640_vlb
122 */
123int cmd640_vlb = 0;
124
125/*
126 * CMD640 specific registers definition.
127 */
128
129#define VID		0x00
130#define DID		0x02
131#define PCMD		0x04
132#define   PCMD_ENA	0x01
133#define PSTTS		0x06
134#define REVID		0x08
135#define PROGIF		0x09
136#define SUBCL		0x0a
137#define BASCL		0x0b
138#define BaseA0		0x10
139#define BaseA1		0x14
140#define BaseA2		0x18
141#define BaseA3		0x1c
142#define INTLINE		0x3c
143#define INPINE		0x3d
144
145#define	CFR		0x50
146#define   CFR_DEVREV		0x03
147#define   CFR_IDE01INTR		0x04
148#define	  CFR_DEVID		0x18
149#define	  CFR_AT_VESA_078h	0x20
150#define	  CFR_DSA1		0x40
151#define	  CFR_DSA0		0x80
152
153#define CNTRL		0x51
154#define	  CNTRL_DIS_RA0		0x40
155#define   CNTRL_DIS_RA1		0x80
156#define	  CNTRL_ENA_2ND		0x08
157
158#define	CMDTIM		0x52
159#define	ARTTIM0		0x53
160#define	DRWTIM0		0x54
161#define ARTTIM1 	0x55
162#define DRWTIM1		0x56
163#define ARTTIM23	0x57
164#define   ARTTIM23_DIS_RA2	0x04
165#define   ARTTIM23_DIS_RA3	0x08
166#define DRWTIM23	0x58
167#define BRST		0x59
168
169/*
170 * Registers and masks for easy access by drive index:
171 */
172static byte prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
173static byte prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
174
175#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
176
177static byte arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
178static byte drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
179
180/*
181 * Current cmd640 timing values for each drive.
182 * The defaults for each are the slowest possible timings.
183 */
184static byte setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
185static byte active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
186static byte recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
187
188#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
189
190/*
191 * These are initialized to point at the devices we control
192 */
193static ide_hwif_t  *cmd_hwif0, *cmd_hwif1;
194static ide_drive_t *cmd_drives[4];
195
196/*
197 * Interface to access cmd640x registers
198 */
199static unsigned int cmd640_key;
200static void (*put_cmd640_reg)(unsigned short reg, byte val);
201static byte (*get_cmd640_reg)(unsigned short reg);
202
203/*
204 * This is read from the CFR reg, and is used in several places.
205 */
206static unsigned int cmd640_chip_version;
207
208/*
209 * The CMD640x chip does not support DWORD config write cycles, but some
210 * of the BIOSes use them to implement the config services.
211 * Therefore, we must use direct IO instead.
212 */
213
214/* PCI method 1 access */
215
216static void put_cmd640_reg_pci1 (unsigned short reg, byte val)
217{
218	unsigned long flags;
219
220	save_flags(flags);
221	cli();
222	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
223	outb_p(val, (reg & 3) | 0xcfc);
224	restore_flags(flags);
225}
226
227static byte get_cmd640_reg_pci1 (unsigned short reg)
228{
229	byte b;
230	unsigned long flags;
231
232	save_flags(flags);
233	cli();
234	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
235	b = inb_p((reg & 3) | 0xcfc);
236	restore_flags(flags);
237	return b;
238}
239
240/* PCI method 2 access (from CMD datasheet) */
241
242static void put_cmd640_reg_pci2 (unsigned short reg, byte val)
243{
244	unsigned long flags;
245
246	save_flags(flags);
247	cli();
248	outb_p(0x10, 0xcf8);
249	outb_p(val, cmd640_key + reg);
250	outb_p(0, 0xcf8);
251	restore_flags(flags);
252}
253
254static byte get_cmd640_reg_pci2 (unsigned short reg)
255{
256	byte b;
257	unsigned long flags;
258
259	save_flags(flags);
260	cli();
261	outb_p(0x10, 0xcf8);
262	b = inb_p(cmd640_key + reg);
263	outb_p(0, 0xcf8);
264	restore_flags(flags);
265	return b;
266}
267
268/* VLB access */
269
270static void put_cmd640_reg_vlb (unsigned short reg, byte val)
271{
272	unsigned long flags;
273
274	save_flags(flags);
275	cli();
276	outb_p(reg, cmd640_key);
277	outb_p(val, cmd640_key + 4);
278	restore_flags(flags);
279}
280
281static byte get_cmd640_reg_vlb (unsigned short reg)
282{
283	byte b;
284	unsigned long flags;
285
286	save_flags(flags);
287	cli();
288	outb_p(reg, cmd640_key);
289	b = inb_p(cmd640_key + 4);
290	restore_flags(flags);
291	return b;
292}
293
294static int __init match_pci_cmd640_device (void)
295{
296	const byte ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
297	unsigned int i;
298	for (i = 0; i < 4; i++) {
299		if (get_cmd640_reg(i) != ven_dev[i])
300			return 0;
301	}
302#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
303	if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
304		printk("ide: cmd640 on PCI disabled by BIOS\n");
305		return 0;
306	}
307#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
308	return 1; /* success */
309}
310
311/*
312 * Probe for CMD640x -- pci method 1
313 */
314static int __init probe_for_cmd640_pci1 (void)
315{
316	get_cmd640_reg = get_cmd640_reg_pci1;
317	put_cmd640_reg = put_cmd640_reg_pci1;
318	for (cmd640_key = 0x80000000; cmd640_key <= 0x8000f800; cmd640_key += 0x800) {
319		if (match_pci_cmd640_device())
320			return 1; /* success */
321	}
322	return 0;
323}
324
325/*
326 * Probe for CMD640x -- pci method 2
327 */
328static int __init probe_for_cmd640_pci2 (void)
329{
330	get_cmd640_reg = get_cmd640_reg_pci2;
331	put_cmd640_reg = put_cmd640_reg_pci2;
332	for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
333		if (match_pci_cmd640_device())
334			return 1; /* success */
335	}
336	return 0;
337}
338
339/*
340 * Probe for CMD640x -- vlb
341 */
342static int __init probe_for_cmd640_vlb (void)
343{
344	byte b;
345
346	get_cmd640_reg = get_cmd640_reg_vlb;
347	put_cmd640_reg = put_cmd640_reg_vlb;
348	cmd640_key = 0x178;
349	b = get_cmd640_reg(CFR);
350	if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
351		cmd640_key = 0x78;
352		b = get_cmd640_reg(CFR);
353		if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
354			return 0;
355	}
356	return 1; /* success */
357}
358
359/*
360 *  Returns 1 if an IDE interface/drive exists at 0x170,
361 *  Returns 0 otherwise.
362 */
363static int __init secondary_port_responding (void)
364{
365	unsigned long flags;
366
367	save_flags(flags);
368	cli();
369
370	outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET);	/* select drive0 */
371	udelay(100);
372	if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
373		outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
374		udelay(100);
375		if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
376			restore_flags(flags);
377			return 0; /* nothing responded */
378		}
379	}
380	restore_flags(flags);
381	return 1; /* success */
382}
383
384#ifdef CMD640_DUMP_REGS
385/*
386 * Dump out all cmd640 registers.  May be called from ide.c
387 */
388void cmd640_dump_regs (void)
389{
390	unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
391
392	/* Dump current state of chip registers */
393	printk("ide: cmd640 internal register dump:");
394	for (; reg <= 0x59; reg++) {
395		if (!(reg & 0x0f))
396			printk("\n%04x:", reg);
397		printk(" %02x", get_cmd640_reg(reg));
398	}
399	printk("\n");
400}
401#endif
402
403/*
404 * Check whether prefetch is on for a drive,
405 * and initialize the unmask flags for safe operation.
406 */
407static void __init check_prefetch (unsigned int index)
408{
409	ide_drive_t *drive = cmd_drives[index];
410	byte b = get_cmd640_reg(prefetch_regs[index]);
411
412	if (b & prefetch_masks[index]) {	/* is prefetch off? */
413		drive->no_unmask = 0;
414		drive->no_io_32bit = 1;
415		drive->io_32bit = 0;
416	} else {
417#if CMD640_PREFETCH_MASKS
418		drive->no_unmask = 1;
419		drive->unmask = 0;
420#endif
421		drive->no_io_32bit = 0;
422	}
423}
424
425/*
426 * Figure out which devices we control
427 */
428static void __init setup_device_ptrs (void)
429{
430	unsigned int i;
431
432	cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */
433	cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */
434	for (i = 0; i < MAX_HWIFS; i++) {
435		ide_hwif_t *hwif = &ide_hwifs[i];
436		if (hwif->chipset == ide_unknown || hwif->chipset == ide_generic) {
437			if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0)
438				cmd_hwif0 = hwif;
439			else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170)
440				cmd_hwif1 = hwif;
441		}
442	}
443	cmd_drives[0] = &cmd_hwif0->drives[0];
444	cmd_drives[1] = &cmd_hwif0->drives[1];
445	cmd_drives[2] = &cmd_hwif1->drives[0];
446	cmd_drives[3] = &cmd_hwif1->drives[1];
447}
448
449#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
450
451/*
452 * Sets prefetch mode for a drive.
453 */
454static void set_prefetch_mode (unsigned int index, int mode)
455{
456	ide_drive_t *drive = cmd_drives[index];
457	int reg = prefetch_regs[index];
458	byte b;
459	unsigned long flags;
460
461	save_flags(flags);
462	cli();
463	b = get_cmd640_reg(reg);
464	if (mode) {	/* want prefetch on? */
465#if CMD640_PREFETCH_MASKS
466		drive->no_unmask = 1;
467		drive->unmask = 0;
468#endif
469		drive->no_io_32bit = 0;
470		b &= ~prefetch_masks[index];	/* enable prefetch */
471	} else {
472		drive->no_unmask = 0;
473		drive->no_io_32bit = 1;
474		drive->io_32bit = 0;
475		b |= prefetch_masks[index];	/* disable prefetch */
476	}
477	put_cmd640_reg(reg, b);
478	restore_flags(flags);
479}
480
481/*
482 * Dump out current drive clocks settings
483 */
484static void display_clocks (unsigned int index)
485{
486	byte active_count, recovery_count;
487
488	active_count = active_counts[index];
489	if (active_count == 1)
490		++active_count;
491	recovery_count = recovery_counts[index];
492	if (active_count > 3 && recovery_count == 1)
493		++recovery_count;
494	if (cmd640_chip_version > 1)
495		recovery_count += 1;  /* cmd640b uses (count + 1)*/
496	printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
497}
498
499/*
500 * Pack active and recovery counts into single byte representation
501 * used by controller
502 */
503inline static byte pack_nibbles (byte upper, byte lower)
504{
505	return ((upper & 0x0f) << 4) | (lower & 0x0f);
506}
507
508/*
509 * This routine retrieves the initial drive timings from the chipset.
510 */
511static void __init retrieve_drive_counts (unsigned int index)
512{
513	byte b;
514
515	/*
516	 * Get the internal setup timing, and convert to clock count
517	 */
518	b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
519	switch (b) {
520		case 0x00: b = 4; break;
521		case 0x80: b = 3; break;
522		case 0x40: b = 2; break;
523		default:   b = 5; break;
524	}
525	setup_counts[index] = b;
526
527	/*
528	 * Get the active/recovery counts
529	 */
530	b = get_cmd640_reg(drwtim_regs[index]);
531	active_counts[index]   = (b >> 4)   ? (b >> 4)   : 0x10;
532	recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
533}
534
535
536/*
537 * This routine writes the prepared setup/active/recovery counts
538 * for a drive into the cmd640 chipset registers to active them.
539 */
540static void program_drive_counts (unsigned int index)
541{
542	unsigned long flags;
543	byte setup_count    = setup_counts[index];
544	byte active_count   = active_counts[index];
545	byte recovery_count = recovery_counts[index];
546
547	/*
548	 * Set up address setup count and drive read/write timing registers.
549	 * Primary interface has individual count/timing registers for
550	 * each drive.  Secondary interface has one common set of registers,
551	 * so we merge the timings, using the slowest value for each timing.
552	 */
553	if (index > 1) {
554		unsigned int mate;
555		if (cmd_drives[mate = index ^ 1]->present) {
556			if (setup_count < setup_counts[mate])
557				setup_count = setup_counts[mate];
558			if (active_count < active_counts[mate])
559				active_count = active_counts[mate];
560			if (recovery_count < recovery_counts[mate])
561				recovery_count = recovery_counts[mate];
562		}
563	}
564
565	/*
566	 * Convert setup_count to internal chipset representation
567	 */
568	switch (setup_count) {
569		case 4:	 setup_count = 0x00; break;
570		case 3:	 setup_count = 0x80; break;
571		case 1:
572		case 2:	 setup_count = 0x40; break;
573		default: setup_count = 0xc0; /* case 5 */
574	}
575
576	/*
577	 * Now that everything is ready, program the new timings
578	 */
579	save_flags (flags);
580	cli();
581	/*
582	 * Program the address_setup clocks into ARTTIM reg,
583	 * and then the active/recovery counts into the DRWTIM reg
584	 * (this converts counts of 16 into counts of zero -- okay).
585	 */
586	setup_count |= get_cmd640_reg(arttim_regs[index]) & 0x3f;
587	put_cmd640_reg(arttim_regs[index], setup_count);
588	put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
589	restore_flags(flags);
590}
591
592/*
593 * Set a specific pio_mode for a drive
594 */
595static void cmd640_set_mode (unsigned int index, byte pio_mode, unsigned int cycle_time)
596{
597	int setup_time, active_time, recovery_time, clock_time;
598	byte setup_count, active_count, recovery_count, recovery_count2, cycle_count;
599	int bus_speed = system_bus_clock();
600
601	if (pio_mode > 5)
602		pio_mode = 5;
603	setup_time  = ide_pio_timings[pio_mode].setup_time;
604	active_time = ide_pio_timings[pio_mode].active_time;
605	recovery_time = cycle_time - (setup_time + active_time);
606	clock_time = 1000 / bus_speed;
607	cycle_count = (cycle_time + clock_time - 1) / clock_time;
608
609	setup_count = (setup_time + clock_time - 1) / clock_time;
610
611	active_count = (active_time + clock_time - 1) / clock_time;
612	if (active_count < 2)
613		active_count = 2; /* minimum allowed by cmd640 */
614
615	recovery_count = (recovery_time + clock_time - 1) / clock_time;
616	recovery_count2 = cycle_count - (setup_count + active_count);
617	if (recovery_count2 > recovery_count)
618		recovery_count = recovery_count2;
619	if (recovery_count < 2)
620		recovery_count = 2; /* minimum allowed by cmd640 */
621	if (recovery_count > 17) {
622		active_count += recovery_count - 17;
623		recovery_count = 17;
624	}
625	if (active_count > 16)
626		active_count = 16; /* maximum allowed by cmd640 */
627	if (cmd640_chip_version > 1)
628		recovery_count -= 1;  /* cmd640b uses (count + 1)*/
629	if (recovery_count > 16)
630		recovery_count = 16; /* maximum allowed by cmd640 */
631
632	setup_counts[index]    = setup_count;
633	active_counts[index]   = active_count;
634	recovery_counts[index] = recovery_count;
635
636	/*
637	 * In a perfect world, we might set the drive pio mode here
638	 * (using WIN_SETFEATURE) before continuing.
639	 *
640	 * But we do not, because:
641	 *	1) this is the wrong place to do it (proper is do_special() in ide.c)
642	 * 	2) in practice this is rarely, if ever, necessary
643	 */
644	program_drive_counts (index);
645}
646
647/*
648 * Drive PIO mode selection:
649 */
650static void cmd640_tune_drive (ide_drive_t *drive, byte mode_wanted)
651{
652	byte b;
653	ide_pio_data_t  d;
654	unsigned int index = 0;
655
656	while (drive != cmd_drives[index]) {
657		if (++index > 3) {
658			printk("%s: bad news in cmd640_tune_drive\n", drive->name);
659			return;
660		}
661	}
662	switch (mode_wanted) {
663		case 6: /* set fast-devsel off */
664		case 7: /* set fast-devsel on */
665			mode_wanted &= 1;
666			b = get_cmd640_reg(CNTRL) & ~0x27;
667			if (mode_wanted)
668				b |= 0x27;
669			put_cmd640_reg(CNTRL, b);
670			printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis");
671			return;
672
673		case 8: /* set prefetch off */
674		case 9: /* set prefetch on */
675			mode_wanted &= 1;
676			set_prefetch_mode(index, mode_wanted);
677			printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis");
678			return;
679	}
680
681	(void) ide_get_best_pio_mode (drive, mode_wanted, 5, &d);
682	cmd640_set_mode (index, d.pio_mode, d.cycle_time);
683
684	printk ("%s: selected cmd640 PIO mode%d (%dns)%s",
685		drive->name,
686		d.pio_mode,
687		d.cycle_time,
688		d.overridden ? " (overriding vendor mode)" : "");
689	display_clocks(index);
690	return;
691}
692
693#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
694
695/*
696 * Probe for a cmd640 chipset, and initialize it if found.  Called from ide.c
697 */
698int __init ide_probe_for_cmd640x (void)
699{
700#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
701	int second_port_toggled = 0;
702#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
703	int second_port_cmd640 = 0;
704	const char *bus_type, *port2;
705	unsigned int index;
706	byte b, cfr;
707
708	if (cmd640_vlb && probe_for_cmd640_vlb()) {
709		bus_type = "VLB";
710	} else {
711		cmd640_vlb = 0;
712		if (probe_for_cmd640_pci1())
713			bus_type = "PCI (type1)";
714		else if (probe_for_cmd640_pci2())
715			bus_type = "PCI (type2)";
716		else
717			return 0;
718	}
719	/*
720	 * Undocumented magic (there is no 0x5b reg in specs)
721	 */
722	put_cmd640_reg(0x5b, 0xbd);
723	if (get_cmd640_reg(0x5b) != 0xbd) {
724		printk("ide: cmd640 init failed: wrong value in reg 0x5b\n");
725		return 0;
726	}
727	put_cmd640_reg(0x5b, 0);
728
729#ifdef CMD640_DUMP_REGS
730	CMD640_DUMP_REGS;
731#endif
732
733	/*
734	 * Documented magic begins here
735	 */
736	cfr = get_cmd640_reg(CFR);
737	cmd640_chip_version = cfr & CFR_DEVREV;
738	if (cmd640_chip_version == 0) {
739		printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
740		return 0;
741	}
742
743	/*
744	 * Initialize data for primary port
745	 */
746	setup_device_ptrs ();
747	printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n",
748	       cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
749	cmd_hwif0->chipset = ide_cmd640;
750#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
751	cmd_hwif0->tuneproc = &cmd640_tune_drive;
752#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
753
754	/*
755	 * Ensure compatibility by always using the slowest timings
756	 * for access to the drive's command register block,
757	 * and reset the prefetch burstsize to default (512 bytes).
758	 *
759	 * Maybe we need a way to NOT do these on *some* systems?
760	 */
761	put_cmd640_reg(CMDTIM, 0);
762	put_cmd640_reg(BRST, 0x40);
763
764	/*
765	 * Try to enable the secondary interface, if not already enabled
766	 */
767	if (cmd_hwif1->noprobe) {
768		port2 = "not probed";
769	} else {
770		b = get_cmd640_reg(CNTRL);
771		if (secondary_port_responding()) {
772			if ((b & CNTRL_ENA_2ND)) {
773				second_port_cmd640 = 1;
774				port2 = "okay";
775			} else if (cmd640_vlb) {
776				second_port_cmd640 = 1;
777				port2 = "alive";
778			} else
779				port2 = "not cmd640";
780		} else {
781			put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
782			if (secondary_port_responding()) {
783				second_port_cmd640 = 1;
784#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
785				second_port_toggled = 1;
786#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
787				port2 = "enabled";
788			} else {
789				put_cmd640_reg(CNTRL, b); /* restore original setting */
790				port2 = "not responding";
791			}
792		}
793	}
794
795	/*
796	 * Initialize data for secondary cmd640 port, if enabled
797	 */
798	if (second_port_cmd640) {
799		cmd_hwif0->serialized = 1;
800		cmd_hwif1->serialized = 1;
801		cmd_hwif1->chipset = ide_cmd640;
802		cmd_hwif0->mate = cmd_hwif1;
803		cmd_hwif1->mate = cmd_hwif0;
804		cmd_hwif1->channel = 1;
805#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
806		cmd_hwif1->tuneproc = &cmd640_tune_drive;
807#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
808	}
809	printk("%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
810		cmd_hwif0->serialized ? "" : "not ", port2);
811
812	/*
813	 * Establish initial timings/prefetch for all drives.
814	 * Do not unnecessarily disturb any prior BIOS setup of these.
815	 */
816	for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
817		ide_drive_t *drive = cmd_drives[index];
818#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
819		if (drive->autotune || ((index > 1) && second_port_toggled)) {
820	 		/*
821	 		 * Reset timing to the slowest speed and turn off prefetch.
822			 * This way, the drive identify code has a better chance.
823			 */
824			setup_counts    [index] = 4;	/* max possible */
825			active_counts   [index] = 16;	/* max possible */
826			recovery_counts [index] = 16;	/* max possible */
827			program_drive_counts (index);
828			set_prefetch_mode (index, 0);
829			printk("cmd640: drive%d timings/prefetch cleared\n", index);
830		} else {
831			/*
832			 * Record timings/prefetch without changing them.
833			 * This preserves any prior BIOS setup.
834			 */
835			retrieve_drive_counts (index);
836			check_prefetch (index);
837			printk("cmd640: drive%d timings/prefetch(%s) preserved",
838				index, drive->no_io_32bit ? "off" : "on");
839			display_clocks(index);
840		}
841#else
842		/*
843		 * Set the drive unmask flags to match the prefetch setting
844		 */
845		check_prefetch (index);
846		printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
847			index, drive->no_io_32bit ? "off" : "on");
848#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
849	}
850
851#ifdef CMD640_DUMP_REGS
852	CMD640_DUMP_REGS;
853#endif
854	return 1;
855}
856
857