1#ifndef _I810_DRM_H_ 2#define _I810_DRM_H_ 3 4/* WARNING: These defines must be the same as what the Xserver uses. 5 * if you change them, you must change the defines in the Xserver. 6 */ 7 8#ifndef _I810_DEFINES_ 9#define _I810_DEFINES_ 10 11#define I810_DMA_BUF_ORDER 12 12#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) 13#define I810_DMA_BUF_NR 256 14#define I810_NR_SAREA_CLIPRECTS 8 15 16/* Each region is a minimum of 64k, and there are at most 64 of them. 17 */ 18#define I810_NR_TEX_REGIONS 64 19#define I810_LOG_MIN_TEX_REGION_SIZE 16 20#endif 21 22#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ 23#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ 24#define I810_UPLOAD_CTX 0x4 25#define I810_UPLOAD_BUFFERS 0x8 26#define I810_UPLOAD_TEX0 0x10 27#define I810_UPLOAD_TEX1 0x20 28#define I810_UPLOAD_CLIPRECTS 0x40 29 30 31/* Indices into buf.Setup where various bits of state are mirrored per 32 * context and per buffer. These can be fired at the card as a unit, 33 * or in a piecewise fashion as required. 34 */ 35 36/* Destbuffer state 37 * - backbuffer linear offset and pitch -- invarient in the current dri 38 * - zbuffer linear offset and pitch -- also invarient 39 * - drawing origin in back and depth buffers. 40 * 41 * Keep the depth/back buffer state here to acommodate private buffers 42 * in the future. 43 */ 44#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ 45#define I810_DESTREG_DI1 1 46#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ 47#define I810_DESTREG_DV1 3 48#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ 49#define I810_DESTREG_DR1 5 50#define I810_DESTREG_DR2 6 51#define I810_DESTREG_DR3 7 52#define I810_DESTREG_DR4 8 53#define I810_DEST_SETUP_SIZE 10 54 55/* Context state 56 */ 57#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ 58#define I810_CTXREG_CF1 1 59#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ 60#define I810_CTXREG_ST1 3 61#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ 62#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ 63#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ 64#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ 65#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ 66#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ 67#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ 68#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ 69#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ 70#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ 71#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ 72#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ 73#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ 74#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ 75#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ 76#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ 77#define I810_CTX_SETUP_SIZE 20 78 79/* Texture state (per tex unit) 80 */ 81#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ 82#define I810_TEXREG_MI1 1 83#define I810_TEXREG_MI2 2 84#define I810_TEXREG_MI3 3 85#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ 86#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ 87#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ 88#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ 89#define I810_TEX_SETUP_SIZE 8 90 91#define I810_FRONT 0x1 92#define I810_BACK 0x2 93#define I810_DEPTH 0x4 94 95 96typedef struct _drm_i810_init { 97 enum { 98 I810_INIT_DMA = 0x01, 99 I810_CLEANUP_DMA = 0x02 100 } func; 101 int ring_map_idx; 102 int buffer_map_idx; 103 int sarea_priv_offset; 104 unsigned int ring_start; 105 unsigned int ring_end; 106 unsigned int ring_size; 107 unsigned int front_offset; 108 unsigned int back_offset; 109 unsigned int depth_offset; 110 unsigned int w; 111 unsigned int h; 112 unsigned int pitch; 113 unsigned int pitch_bits; 114} drm_i810_init_t; 115 116/* Warning: If you change the SAREA structure you must change the Xserver 117 * structure as well */ 118 119typedef struct _drm_i810_tex_region { 120 unsigned char next, prev; /* indices to form a circular LRU */ 121 unsigned char in_use; /* owned by a client, or free? */ 122 int age; /* tracked by clients to update local LRU's */ 123} drm_i810_tex_region_t; 124 125typedef struct _drm_i810_sarea { 126 unsigned int ContextState[I810_CTX_SETUP_SIZE]; 127 unsigned int BufferState[I810_DEST_SETUP_SIZE]; 128 unsigned int TexState[2][I810_TEX_SETUP_SIZE]; 129 unsigned int dirty; 130 131 unsigned int nbox; 132 drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; 133 134 /* Maintain an LRU of contiguous regions of texture space. If 135 * you think you own a region of texture memory, and it has an 136 * age different to the one you set, then you are mistaken and 137 * it has been stolen by another client. If global texAge 138 * hasn't changed, there is no need to walk the list. 139 * 140 * These regions can be used as a proxy for the fine-grained 141 * texture information of other clients - by maintaining them 142 * in the same lru which is used to age their own textures, 143 * clients have an approximate lru for the whole of global 144 * texture space, and can make informed decisions as to which 145 * areas to kick out. There is no need to choose whether to 146 * kick out your own texture or someone else's - simply eject 147 * them all in LRU order. 148 */ 149 150 drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; 151 /* Last elt is sentinal */ 152 int texAge; /* last time texture was uploaded */ 153 int last_enqueue; /* last time a buffer was enqueued */ 154 int last_dispatch; /* age of the most recently dispatched buffer */ 155 int last_quiescent; /* */ 156 int ctxOwner; /* last context to upload state */ 157 158 int vertex_prim; 159 160} drm_i810_sarea_t; 161 162typedef struct _drm_i810_clear { 163 int clear_color; 164 int clear_depth; 165 int flags; 166} drm_i810_clear_t; 167 168 169 170/* These may be placeholders if we have more cliprects than 171 * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to 172 * false, indicating that the buffer will be dispatched again with a 173 * new set of cliprects. 174 */ 175typedef struct _drm_i810_vertex { 176 int idx; /* buffer index */ 177 int used; /* nr bytes in use */ 178 int discard; /* client is finished with the buffer? */ 179} drm_i810_vertex_t; 180 181typedef struct _drm_i810_copy_t { 182 int idx; /* buffer index */ 183 int used; /* nr bytes in use */ 184 void *address; /* Address to copy from */ 185} drm_i810_copy_t; 186 187typedef struct drm_i810_dma { 188 void *virtual; 189 int request_idx; 190 int request_size; 191 int granted; 192} drm_i810_dma_t; 193 194#endif /* _I810_DRM_H_ */ 195