1/* 2 Madge Ambassador ATM Adapter driver. 3 Copyright (C) 1995-1999 Madge Networks Ltd. 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian 20 system and in the file COPYING in the Linux kernel source. 21*/ 22 23/* * dedicated to the memory of Graham Gordon 1971-1998 * */ 24 25#include <linux/module.h> 26#include <linux/types.h> 27#include <linux/pci.h> 28#include <linux/kernel.h> 29#include <linux/init.h> 30#include <linux/ioport.h> 31#include <linux/atmdev.h> 32#include <linux/delay.h> 33#include <linux/interrupt.h> 34 35#include <asm/atomic.h> 36#include <asm/io.h> 37#include <asm/byteorder.h> 38 39#include "ambassador.h" 40 41#define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>" 42#define description_string "Madge ATM Ambassador driver" 43#define version_string "1.2.4" 44 45static inline void __init show_version (void) { 46 printk ("%s version %s\n", description_string, version_string); 47} 48 49/* 50 51 Theory of Operation 52 53 I Hardware, detection, initialisation and shutdown. 54 55 1. Supported Hardware 56 57 This driver is for the PCI ATMizer-based Ambassador card (except 58 very early versions). It is not suitable for the similar EISA "TR7" 59 card. Commercially, both cards are known as Collage Server ATM 60 adapters. 61 62 The loader supports image transfer to the card, image start and few 63 other miscellaneous commands. 64 65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023. 66 67 The cards are big-endian. 68 69 2. Detection 70 71 Standard PCI stuff, the early cards are detected and rejected. 72 73 3. Initialisation 74 75 The cards are reset and the self-test results are checked. The 76 microcode image is then transferred and started. This waits for a 77 pointer to a descriptor containing details of the host-based queues 78 and buffers and various parameters etc. Once they are processed 79 normal operations may begin. The BIA is read using a microcode 80 command. 81 82 4. Shutdown 83 84 This may be accomplished either by a card reset or via the microcode 85 shutdown command. Further investigation required. 86 87 5. Persistent state 88 89 The card reset does not affect PCI configuration (good) or the 90 contents of several other "shared run-time registers" (bad) which 91 include doorbell and interrupt control as well as EEPROM and PCI 92 control. The driver must be careful when modifying these registers 93 not to touch bits it does not use and to undo any changes at exit. 94 95 II Driver software 96 97 0. Generalities 98 99 The adapter is quite intelligent (fast) and has a simple interface 100 (few features). VPI is always zero, 1024 VCIs are supported. There 101 is limited cell rate support. UBR channels can be capped and ABR 102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR 103 support. 104 105 1. Driver <-> Adapter Communication 106 107 Apart from the basic loader commands, the driver communicates 108 through three entities: the command queue (CQ), the transmit queue 109 pair (TXQ) and the receive queue pairs (RXQ). These three entities 110 are set up by the host and passed to the microcode just after it has 111 been started. 112 113 All queues are host-based circular queues. They are contiguous and 114 (due to hardware limitations) have some restrictions as to their 115 locations in (bus) memory. They are of the "full means the same as 116 empty so don't do that" variety since the adapter uses pointers 117 internally. 118 119 The queue pairs work as follows: one queue is for supply to the 120 adapter, items in it are pending and are owned by the adapter; the 121 other is the queue for return from the adapter, items in it have 122 been dealt with by the adapter. The host adds items to the supply 123 (TX descriptors and free RX buffer descriptors) and removes items 124 from the return (TX and RX completions). The adapter deals with out 125 of order completions. 126 127 Interrupts (card to host) and the doorbell (host to card) are used 128 for signalling. 129 130 1. CQ 131 132 This is to communicate "open VC", "close VC", "get stats" etc. to 133 the adapter. At most one command is retired every millisecond by the 134 card. There is no out of order completion or notification. The 135 driver needs to check the return code of the command, waiting as 136 appropriate. 137 138 2. TXQ 139 140 TX supply items are of variable length (scatter gather support) and 141 so the queue items are (more or less) pointers to the real thing. 142 Each TX supply item contains a unique, host-supplied handle (the skb 143 bus address seems most sensible as this works for Alphas as well, 144 there is no need to do any endian conversions on the handles). 145 146 TX return items consist of just the handles above. 147 148 3. RXQ (up to 4 of these with different lengths and buffer sizes) 149 150 RX supply items consist of a unique, host-supplied handle (the skb 151 bus address again) and a pointer to the buffer data area. 152 153 RX return items consist of the handle above, the VC, length and a 154 status word. This just screams "oh so easy" doesn't it? 155 156 Note on RX pool sizes: 157 158 Each pool should have enough buffers to handle a back-to-back stream 159 of minimum sized frames on a single VC. For example: 160 161 frame spacing = 3us (about right) 162 163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess) 164 165 min number of buffers for one VC = 1 + delay/spacing (buffers) 166 167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up) 168 169 The 20us delay assumes that there is no need to sleep; if we need to 170 sleep to get buffers we are going to drop frames anyway. 171 172 In fact, each pool should have enough buffers to support the 173 simultaneous reassembly of a separate frame on each VC and cope with 174 the case in which frames complete in round robin cell fashion on 175 each VC. 176 177 Only one frame can complete at each cell arrival, so if "n" VCs are 178 open, the worst case is to have them all complete frames together 179 followed by all starting new frames together. 180 181 desired number of buffers = n + delay/spacing 182 183 These are the extreme requirements, however, they are "n+k" for some 184 "k" so we have only the constant to choose. This is the argument 185 rx_lats which current defaults to 7. 186 187 Actually, "n ? n+k : 0" is better and this is what is implemented, 188 subject to the limit given by the pool size. 189 190 4. Driver locking 191 192 Simple spinlocks are used around the TX and RX queue mechanisms. 193 Anyone with a faster, working method is welcome to implement it. 194 195 The adapter command queue is protected with a spinlock. We always 196 wait for commands to complete. 197 198 A more complex form of locking is used around parts of the VC open 199 and close functions. There are three reasons for a lock: 1. we need 200 to do atomic rate reservation and release (not used yet), 2. Opening 201 sometimes involves two adapter commands which must not be separated 202 by another command on the same VC, 3. the changes to RX pool size 203 must be atomic. The lock needs to work over context switches, so we 204 use a semaphore. 205 206 III Hardware Features and Microcode Bugs 207 208 1. Byte Ordering 209 210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*! 211 212 2. Memory access 213 214 All structures that are not accessed using DMA must be 4-byte 215 aligned (not a problem) and must not cross 4MB boundaries. 216 217 There is a DMA memory hole at E0000000-E00000FF (groan). 218 219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB 220 but for a hardware bug). 221 222 RX buffers (DMA write) must not cross 16MB boundaries and must 223 include spare trailing bytes up to the next 4-byte boundary; they 224 will be written with rubbish. 225 226 The PLX likes to prefetch; if reading up to 4 u32 past the end of 227 each TX fragment is not a problem, then TX can be made to go a 228 little faster by passing a flag at init that disables a prefetch 229 workaround. We do not pass this flag. (new microcode only) 230 231 Now we: 232 . Note that alloc_skb rounds up size to a 16byte boundary. 233 . Ensure all areas do not traverse 4MB boundaries. 234 . Ensure all areas do not start at a E00000xx bus address. 235 (I cannot be certain, but this may always hold with Linux) 236 . Make all failures cause a loud message. 237 . Discard non-conforming SKBs (causes TX failure or RX fill delay). 238 . Discard non-conforming TX fragment descriptors (the TX fails). 239 In the future we could: 240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries. 241 . Segment TX areas into some/more fragments, when necessary. 242 . Relax checks for non-DMA items (ignore hole). 243 . Give scatter-gather (iovec) requirements using ???. (?) 244 245 3. VC close is broken (only for new microcode) 246 247 The VC close adapter microcode command fails to do anything if any 248 frames have been received on the VC but none have been transmitted. 249 Frames continue to be reassembled and passed (with IRQ) to the 250 driver. 251 252 IV To Do List 253 254 . Fix bugs! 255 256 . Timer code may be broken. 257 258 . Deal with buggy VC close (somehow) in microcode 12. 259 260 . Handle interrupted and/or non-blocking writes - is this a job for 261 the protocol layer? 262 263 . Add code to break up TX fragments when they span 4MB boundaries. 264 265 . Add SUNI phy layer (need to know where SUNI lives on card). 266 267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b) 268 leave extra headroom space for Ambassador TX descriptors. 269 270 . Understand these elements of struct atm_vcc: recvq (proto?), 271 sleep, callback, listenq, backlog_quota, reply and user_back. 272 273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable). 274 275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow. 276 277 . Decide whether RX buffer recycling is or can be made completely safe; 278 turn it back on. It looks like Werner is going to axe this. 279 280 . Implement QoS changes on open VCs (involves extracting parts of VC open 281 and close into separate functions and using them to make changes). 282 283 . Hack on command queue so that someone can issue multiple commands and wait 284 on the last one (OR only "no-op" or "wait" commands are waited for). 285 286 . Eliminate need for while-schedule around do_command. 287 288*/ 289 290/********** microcode **********/ 291 292#ifdef AMB_NEW_MICROCODE 293#define UCODE(x) UCODE1(atmsar12.,x) 294#else 295#define UCODE(x) UCODE1(atmsar11.,x) 296#endif 297#define UCODE2(x) #x 298#define UCODE1(x,y) UCODE2(x ## y) 299 300static u32 __initdata ucode_start = 301#include UCODE(start) 302; 303 304static region __initdata ucode_regions[] = { 305#include UCODE(regions) 306 { 0, 0 } 307}; 308 309static u32 __initdata ucode_data[] = { 310#include UCODE(data) 311 0xdeadbeef 312}; 313 314/********** globals **********/ 315 316static amb_dev * amb_devs = NULL; 317static struct timer_list housekeeping; 318 319static unsigned short debug = 0; 320static unsigned int cmds = 8; 321static unsigned int txs = 32; 322static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 }; 323static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 }; 324static unsigned int rx_lats = 7; 325static unsigned char pci_lat = 0; 326 327static const unsigned long onegigmask = -1 << 30; 328 329/********** access to adapter **********/ 330 331static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) { 332 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x", addr, data); 333#ifdef AMB_MMIO 334 dev->membase[addr / sizeof(u32)] = data; 335#else 336 outl (data, dev->iobase + addr); 337#endif 338} 339 340static inline u32 rd_plain (const amb_dev * dev, size_t addr) { 341#ifdef AMB_MMIO 342 u32 data = dev->membase[addr / sizeof(u32)]; 343#else 344 u32 data = inl (dev->iobase + addr); 345#endif 346 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x", addr, data); 347 return data; 348} 349 350static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) { 351 u32 be = cpu_to_be32 (data); 352 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x b[%08x]", addr, data, be); 353#ifdef AMB_MMIO 354 dev->membase[addr / sizeof(u32)] = be; 355#else 356 outl (be, dev->iobase + addr); 357#endif 358} 359 360static inline u32 rd_mem (const amb_dev * dev, size_t addr) { 361#ifdef AMB_MMIO 362 u32 be = dev->membase[addr / sizeof(u32)]; 363#else 364 u32 be = inl (dev->iobase + addr); 365#endif 366 u32 data = be32_to_cpu (be); 367 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x b[%08x]", addr, data, be); 368 return data; 369} 370 371/********** dump routines **********/ 372 373static inline void dump_registers (const amb_dev * dev) { 374#ifdef DEBUG_AMBASSADOR 375 if (debug & DBG_REGS) { 376 size_t i; 377 PRINTD (DBG_REGS, "reading PLX control: "); 378 for (i = 0x00; i < 0x30; i += sizeof(u32)) 379 rd_mem (dev, i); 380 PRINTD (DBG_REGS, "reading mailboxes: "); 381 for (i = 0x40; i < 0x60; i += sizeof(u32)) 382 rd_mem (dev, i); 383 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:"); 384 for (i = 0x60; i < 0x70; i += sizeof(u32)) 385 rd_mem (dev, i); 386 } 387#else 388 (void) dev; 389#endif 390 return; 391} 392 393static inline void dump_loader_block (volatile loader_block * lb) { 394#ifdef DEBUG_AMBASSADOR 395 unsigned int i; 396 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:", 397 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command)); 398 for (i = 0; i < MAX_COMMAND_DATA; ++i) 399 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i])); 400 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid)); 401#else 402 (void) lb; 403#endif 404 return; 405} 406 407static inline void dump_command (command * cmd) { 408#ifdef DEBUG_AMBASSADOR 409 unsigned int i; 410 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:", 411 cmd, /*be32_to_cpu*/ (cmd->request)); 412 for (i = 0; i < 3; ++i) 413 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i])); 414 PRINTDE (DBG_CMD, ""); 415#else 416 (void) cmd; 417#endif 418 return; 419} 420 421static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) { 422#ifdef DEBUG_AMBASSADOR 423 unsigned int i; 424 unsigned char * data = skb->data; 425 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc); 426 for (i=0; i<skb->len && i < 256;i++) 427 PRINTDM (DBG_DATA, "%02x ", data[i]); 428 PRINTDE (DBG_DATA,""); 429#else 430 (void) prefix; 431 (void) vc; 432 (void) skb; 433#endif 434 return; 435} 436 437/********** check memory areas for use by Ambassador **********/ 438 439/* see limitations under Hardware Features */ 440 441static inline int check_area (void * start, size_t length) { 442 // assumes length > 0 443 const u32 fourmegmask = -1 << 22; 444 const u32 twofivesixmask = -1 << 8; 445 const u32 starthole = 0xE0000000; 446 u32 startaddress = virt_to_bus (start); 447 u32 lastaddress = startaddress+length-1; 448 if ((startaddress ^ lastaddress) & fourmegmask || 449 (startaddress & twofivesixmask) == starthole) { 450 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!", 451 startaddress, lastaddress); 452 return -1; 453 } else { 454 return 0; 455 } 456} 457 458/********** free an skb (as per ATM device driver documentation) **********/ 459 460static inline void amb_kfree_skb (struct sk_buff * skb) { 461 if (ATM_SKB(skb)->vcc->pop) { 462 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb); 463 } else { 464 dev_kfree_skb_any (skb); 465 } 466} 467 468/********** TX completion **********/ 469 470static inline void tx_complete (amb_dev * dev, tx_out * tx) { 471 tx_simple * tx_descr = bus_to_virt (tx->handle); 472 struct sk_buff * skb = tx_descr->skb; 473 474 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx); 475 476 // VC layer stats 477 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx); 478 479 // free the descriptor 480 kfree (tx_descr); 481 482 // free the skb 483 amb_kfree_skb (skb); 484 485 dev->stats.tx_ok++; 486 return; 487} 488 489/********** RX completion **********/ 490 491static void rx_complete (amb_dev * dev, rx_out * rx) { 492 struct sk_buff * skb = bus_to_virt (rx->handle); 493 u16 vc = be16_to_cpu (rx->vc); 494 // unused: u16 lec_id = be16_to_cpu (rx->lec_id); 495 u16 status = be16_to_cpu (rx->status); 496 u16 rx_len = be16_to_cpu (rx->length); 497 498 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len); 499 500 // XXX move this in and add to VC stats ??? 501 if (!status) { 502 struct atm_vcc * atm_vcc = dev->rxer[vc]; 503 dev->stats.rx.ok++; 504 505 if (atm_vcc) { 506 507 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) { 508 509 if (atm_charge (atm_vcc, skb->truesize)) { 510 511 // prepare socket buffer 512 ATM_SKB(skb)->vcc = atm_vcc; 513 skb_put (skb, rx_len); 514 515 dump_skb ("<<<", vc, skb); 516 517 // VC layer stats 518 atomic_inc(&atm_vcc->stats->rx); 519 skb->stamp = xtime; 520 // end of our responsability 521 atm_vcc->push (atm_vcc, skb); 522 return; 523 524 } else { 525 // someone fix this (message), please! 526 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize); 527 // drop stats incremented in atm_charge 528 } 529 530 } else { 531 PRINTK (KERN_INFO, "dropped over-size frame"); 532 // should we count this? 533 atomic_inc(&atm_vcc->stats->rx_drop); 534 } 535 536 } else { 537 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc); 538 // this is an adapter bug, only in new version of microcode 539 } 540 541 } else { 542 dev->stats.rx.error++; 543 if (status & CRC_ERR) 544 dev->stats.rx.badcrc++; 545 if (status & LEN_ERR) 546 dev->stats.rx.toolong++; 547 if (status & ABORT_ERR) 548 dev->stats.rx.aborted++; 549 if (status & UNUSED_ERR) 550 dev->stats.rx.unused++; 551 } 552 553 dev_kfree_skb_any (skb); 554 return; 555} 556 557/* 558 559 Note on queue handling. 560 561 Here "give" and "take" refer to queue entries and a queue (pair) 562 rather than frames to or from the host or adapter. Empty frame 563 buffers are given to the RX queue pair and returned unused or 564 containing RX frames. TX frames (well, pointers to TX fragment 565 lists) are given to the TX queue pair, completions are returned. 566 567*/ 568 569/********** command queue **********/ 570 571// I really don't like this, but it's the best I can do at the moment 572 573// also, the callers are responsible for byte order as the microcode 574// sometimes does 16-bit accesses (yuk yuk yuk) 575 576static int command_do (amb_dev * dev, command * cmd) { 577 amb_cq * cq = &dev->cq; 578 volatile amb_cq_ptrs * ptrs = &cq->ptrs; 579 command * my_slot; 580 unsigned long timeout; 581 582 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev); 583 584 if (test_bit (dead, &dev->flags)) 585 return 0; 586 587 spin_lock (&cq->lock); 588 589 // if not full... 590 if (cq->pending < cq->maximum) { 591 // remember my slot for later 592 my_slot = ptrs->in; 593 PRINTD (DBG_CMD, "command in slot %p", my_slot); 594 595 dump_command (cmd); 596 597 // copy command in 598 *ptrs->in = *cmd; 599 cq->pending++; 600 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit); 601 602 // mail the command 603 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in)); 604 605 // prepare to wait for cq->pending milliseconds 606 // effectively one centisecond on i386 607 timeout = (cq->pending*HZ+999)/1000; 608 609 if (cq->pending > cq->high) 610 cq->high = cq->pending; 611 spin_unlock (&cq->lock); 612 613 while (timeout) { 614 // go to sleep 615 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout); 616 set_current_state(TASK_UNINTERRUPTIBLE); 617 timeout = schedule_timeout (timeout); 618 } 619 620 // wait for my slot to be reached (all waiters are here or above, until...) 621 while (ptrs->out != my_slot) { 622 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out); 623 set_current_state(TASK_UNINTERRUPTIBLE); 624 schedule(); 625 } 626 627 // wait on my slot (... one gets to its slot, and... ) 628 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) { 629 PRINTD (DBG_CMD, "wait: command slot completion"); 630 set_current_state(TASK_UNINTERRUPTIBLE); 631 schedule(); 632 } 633 634 PRINTD (DBG_CMD, "command complete"); 635 // update queue (... moves the queue along to the next slot) 636 spin_lock (&cq->lock); 637 cq->pending--; 638 // copy command out 639 *cmd = *ptrs->out; 640 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit); 641 spin_unlock (&cq->lock); 642 643 return 0; 644 } else { 645 cq->filled++; 646 spin_unlock (&cq->lock); 647 return -EAGAIN; 648 } 649 650} 651 652/********** TX queue pair **********/ 653 654static inline int tx_give (amb_dev * dev, tx_in * tx) { 655 amb_txq * txq = &dev->txq; 656 unsigned long flags; 657 658 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev); 659 660 if (test_bit (dead, &dev->flags)) 661 return 0; 662 663 spin_lock_irqsave (&txq->lock, flags); 664 665 if (txq->pending < txq->maximum) { 666 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr); 667 668 *txq->in.ptr = *tx; 669 txq->pending++; 670 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit); 671 // hand over the TX and ring the bell 672 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr)); 673 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME); 674 675 if (txq->pending > txq->high) 676 txq->high = txq->pending; 677 spin_unlock_irqrestore (&txq->lock, flags); 678 return 0; 679 } else { 680 txq->filled++; 681 spin_unlock_irqrestore (&txq->lock, flags); 682 return -EAGAIN; 683 } 684} 685 686static inline int tx_take (amb_dev * dev) { 687 amb_txq * txq = &dev->txq; 688 unsigned long flags; 689 690 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev); 691 692 spin_lock_irqsave (&txq->lock, flags); 693 694 if (txq->pending && txq->out.ptr->handle) { 695 // deal with TX completion 696 tx_complete (dev, txq->out.ptr); 697 // mark unused again 698 txq->out.ptr->handle = 0; 699 // remove item 700 txq->pending--; 701 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit); 702 703 spin_unlock_irqrestore (&txq->lock, flags); 704 return 0; 705 } else { 706 707 spin_unlock_irqrestore (&txq->lock, flags); 708 return -1; 709 } 710} 711 712/********** RX queue pairs **********/ 713 714static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) { 715 amb_rxq * rxq = &dev->rxq[pool]; 716 unsigned long flags; 717 718 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool); 719 720 spin_lock_irqsave (&rxq->lock, flags); 721 722 if (rxq->pending < rxq->maximum) { 723 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr); 724 725 *rxq->in.ptr = *rx; 726 rxq->pending++; 727 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit); 728 // hand over the RX buffer 729 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr)); 730 731 spin_unlock_irqrestore (&rxq->lock, flags); 732 return 0; 733 } else { 734 spin_unlock_irqrestore (&rxq->lock, flags); 735 return -1; 736 } 737} 738 739static inline int rx_take (amb_dev * dev, unsigned char pool) { 740 amb_rxq * rxq = &dev->rxq[pool]; 741 unsigned long flags; 742 743 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool); 744 745 spin_lock_irqsave (&rxq->lock, flags); 746 747 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) { 748 // deal with RX completion 749 rx_complete (dev, rxq->out.ptr); 750 // mark unused again 751 rxq->out.ptr->status = 0; 752 rxq->out.ptr->length = 0; 753 // remove item 754 rxq->pending--; 755 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit); 756 757 if (rxq->pending < rxq->low) 758 rxq->low = rxq->pending; 759 spin_unlock_irqrestore (&rxq->lock, flags); 760 return 0; 761 } else { 762 if (!rxq->pending && rxq->buffers_wanted) 763 rxq->emptied++; 764 spin_unlock_irqrestore (&rxq->lock, flags); 765 return -1; 766 } 767} 768 769/********** RX Pool handling **********/ 770 771/* pre: buffers_wanted = 0, post: pending = 0 */ 772static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) { 773 amb_rxq * rxq = &dev->rxq[pool]; 774 775 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool); 776 777 if (test_bit (dead, &dev->flags)) 778 return; 779 780 /* we are not quite like the fill pool routines as we cannot just 781 remove one buffer, we have to remove all of them, but we might as 782 well pretend... */ 783 if (rxq->pending > rxq->buffers_wanted) { 784 command cmd; 785 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q); 786 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT); 787 while (command_do (dev, &cmd)) 788 schedule(); 789 /* the pool may also be emptied via the interrupt handler */ 790 while (rxq->pending > rxq->buffers_wanted) 791 if (rx_take (dev, pool)) 792 schedule(); 793 } 794 795 return; 796} 797 798#ifdef MODULE 799static void drain_rx_pools (amb_dev * dev) { 800 unsigned char pool; 801 802 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev); 803 804 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 805 drain_rx_pool (dev, pool); 806 807 return; 808} 809#endif 810 811static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) { 812 rx_in rx; 813 amb_rxq * rxq; 814 815 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority); 816 817 if (test_bit (dead, &dev->flags)) 818 return; 819 820 rxq = &dev->rxq[pool]; 821 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) { 822 823 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority); 824 if (!skb) { 825 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool); 826 return; 827 } 828 if (check_area (skb->data, skb->truesize)) { 829 dev_kfree_skb_any (skb); 830 return; 831 } 832 // cast needed as there is no %? for pointer differences 833 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li", 834 skb, skb->head, (long) (skb->end - skb->head)); 835 rx.handle = virt_to_bus (skb); 836 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data)); 837 if (rx_give (dev, &rx, pool)) 838 dev_kfree_skb_any (skb); 839 840 } 841 842 return; 843} 844 845// top up all RX pools (can also be called as a bottom half) 846static void fill_rx_pools (amb_dev * dev) { 847 unsigned char pool; 848 849 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev); 850 851 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 852 fill_rx_pool (dev, pool, GFP_ATOMIC); 853 854 return; 855} 856 857/********** enable host interrupts **********/ 858 859static inline void interrupts_on (amb_dev * dev) { 860 wr_plain (dev, offsetof(amb_mem, interrupt_control), 861 rd_plain (dev, offsetof(amb_mem, interrupt_control)) 862 | AMB_INTERRUPT_BITS); 863} 864 865/********** disable host interrupts **********/ 866 867static inline void interrupts_off (amb_dev * dev) { 868 wr_plain (dev, offsetof(amb_mem, interrupt_control), 869 rd_plain (dev, offsetof(amb_mem, interrupt_control)) 870 &~ AMB_INTERRUPT_BITS); 871} 872 873/********** interrupt handling **********/ 874 875static void interrupt_handler (int irq, void * dev_id, struct pt_regs * pt_regs) { 876 amb_dev * dev = amb_devs; 877 (void) pt_regs; 878 879 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id); 880 881 if (!dev_id) { 882 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq); 883 return; 884 } 885 // Did one of our cards generate the interrupt? 886 while (dev) { 887 if (dev == dev_id) 888 break; 889 dev = dev->prev; 890 } 891 // impossible - unless we add the device to our list after both 892 // registering the IRQ handler for it and enabling interrupts, AND 893 // the card generates an IRQ at startup - should not happen again 894 if (!dev) { 895 PRINTD (DBG_IRQ, "irq for unknown device: %d", irq); 896 return; 897 } 898 // impossible - unless we have memory corruption of dev or kernel 899 if (irq != dev->irq) { 900 PRINTD (DBG_IRQ|DBG_ERR, "irq mismatch: %d", irq); 901 return; 902 } 903 904 { 905 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt)); 906 907 // for us or someone else sharing the same interrupt 908 if (!interrupt) { 909 PRINTD (DBG_IRQ, "irq not for me: %d", irq); 910 return; 911 } 912 913 // definitely for us 914 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt); 915 wr_plain (dev, offsetof(amb_mem, interrupt), -1); 916 } 917 918 { 919 unsigned int irq_work = 0; 920 unsigned char pool; 921 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 922 while (!rx_take (dev, pool)) 923 ++irq_work; 924 while (!tx_take (dev)) 925 ++irq_work; 926 927 if (irq_work) { 928#ifdef FILL_RX_POOLS_IN_BH 929 queue_task (&dev->bh, &tq_immediate); 930 mark_bh (IMMEDIATE_BH); 931#else 932 fill_rx_pools (dev); 933#endif 934 935 PRINTD (DBG_IRQ, "work done: %u", irq_work); 936 } else { 937 PRINTD (DBG_IRQ|DBG_WARN, "no work done"); 938 } 939 } 940 941 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id); 942 return; 943} 944 945/********** don't panic... yeah, right **********/ 946 947#ifdef DEBUG_AMBASSADOR 948static void dont_panic (amb_dev * dev) { 949 amb_cq * cq = &dev->cq; 950 volatile amb_cq_ptrs * ptrs = &cq->ptrs; 951 amb_txq * txq; 952 amb_rxq * rxq; 953 command * cmd; 954 tx_in * tx; 955 tx_simple * tx_descr; 956 unsigned char pool; 957 rx_in * rx; 958 959 unsigned long flags; 960 save_flags (flags); 961 cli(); 962 963 PRINTK (KERN_INFO, "don't panic - putting adapter into reset"); 964 wr_plain (dev, offsetof(amb_mem, reset_control), 965 rd_plain (dev, offsetof(amb_mem, reset_control)) | AMB_RESET_BITS); 966 967 PRINTK (KERN_INFO, "marking all commands complete"); 968 for (cmd = ptrs->start; cmd < ptrs->limit; ++cmd) 969 cmd->request = cpu_to_be32 (SRB_COMPLETE); 970 971 PRINTK (KERN_INFO, "completing all TXs"); 972 txq = &dev->txq; 973 tx = txq->in.ptr; 974 while (txq->pending--) { 975 if (tx == txq->in.start) 976 tx = txq->in.limit; 977 --tx; 978 tx_descr = bus_to_virt (be32_to_cpu (tx->tx_descr_addr)); 979 amb_kfree_skb (tx_descr->skb); 980 kfree (tx_descr); 981 } 982 983 PRINTK (KERN_INFO, "freeing all RX buffers"); 984 for (pool = 0; pool < NUM_RX_POOLS; ++pool) { 985 rxq = &dev->rxq[pool]; 986 rx = rxq->in.ptr; 987 while (rxq->pending--) { 988 if (rx == rxq->in.start) 989 rx = rxq->in.limit; 990 --rx; 991 dev_kfree_skb_any (bus_to_virt (rx->handle)); 992 } 993 } 994 995 PRINTK (KERN_INFO, "don't panic over - close all VCs and rmmod"); 996 set_bit (dead, &dev->flags); 997 restore_flags (flags); 998 return; 999} 1000#endif 1001 1002/********** make rate (not quite as much fun as Horizon) **********/ 1003 1004static unsigned int make_rate (unsigned int rate, rounding r, 1005 u16 * bits, unsigned int * actual) { 1006 unsigned char exp = -1; // hush gcc 1007 unsigned int man = -1; // hush gcc 1008 1009 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate); 1010 1011 // rates in cells per second, ITU format (nasty 16-bit floating-point) 1012 // given 5-bit e and 9-bit m: 1013 // rate = EITHER (1+m/2^9)*2^e OR 0 1014 // bits = EITHER 1<<14 | e<<9 | m OR 0 1015 // (bit 15 is "reserved", bit 14 "non-zero") 1016 // smallest rate is 0 (special representation) 1017 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1) 1018 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0) 1019 // simple algorithm: 1020 // find position of top bit, this gives e 1021 // remove top bit and shift (rounding if feeling clever) by 9-e 1022 1023 // ucode bug: please don't set bit 14! so 0 rate not representable 1024 1025 if (rate > 0xffc00000U) { 1026 // larger than largest representable rate 1027 1028 if (r == round_up) { 1029 return -EINVAL; 1030 } else { 1031 exp = 31; 1032 man = 511; 1033 } 1034 1035 } else if (rate) { 1036 // representable rate 1037 1038 exp = 31; 1039 man = rate; 1040 1041 // invariant: rate = man*2^(exp-31) 1042 while (!(man & (1<<31))) { 1043 exp = exp - 1; 1044 man = man<<1; 1045 } 1046 1047 // man has top bit set 1048 // rate = (2^31+(man-2^31))*2^(exp-31) 1049 // rate = (1+(man-2^31)/2^31)*2^exp 1050 man = man<<1; 1051 man &= 0xffffffffU; // a nop on 32-bit systems 1052 // rate = (1+man/2^32)*2^exp 1053 1054 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1 1055 // time to lose significance... we want m in the range 0 to 2^9-1 1056 // rounding presents a minor problem... we first decide which way 1057 // we are rounding (based on given rounding direction and possibly 1058 // the bits of the mantissa that are to be discarded). 1059 1060 switch (r) { 1061 case round_down: { 1062 // just truncate 1063 man = man>>(32-9); 1064 break; 1065 } 1066 case round_up: { 1067 // check all bits that we are discarding 1068 if (man & (-1>>9)) { 1069 man = (man>>(32-9)) + 1; 1070 if (man == (1<<9)) { 1071 // no need to check for round up outside of range 1072 man = 0; 1073 exp += 1; 1074 } 1075 } else { 1076 man = (man>>(32-9)); 1077 } 1078 break; 1079 } 1080 case round_nearest: { 1081 // check msb that we are discarding 1082 if (man & (1<<(32-9-1))) { 1083 man = (man>>(32-9)) + 1; 1084 if (man == (1<<9)) { 1085 // no need to check for round up outside of range 1086 man = 0; 1087 exp += 1; 1088 } 1089 } else { 1090 man = (man>>(32-9)); 1091 } 1092 break; 1093 } 1094 } 1095 1096 } else { 1097 // zero rate - not representable 1098 1099 if (r == round_down) { 1100 return -EINVAL; 1101 } else { 1102 exp = 0; 1103 man = 0; 1104 } 1105 1106 } 1107 1108 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp); 1109 1110 if (bits) 1111 *bits = /* (1<<14) | */ (exp<<9) | man; 1112 1113 if (actual) 1114 *actual = (exp >= 9) 1115 ? (1 << exp) + (man << (exp-9)) 1116 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp)); 1117 1118 return 0; 1119} 1120 1121/********** Linux ATM Operations **********/ 1122 1123// some are not yet implemented while others do not make sense for 1124// this device 1125 1126/********** Open a VC **********/ 1127 1128static int amb_open (struct atm_vcc * atm_vcc, short vpi, int vci) { 1129 int error; 1130 1131 struct atm_qos * qos; 1132 struct atm_trafprm * txtp; 1133 struct atm_trafprm * rxtp; 1134 u16 tx_rate_bits; 1135 u16 tx_vc_bits = -1; // hush gcc 1136 u16 tx_frame_bits = -1; // hush gcc 1137 1138 amb_dev * dev = AMB_DEV(atm_vcc->dev); 1139 amb_vcc * vcc; 1140 unsigned char pool = -1; // hush gcc 1141 1142 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci); 1143 1144#ifdef ATM_VPI_UNSPEC 1145 // UNSPEC is deprecated, remove this code eventually 1146 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) { 1147 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)"); 1148 return -EINVAL; 1149 } 1150#endif 1151 1152 // deal with possibly wildcarded VCs 1153 error = atm_find_ci (atm_vcc, &vpi, &vci); 1154 if (error) { 1155 PRINTD (DBG_WARN|DBG_VCC, "atm_find_ci failed!"); 1156 return error; 1157 } 1158 PRINTD (DBG_VCC, "atm_find_ci gives %x %x", vpi, vci); 1159 1160 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) && 1161 0 <= vci && vci < (1<<NUM_VCI_BITS))) { 1162 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci); 1163 return -EINVAL; 1164 } 1165 1166 qos = &atm_vcc->qos; 1167 1168 if (qos->aal != ATM_AAL5) { 1169 PRINTD (DBG_QOS, "AAL not supported"); 1170 return -EINVAL; 1171 } 1172 1173 // traffic parameters 1174 1175 PRINTD (DBG_QOS, "TX:"); 1176 txtp = &qos->txtp; 1177 if (txtp->traffic_class != ATM_NONE) { 1178 switch (txtp->traffic_class) { 1179 case ATM_UBR: { 1180 // we take "the PCR" as a rate-cap 1181 int pcr = atm_pcr_goal (txtp); 1182 if (!pcr) { 1183 // no rate cap 1184 tx_rate_bits = 0; 1185 tx_vc_bits = TX_UBR; 1186 tx_frame_bits = TX_FRAME_NOTCAP; 1187 } else { 1188 rounding r; 1189 if (pcr < 0) { 1190 r = round_down; 1191 pcr = -pcr; 1192 } else { 1193 r = round_up; 1194 } 1195 error = make_rate (pcr, r, &tx_rate_bits, 0); 1196 tx_vc_bits = TX_UBR_CAPPED; 1197 tx_frame_bits = TX_FRAME_CAPPED; 1198 } 1199 break; 1200 } 1201#if 0 1202 case ATM_ABR: { 1203 pcr = atm_pcr_goal (txtp); 1204 PRINTD (DBG_QOS, "pcr goal = %d", pcr); 1205 break; 1206 } 1207#endif 1208 default: { 1209 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied"); 1210 PRINTD (DBG_QOS, "request for non-UBR denied"); 1211 return -EINVAL; 1212 } 1213 } 1214 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx", 1215 tx_rate_bits, tx_vc_bits); 1216 } 1217 1218 PRINTD (DBG_QOS, "RX:"); 1219 rxtp = &qos->rxtp; 1220 if (rxtp->traffic_class == ATM_NONE) { 1221 // do nothing 1222 } else { 1223 // choose an RX pool (arranged in increasing size) 1224 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 1225 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) { 1226 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)", 1227 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size); 1228 break; 1229 } 1230 if (pool == NUM_RX_POOLS) { 1231 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL, 1232 "no pool suitable for VC (RX max_sdu %d is too large)", 1233 rxtp->max_sdu); 1234 return -EINVAL; 1235 } 1236 1237 switch (rxtp->traffic_class) { 1238 case ATM_UBR: { 1239 break; 1240 } 1241#if 0 1242 case ATM_ABR: { 1243 pcr = atm_pcr_goal (rxtp); 1244 PRINTD (DBG_QOS, "pcr goal = %d", pcr); 1245 break; 1246 } 1247#endif 1248 default: { 1249 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied"); 1250 PRINTD (DBG_QOS, "request for non-UBR denied"); 1251 return -EINVAL; 1252 } 1253 } 1254 } 1255 1256 // get space for our vcc stuff 1257 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL); 1258 if (!vcc) { 1259 PRINTK (KERN_ERR, "out of memory!"); 1260 return -ENOMEM; 1261 } 1262 atm_vcc->dev_data = (void *) vcc; 1263 1264 // no failures beyond this point 1265 1266 // we are not really "immediately before allocating the connection 1267 // identifier in hardware", but it will just have to do! 1268 set_bit(ATM_VF_ADDR,&atm_vcc->flags); 1269 1270 if (txtp->traffic_class != ATM_NONE) { 1271 command cmd; 1272 1273 vcc->tx_frame_bits = tx_frame_bits; 1274 1275 down (&dev->vcc_sf); 1276 if (dev->rxer[vci]) { 1277 // RXer on the channel already, just modify rate... 1278 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE); 1279 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0 1280 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT); 1281 while (command_do (dev, &cmd)) 1282 schedule(); 1283 // ... and TX flags, preserving the RX pool 1284 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS); 1285 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0 1286 cmd.args.modify_flags.flags = cpu_to_be32 1287 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT) 1288 | (tx_vc_bits << SRB_FLAGS_SHIFT) ); 1289 while (command_do (dev, &cmd)) 1290 schedule(); 1291 } else { 1292 // no RXer on the channel, just open (with pool zero) 1293 cmd.request = cpu_to_be32 (SRB_OPEN_VC); 1294 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0 1295 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT); 1296 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT); 1297 while (command_do (dev, &cmd)) 1298 schedule(); 1299 } 1300 dev->txer[vci].tx_present = 1; 1301 up (&dev->vcc_sf); 1302 } 1303 1304 if (rxtp->traffic_class != ATM_NONE) { 1305 command cmd; 1306 1307 vcc->rx_info.pool = pool; 1308 1309 down (&dev->vcc_sf); 1310 /* grow RX buffer pool */ 1311 if (!dev->rxq[pool].buffers_wanted) 1312 dev->rxq[pool].buffers_wanted = rx_lats; 1313 dev->rxq[pool].buffers_wanted += 1; 1314 fill_rx_pool (dev, pool, GFP_KERNEL); 1315 1316 if (dev->txer[vci].tx_present) { 1317 // TXer on the channel already 1318 // switch (from pool zero) to this pool, preserving the TX bits 1319 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS); 1320 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0 1321 cmd.args.modify_flags.flags = cpu_to_be32 1322 ( (pool << SRB_POOL_SHIFT) 1323 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) ); 1324 } else { 1325 // no TXer on the channel, open the VC (with no rate info) 1326 cmd.request = cpu_to_be32 (SRB_OPEN_VC); 1327 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0 1328 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT); 1329 cmd.args.open.rate = cpu_to_be32 (0); 1330 } 1331 while (command_do (dev, &cmd)) 1332 schedule(); 1333 // this link allows RX frames through 1334 dev->rxer[vci] = atm_vcc; 1335 up (&dev->vcc_sf); 1336 } 1337 1338 // set elements of vcc 1339 atm_vcc->vpi = vpi; // 0 1340 atm_vcc->vci = vci; 1341 1342 // indicate readiness 1343 set_bit(ATM_VF_READY,&atm_vcc->flags); 1344 1345 return 0; 1346} 1347 1348/********** Close a VC **********/ 1349 1350static void amb_close (struct atm_vcc * atm_vcc) { 1351 amb_dev * dev = AMB_DEV (atm_vcc->dev); 1352 amb_vcc * vcc = AMB_VCC (atm_vcc); 1353 u16 vci = atm_vcc->vci; 1354 1355 PRINTD (DBG_VCC|DBG_FLOW, "amb_close"); 1356 1357 // indicate unreadiness 1358 clear_bit(ATM_VF_READY,&atm_vcc->flags); 1359 1360 // disable TXing 1361 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) { 1362 command cmd; 1363 1364 down (&dev->vcc_sf); 1365 if (dev->rxer[vci]) { 1366 // RXer still on the channel, just modify rate... XXX not really needed 1367 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE); 1368 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0 1369 cmd.args.modify_rate.rate = cpu_to_be32 (0); 1370 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool 1371 } else { 1372 // no RXer on the channel, close channel 1373 cmd.request = cpu_to_be32 (SRB_CLOSE_VC); 1374 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0 1375 } 1376 dev->txer[vci].tx_present = 0; 1377 while (command_do (dev, &cmd)) 1378 schedule(); 1379 up (&dev->vcc_sf); 1380 } 1381 1382 // disable RXing 1383 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) { 1384 command cmd; 1385 1386 // this is (the?) one reason why we need the amb_vcc struct 1387 unsigned char pool = vcc->rx_info.pool; 1388 1389 down (&dev->vcc_sf); 1390 if (dev->txer[vci].tx_present) { 1391 // TXer still on the channel, just go to pool zero XXX not really needed 1392 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS); 1393 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0 1394 cmd.args.modify_flags.flags = cpu_to_be32 1395 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT); 1396 } else { 1397 // no TXer on the channel, close the VC 1398 cmd.request = cpu_to_be32 (SRB_CLOSE_VC); 1399 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0 1400 } 1401 // forget the rxer - no more skbs will be pushed 1402 if (atm_vcc != dev->rxer[vci]) 1403 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p", 1404 "arghhh! we're going to die!", 1405 vcc, dev->rxer[vci]); 1406 dev->rxer[vci] = 0; 1407 while (command_do (dev, &cmd)) 1408 schedule(); 1409 1410 /* shrink RX buffer pool */ 1411 dev->rxq[pool].buffers_wanted -= 1; 1412 if (dev->rxq[pool].buffers_wanted == rx_lats) { 1413 dev->rxq[pool].buffers_wanted = 0; 1414 drain_rx_pool (dev, pool); 1415 } 1416 up (&dev->vcc_sf); 1417 } 1418 1419 // free our structure 1420 kfree (vcc); 1421 1422 // say the VPI/VCI is free again 1423 clear_bit(ATM_VF_ADDR,&atm_vcc->flags); 1424 1425 return; 1426} 1427 1428/********** DebugIoctl **********/ 1429 1430#if 0 1431static int amb_ioctl (struct atm_dev * dev, unsigned int cmd, void * arg) { 1432 unsigned short newdebug; 1433 if (cmd == AMB_SETDEBUG) { 1434 if (!capable(CAP_NET_ADMIN)) 1435 return -EPERM; 1436 if (copy_from_user (&newdebug, arg, sizeof(newdebug))) { 1437 // moan 1438 return -EFAULT; 1439 } else { 1440 debug = newdebug; 1441 return 0; 1442 } 1443 } else if (cmd == AMB_DONTPANIC) { 1444 if (!capable(CAP_NET_ADMIN)) 1445 return -EPERM; 1446 dont_panic (dev); 1447 } else { 1448 // moan 1449 return -ENOIOCTLCMD; 1450 } 1451} 1452#endif 1453 1454/********** Set socket options for a VC **********/ 1455 1456// int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen); 1457 1458/********** Set socket options for a VC **********/ 1459 1460// int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen); 1461 1462/********** Send **********/ 1463 1464static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) { 1465 amb_dev * dev = AMB_DEV(atm_vcc->dev); 1466 amb_vcc * vcc = AMB_VCC(atm_vcc); 1467 u16 vc = atm_vcc->vci; 1468 unsigned int tx_len = skb->len; 1469 unsigned char * tx_data = skb->data; 1470 tx_simple * tx_descr; 1471 tx_in tx; 1472 1473 if (test_bit (dead, &dev->flags)) 1474 return -EIO; 1475 1476 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u", 1477 vc, tx_data, tx_len); 1478 1479 dump_skb (">>>", vc, skb); 1480 1481 if (!dev->txer[vc].tx_present) { 1482 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc); 1483 return -EBADFD; 1484 } 1485 1486 // this is a driver private field so we have to set it ourselves, 1487 // despite the fact that we are _required_ to use it to check for a 1488 // pop function 1489 ATM_SKB(skb)->vcc = atm_vcc; 1490 1491 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) { 1492 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping..."); 1493 return -EIO; 1494 } 1495 1496 if (check_area (skb->data, skb->len)) { 1497 atomic_inc(&atm_vcc->stats->tx_err); 1498 return -ENOMEM; // ? 1499 } 1500 1501 // allocate memory for fragments 1502 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL); 1503 if (!tx_descr) { 1504 PRINTK (KERN_ERR, "could not allocate TX descriptor"); 1505 return -ENOMEM; 1506 } 1507 if (check_area (tx_descr, sizeof(tx_simple))) { 1508 kfree (tx_descr); 1509 return -ENOMEM; 1510 } 1511 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr); 1512 1513 tx_descr->skb = skb; 1514 1515 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len); 1516 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data)); 1517 1518 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr); 1519 tx_descr->tx_frag_end.vc = 0; 1520 tx_descr->tx_frag_end.next_descriptor_length = 0; 1521 tx_descr->tx_frag_end.next_descriptor = 0; 1522#ifdef AMB_NEW_MICROCODE 1523 tx_descr->tx_frag_end.cpcs_uu = 0; 1524 tx_descr->tx_frag_end.cpi = 0; 1525 tx_descr->tx_frag_end.pad = 0; 1526#endif 1527 1528 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc); 1529 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end)); 1530 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag)); 1531 1532#ifdef DEBUG_AMBASSADOR 1533 /* wey-hey! */ 1534 if (vc == 1023) { 1535 unsigned int i; 1536 unsigned short d = 0; 1537 char * s = skb->data; 1538 switch (*s++) { 1539 case 'D': { 1540 for (i = 0; i < 4; ++i) { 1541 d = (d<<4) | ((*s <= '9') ? (*s - '0') : (*s - 'a' + 10)); 1542 ++s; 1543 } 1544 PRINTK (KERN_INFO, "debug bitmap is now %hx", debug = d); 1545 break; 1546 } 1547 case 'R': { 1548 if (*s++ == 'e' && *s++ == 's' && *s++ == 'e' && *s++ == 't') 1549 dont_panic (dev); 1550 break; 1551 } 1552 default: { 1553 break; 1554 } 1555 } 1556 } 1557#endif 1558 1559 while (tx_give (dev, &tx)) 1560 schedule(); 1561 return 0; 1562} 1563 1564/********** Scatter Gather Send Capability **********/ 1565 1566static int amb_sg_send (struct atm_vcc * atm_vcc, 1567 unsigned long start, 1568 unsigned long size) { 1569 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: never"); 1570 return 0; 1571 if (atm_vcc->qos.aal == ATM_AAL5) { 1572 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: yes"); 1573 return 1; 1574 } else { 1575 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: no"); 1576 return 0; 1577 } 1578 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: always"); 1579 return 1; 1580} 1581 1582/********** Send OAM **********/ 1583 1584// static int amb_send_oam (struct atm_vcc * atm_vcc, void * cell, int flags); 1585 1586/********** Feedback to Driver **********/ 1587 1588// void amb_feedback (struct atm_vcc * atm_vcc, struct sk_buff * skb, 1589// unsigned long start, unsigned long dest, int len); 1590 1591/********** Change QoS on a VC **********/ 1592 1593// int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags); 1594 1595/********** Free RX Socket Buffer **********/ 1596 1597#if 0 1598static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) { 1599 amb_dev * dev = AMB_DEV (atm_vcc->dev); 1600 amb_vcc * vcc = AMB_VCC (atm_vcc); 1601 unsigned char pool = vcc->rx_info.pool; 1602 rx_in rx; 1603 1604 // This may be unsafe for various reasons that I cannot really guess 1605 // at. However, I note that the ATM layer calls kfree_skb rather 1606 // than dev_kfree_skb at this point so we are least covered as far 1607 // as buffer locking goes. There may be bugs if pcap clones RX skbs. 1608 1609 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)", 1610 skb, atm_vcc, vcc); 1611 1612 rx.handle = virt_to_bus (skb); 1613 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data)); 1614 1615 skb->data = skb->head; 1616 skb->tail = skb->head; 1617 skb->len = 0; 1618 1619 if (!rx_give (dev, &rx, pool)) { 1620 // success 1621 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool); 1622 return; 1623 } 1624 1625 // just do what the ATM layer would have done 1626 dev_kfree_skb_any (skb); 1627 1628 return; 1629} 1630#endif 1631 1632/********** Proc File Output **********/ 1633 1634static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) { 1635 amb_dev * dev = AMB_DEV (atm_dev); 1636 int left = *pos; 1637 unsigned char pool; 1638 1639 PRINTD (DBG_FLOW, "amb_proc_read"); 1640 1641 /* more diagnostics here? */ 1642 1643 if (!left--) { 1644 amb_stats * s = &dev->stats; 1645 return sprintf (page, 1646 "frames: TX OK %lu, RX OK %lu, RX bad %lu " 1647 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n", 1648 s->tx_ok, s->rx.ok, s->rx.error, 1649 s->rx.badcrc, s->rx.toolong, 1650 s->rx.aborted, s->rx.unused); 1651 } 1652 1653 if (!left--) { 1654 amb_cq * c = &dev->cq; 1655 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ", 1656 c->pending, c->high, c->maximum); 1657 } 1658 1659 if (!left--) { 1660 amb_txq * t = &dev->txq; 1661 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n", 1662 t->pending, t->maximum, t->high, t->filled); 1663 } 1664 1665 if (!left--) { 1666 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:"); 1667 for (pool = 0; pool < NUM_RX_POOLS; ++pool) { 1668 amb_rxq * r = &dev->rxq[pool]; 1669 count += sprintf (page+count, " %u/%u/%u %u %u", 1670 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied); 1671 } 1672 count += sprintf (page+count, ".\n"); 1673 return count; 1674 } 1675 1676 if (!left--) { 1677 unsigned int count = sprintf (page, "RX buffer sizes:"); 1678 for (pool = 0; pool < NUM_RX_POOLS; ++pool) { 1679 amb_rxq * r = &dev->rxq[pool]; 1680 count += sprintf (page+count, " %u", r->buffer_size); 1681 } 1682 count += sprintf (page+count, ".\n"); 1683 return count; 1684 } 1685 1686#if 0 1687 if (!left--) { 1688 // suni block etc? 1689 } 1690#endif 1691 1692 return 0; 1693} 1694 1695/********** Operation Structure **********/ 1696 1697static const struct atmdev_ops amb_ops = { 1698 open: amb_open, 1699 close: amb_close, 1700 send: amb_send, 1701 sg_send: amb_sg_send, 1702 proc_read: amb_proc_read, 1703 owner: THIS_MODULE, 1704}; 1705 1706/********** housekeeping **********/ 1707 1708static inline void set_timer (struct timer_list * timer, unsigned long delay) { 1709 timer->expires = jiffies + delay; 1710 add_timer (timer); 1711 return; 1712} 1713 1714static void do_housekeeping (unsigned long arg) { 1715 amb_dev * dev = amb_devs; 1716 // data is set to zero at module unload 1717 (void) arg; 1718 1719 if (housekeeping.data) { 1720 while (dev) { 1721 1722 // could collect device-specific (not driver/atm-linux) stats here 1723 1724 // last resort refill once every ten seconds 1725 fill_rx_pools (dev); 1726 1727 dev = dev->prev; 1728 } 1729 set_timer (&housekeeping, 10*HZ); 1730 } 1731 1732 return; 1733} 1734 1735/********** creation of communication queues **********/ 1736 1737static int __init create_queues (amb_dev * dev, unsigned int cmds, 1738 unsigned int txs, unsigned int * rxs, 1739 unsigned int * rx_buffer_sizes) { 1740 unsigned char pool; 1741 size_t total = 0; 1742 void * memory; 1743 void * limit; 1744 1745 PRINTD (DBG_FLOW, "create_queues %p", dev); 1746 1747 total += cmds * sizeof(command); 1748 1749 total += txs * (sizeof(tx_in) + sizeof(tx_out)); 1750 1751 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 1752 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out)); 1753 1754 memory = kmalloc (total, GFP_KERNEL); 1755 if (!memory) { 1756 PRINTK (KERN_ERR, "could not allocate queues"); 1757 return -ENOMEM; 1758 } 1759 if (check_area (memory, total)) { 1760 PRINTK (KERN_ERR, "queues allocated in nasty area"); 1761 kfree (memory); 1762 return -ENOMEM; 1763 } 1764 1765 limit = memory + total; 1766 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit); 1767 1768 PRINTD (DBG_CMD, "command queue at %p", memory); 1769 1770 { 1771 command * cmd = memory; 1772 amb_cq * cq = &dev->cq; 1773 1774 cq->pending = 0; 1775 cq->high = 0; 1776 cq->maximum = cmds - 1; 1777 1778 cq->ptrs.start = cmd; 1779 cq->ptrs.in = cmd; 1780 cq->ptrs.out = cmd; 1781 cq->ptrs.limit = cmd + cmds; 1782 1783 memory = cq->ptrs.limit; 1784 } 1785 1786 PRINTD (DBG_TX, "TX queue pair at %p", memory); 1787 1788 { 1789 tx_in * in = memory; 1790 tx_out * out; 1791 amb_txq * txq = &dev->txq; 1792 1793 txq->pending = 0; 1794 txq->high = 0; 1795 txq->filled = 0; 1796 txq->maximum = txs - 1; 1797 1798 txq->in.start = in; 1799 txq->in.ptr = in; 1800 txq->in.limit = in + txs; 1801 1802 memory = txq->in.limit; 1803 out = memory; 1804 1805 txq->out.start = out; 1806 txq->out.ptr = out; 1807 txq->out.limit = out + txs; 1808 1809 memory = txq->out.limit; 1810 } 1811 1812 PRINTD (DBG_RX, "RX queue pairs at %p", memory); 1813 1814 for (pool = 0; pool < NUM_RX_POOLS; ++pool) { 1815 rx_in * in = memory; 1816 rx_out * out; 1817 amb_rxq * rxq = &dev->rxq[pool]; 1818 1819 rxq->buffer_size = rx_buffer_sizes[pool]; 1820 rxq->buffers_wanted = 0; 1821 1822 rxq->pending = 0; 1823 rxq->low = rxs[pool] - 1; 1824 rxq->emptied = 0; 1825 rxq->maximum = rxs[pool] - 1; 1826 1827 rxq->in.start = in; 1828 rxq->in.ptr = in; 1829 rxq->in.limit = in + rxs[pool]; 1830 1831 memory = rxq->in.limit; 1832 out = memory; 1833 1834 rxq->out.start = out; 1835 rxq->out.ptr = out; 1836 rxq->out.limit = out + rxs[pool]; 1837 1838 memory = rxq->out.limit; 1839 } 1840 1841 if (memory == limit) { 1842 return 0; 1843 } else { 1844 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit); 1845 kfree (limit - total); 1846 return -ENOMEM; 1847 } 1848 1849} 1850 1851/********** destruction of communication queues **********/ 1852 1853static void destroy_queues (amb_dev * dev) { 1854 // all queues assumed empty 1855 void * memory = dev->cq.ptrs.start; 1856 // includes txq.in, txq.out, rxq[].in and rxq[].out 1857 1858 PRINTD (DBG_FLOW, "destroy_queues %p", dev); 1859 1860 PRINTD (DBG_INIT, "freeing queues at %p", memory); 1861 kfree (memory); 1862 1863 return; 1864} 1865 1866/********** basic loader commands and error handling **********/ 1867 1868static int __init do_loader_command (volatile loader_block * lb, 1869 const amb_dev * dev, loader_command cmd) { 1870 // centisecond timeouts - guessing away here 1871 unsigned int command_timeouts [] = { 1872 [host_memory_test] = 15, 1873 [read_adapter_memory] = 2, 1874 [write_adapter_memory] = 2, 1875 [adapter_start] = 50, 1876 [get_version_number] = 10, 1877 [interrupt_host] = 1, 1878 [flash_erase_sector] = 1, 1879 [adap_download_block] = 1, 1880 [adap_erase_flash] = 1, 1881 [adap_run_in_iram] = 1, 1882 [adap_end_download] = 1 1883 }; 1884 1885 unsigned int command_successes [] = { 1886 [host_memory_test] = COMMAND_PASSED_TEST, 1887 [read_adapter_memory] = COMMAND_READ_DATA_OK, 1888 [write_adapter_memory] = COMMAND_WRITE_DATA_OK, 1889 [adapter_start] = COMMAND_COMPLETE, 1890 [get_version_number] = COMMAND_COMPLETE, 1891 [interrupt_host] = COMMAND_COMPLETE, 1892 [flash_erase_sector] = COMMAND_COMPLETE, 1893 [adap_download_block] = COMMAND_COMPLETE, 1894 [adap_erase_flash] = COMMAND_COMPLETE, 1895 [adap_run_in_iram] = COMMAND_COMPLETE, 1896 [adap_end_download] = COMMAND_COMPLETE 1897 }; 1898 1899 int decode_loader_result (loader_command cmd, u32 result) { 1900 int res; 1901 const char * msg; 1902 1903 if (result == command_successes[cmd]) 1904 return 0; 1905 1906 switch (result) { 1907 case BAD_COMMAND: 1908 res = -EINVAL; 1909 msg = "bad command"; 1910 break; 1911 case COMMAND_IN_PROGRESS: 1912 res = -ETIMEDOUT; 1913 msg = "command in progress"; 1914 break; 1915 case COMMAND_PASSED_TEST: 1916 res = 0; 1917 msg = "command passed test"; 1918 break; 1919 case COMMAND_FAILED_TEST: 1920 res = -EIO; 1921 msg = "command failed test"; 1922 break; 1923 case COMMAND_READ_DATA_OK: 1924 res = 0; 1925 msg = "command read data ok"; 1926 break; 1927 case COMMAND_READ_BAD_ADDRESS: 1928 res = -EINVAL; 1929 msg = "command read bad address"; 1930 break; 1931 case COMMAND_WRITE_DATA_OK: 1932 res = 0; 1933 msg = "command write data ok"; 1934 break; 1935 case COMMAND_WRITE_BAD_ADDRESS: 1936 res = -EINVAL; 1937 msg = "command write bad address"; 1938 break; 1939 case COMMAND_WRITE_FLASH_FAILURE: 1940 res = -EIO; 1941 msg = "command write flash failure"; 1942 break; 1943 case COMMAND_COMPLETE: 1944 res = 0; 1945 msg = "command complete"; 1946 break; 1947 case COMMAND_FLASH_ERASE_FAILURE: 1948 res = -EIO; 1949 msg = "command flash erase failure"; 1950 break; 1951 case COMMAND_WRITE_BAD_DATA: 1952 res = -EINVAL; 1953 msg = "command write bad data"; 1954 break; 1955 default: 1956 res = -EINVAL; 1957 msg = "unknown error"; 1958 PRINTD (DBG_LOAD|DBG_ERR, "decode_loader_result got %d=%x !", 1959 result, result); 1960 break; 1961 } 1962 1963 PRINTK (KERN_ERR, "%s", msg); 1964 return res; 1965 } 1966 1967 unsigned long timeout; 1968 1969 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command"); 1970 1971 /* do a command 1972 1973 Set the return value to zero, set the command type and set the 1974 valid entry to the right magic value. The payload is already 1975 correctly byte-ordered so we leave it alone. Hit the doorbell 1976 with the bus address of this structure. 1977 1978 */ 1979 1980 lb->result = 0; 1981 lb->command = cpu_to_be32 (cmd); 1982 lb->valid = cpu_to_be32 (DMA_VALID); 1983 // dump_registers (dev); 1984 // dump_loader_block (lb); 1985 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask); 1986 1987 timeout = command_timeouts[cmd] * HZ/100; 1988 1989 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS)) 1990 if (timeout) { 1991 set_current_state(TASK_UNINTERRUPTIBLE); 1992 timeout = schedule_timeout (timeout); 1993 } else { 1994 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd); 1995 dump_registers (dev); 1996 dump_loader_block (lb); 1997 return -ETIMEDOUT; 1998 } 1999 2000 if (cmd == adapter_start) { 2001 // wait for start command to acknowledge... 2002 timeout = HZ/10; 2003 while (rd_plain (dev, offsetof(amb_mem, doorbell))) 2004 if (timeout) { 2005 timeout = schedule_timeout (timeout); 2006 } else { 2007 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x", 2008 be32_to_cpu (lb->result)); 2009 dump_registers (dev); 2010 return -ETIMEDOUT; 2011 } 2012 return 0; 2013 } else { 2014 return decode_loader_result (cmd, be32_to_cpu (lb->result)); 2015 } 2016 2017} 2018 2019/* loader: determine loader version */ 2020 2021static int __init get_loader_version (loader_block * lb, 2022 const amb_dev * dev, u32 * version) { 2023 int res; 2024 2025 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version"); 2026 2027 res = do_loader_command (lb, dev, get_version_number); 2028 if (res) 2029 return res; 2030 if (version) 2031 *version = be32_to_cpu (lb->payload.version); 2032 return 0; 2033} 2034 2035/* loader: write memory data blocks */ 2036 2037static int __init loader_write (loader_block * lb, 2038 const amb_dev * dev, const u32 * data, 2039 u32 address, unsigned int count) { 2040 unsigned int i; 2041 transfer_block * tb = &lb->payload.transfer; 2042 2043 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write"); 2044 2045 if (count > MAX_TRANSFER_DATA) 2046 return -EINVAL; 2047 tb->address = cpu_to_be32 (address); 2048 tb->count = cpu_to_be32 (count); 2049 for (i = 0; i < count; ++i) 2050 tb->data[i] = cpu_to_be32 (data[i]); 2051 return do_loader_command (lb, dev, write_adapter_memory); 2052} 2053 2054/* loader: verify memory data blocks */ 2055 2056static int __init loader_verify (loader_block * lb, 2057 const amb_dev * dev, const u32 * data, 2058 u32 address, unsigned int count) { 2059 unsigned int i; 2060 transfer_block * tb = &lb->payload.transfer; 2061 int res; 2062 2063 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify"); 2064 2065 if (count > MAX_TRANSFER_DATA) 2066 return -EINVAL; 2067 tb->address = cpu_to_be32 (address); 2068 tb->count = cpu_to_be32 (count); 2069 res = do_loader_command (lb, dev, read_adapter_memory); 2070 if (!res) 2071 for (i = 0; i < count; ++i) 2072 if (tb->data[i] != cpu_to_be32 (data[i])) { 2073 res = -EINVAL; 2074 break; 2075 } 2076 return res; 2077} 2078 2079/* loader: start microcode */ 2080 2081static int __init loader_start (loader_block * lb, 2082 const amb_dev * dev, u32 address) { 2083 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start"); 2084 2085 lb->payload.start = cpu_to_be32 (address); 2086 return do_loader_command (lb, dev, adapter_start); 2087} 2088 2089/********** reset card **********/ 2090 2091static int amb_reset (amb_dev * dev, int diags) { 2092 u32 word; 2093 2094 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset"); 2095 2096 word = rd_plain (dev, offsetof(amb_mem, reset_control)); 2097 // put card into reset state 2098 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS); 2099 // wait a short while 2100 udelay (10); 2101#if 1 2102 // put card into known good state 2103 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS); 2104 // clear all interrupts just in case 2105 wr_plain (dev, offsetof(amb_mem, interrupt), -1); 2106#endif 2107 // clear self-test done flag 2108 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0); 2109 // take card out of reset state 2110 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS); 2111 2112 if (diags) { 2113 unsigned long timeout; 2114 // 4.2 second wait 2115 timeout = HZ*42/10; 2116 while (timeout) { 2117 set_current_state(TASK_UNINTERRUPTIBLE); 2118 timeout = schedule_timeout (timeout); 2119 } 2120 // half second time-out 2121 timeout = HZ/2; 2122 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready))) 2123 if (timeout) { 2124 set_current_state(TASK_UNINTERRUPTIBLE); 2125 timeout = schedule_timeout (timeout); 2126 } else { 2127 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out"); 2128 return -ETIMEDOUT; 2129 } 2130 2131 // get results of self-test 2132 // XXX double check byte-order 2133 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result)); 2134 if (word & SELF_TEST_FAILURE) { 2135 void sf (const char * msg) { 2136 PRINTK (KERN_ERR, "self-test failed: %s", msg); 2137 } 2138 if (word & GPINT_TST_FAILURE) 2139 sf ("interrupt"); 2140 if (word & SUNI_DATA_PATTERN_FAILURE) 2141 sf ("SUNI data pattern"); 2142 if (word & SUNI_DATA_BITS_FAILURE) 2143 sf ("SUNI data bits"); 2144 if (word & SUNI_UTOPIA_FAILURE) 2145 sf ("SUNI UTOPIA interface"); 2146 if (word & SUNI_FIFO_FAILURE) 2147 sf ("SUNI cell buffer FIFO"); 2148 if (word & SRAM_FAILURE) 2149 sf ("bad SRAM"); 2150 // better return value? 2151 return -EIO; 2152 } 2153 2154 } 2155 return 0; 2156} 2157 2158/********** transfer and start the microcode **********/ 2159 2160static int __init ucode_init (loader_block * lb, amb_dev * dev) { 2161 unsigned int i = 0; 2162 unsigned int total = 0; 2163 const u32 * pointer = ucode_data; 2164 u32 address; 2165 unsigned int count; 2166 int res; 2167 2168 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init"); 2169 2170 while (address = ucode_regions[i].start, 2171 count = ucode_regions[i].count) { 2172 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count); 2173 while (count) { 2174 unsigned int words; 2175 if (count <= MAX_TRANSFER_DATA) 2176 words = count; 2177 else 2178 words = MAX_TRANSFER_DATA; 2179 total += words; 2180 res = loader_write (lb, dev, pointer, address, words); 2181 if (res) 2182 return res; 2183 res = loader_verify (lb, dev, pointer, address, words); 2184 if (res) 2185 return res; 2186 count -= words; 2187 address += sizeof(u32) * words; 2188 pointer += words; 2189 } 2190 i += 1; 2191 } 2192 if (*pointer == 0xdeadbeef) { 2193 return loader_start (lb, dev, ucode_start); 2194 } else { 2195 // cast needed as there is no %? for pointer differnces 2196 PRINTD (DBG_LOAD|DBG_ERR, 2197 "offset=%li, *pointer=%x, address=%x, total=%u", 2198 (long) (pointer - ucode_data), *pointer, address, total); 2199 PRINTK (KERN_ERR, "incorrect microcode data"); 2200 return -ENOMEM; 2201 } 2202} 2203 2204/********** give adapter parameters **********/ 2205 2206static int __init amb_talk (amb_dev * dev) { 2207 adap_talk_block a; 2208 unsigned char pool; 2209 unsigned long timeout; 2210 2211 u32 x (void * addr) { 2212 return cpu_to_be32 (virt_to_bus (addr)); 2213 } 2214 2215 PRINTD (DBG_FLOW, "amb_talk %p", dev); 2216 2217 a.command_start = x (dev->cq.ptrs.start); 2218 a.command_end = x (dev->cq.ptrs.limit); 2219 a.tx_start = x (dev->txq.in.start); 2220 a.tx_end = x (dev->txq.in.limit); 2221 a.txcom_start = x (dev->txq.out.start); 2222 a.txcom_end = x (dev->txq.out.limit); 2223 2224 for (pool = 0; pool < NUM_RX_POOLS; ++pool) { 2225 // the other "a" items are set up by the adapter 2226 a.rec_struct[pool].buffer_start = x (dev->rxq[pool].in.start); 2227 a.rec_struct[pool].buffer_end = x (dev->rxq[pool].in.limit); 2228 a.rec_struct[pool].rx_start = x (dev->rxq[pool].out.start); 2229 a.rec_struct[pool].rx_end = x (dev->rxq[pool].out.limit); 2230 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size); 2231 } 2232 2233#ifdef AMB_NEW_MICROCODE 2234 // disable fast PLX prefetching 2235 a.init_flags = 0; 2236#endif 2237 2238 // pass the structure 2239 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a)); 2240 2241 // 2.2 second wait (must not touch doorbell during 2 second DMA test) 2242 timeout = HZ*22/10; 2243 while (timeout) 2244 timeout = schedule_timeout (timeout); 2245 // give the adapter another half second? 2246 timeout = HZ/2; 2247 while (rd_plain (dev, offsetof(amb_mem, doorbell))) 2248 if (timeout) { 2249 timeout = schedule_timeout (timeout); 2250 } else { 2251 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out"); 2252 return -ETIMEDOUT; 2253 } 2254 2255 return 0; 2256} 2257 2258// get microcode version 2259static void __init amb_ucode_version (amb_dev * dev) { 2260 u32 major; 2261 u32 minor; 2262 command cmd; 2263 cmd.request = cpu_to_be32 (SRB_GET_VERSION); 2264 while (command_do (dev, &cmd)) { 2265 set_current_state(TASK_UNINTERRUPTIBLE); 2266 schedule(); 2267 } 2268 major = be32_to_cpu (cmd.args.version.major); 2269 minor = be32_to_cpu (cmd.args.version.minor); 2270 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor); 2271} 2272 2273// get end station address 2274static void __init amb_esi (amb_dev * dev, u8 * esi) { 2275 u32 lower4; 2276 u16 upper2; 2277 command cmd; 2278 2279 // swap bits within byte to get Ethernet ordering 2280 u8 bit_swap (u8 byte) { 2281 const u8 swap[] = { 2282 0x0, 0x8, 0x4, 0xc, 2283 0x2, 0xa, 0x6, 0xe, 2284 0x1, 0x9, 0x5, 0xd, 2285 0x3, 0xb, 0x7, 0xf 2286 }; 2287 return ((swap[byte & 0xf]<<4) | swap[byte>>4]); 2288 } 2289 2290 cmd.request = cpu_to_be32 (SRB_GET_BIA); 2291 while (command_do (dev, &cmd)) { 2292 set_current_state(TASK_UNINTERRUPTIBLE); 2293 schedule(); 2294 } 2295 lower4 = be32_to_cpu (cmd.args.bia.lower4); 2296 upper2 = be32_to_cpu (cmd.args.bia.upper2); 2297 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2); 2298 2299 if (esi) { 2300 unsigned int i; 2301 2302 PRINTDB (DBG_INIT, "ESI:"); 2303 for (i = 0; i < ESI_LEN; ++i) { 2304 if (i < 4) 2305 esi[i] = bit_swap (lower4>>(8*i)); 2306 else 2307 esi[i] = bit_swap (upper2>>(8*(i-4))); 2308 PRINTDM (DBG_INIT, " %02x", esi[i]); 2309 } 2310 2311 PRINTDE (DBG_INIT, ""); 2312 } 2313 2314 return; 2315} 2316 2317static int __init amb_init (amb_dev * dev) { 2318 loader_block lb; 2319 2320 void fixup_plx_window (void) { 2321 // fix up the PLX-mapped window base address to match the block 2322 unsigned long blb; 2323 u32 mapreg; 2324 blb = virt_to_bus (&lb); 2325 // the kernel stack had better not ever cross a 1Gb boundary! 2326 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10])); 2327 mapreg &= ~onegigmask; 2328 mapreg |= blb & onegigmask; 2329 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg); 2330 return; 2331 } 2332 2333 u32 version; 2334 2335 if (amb_reset (dev, 1)) { 2336 PRINTK (KERN_ERR, "card reset failed!"); 2337 } else { 2338 fixup_plx_window (); 2339 2340 if (get_loader_version (&lb, dev, &version)) { 2341 PRINTK (KERN_INFO, "failed to get loader version"); 2342 } else { 2343 PRINTK (KERN_INFO, "loader version is %08x", version); 2344 2345 if (ucode_init (&lb, dev)) { 2346 PRINTK (KERN_ERR, "microcode failure"); 2347 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) { 2348 PRINTK (KERN_ERR, "failed to get memory for queues"); 2349 } else { 2350 2351 if (amb_talk (dev)) { 2352 PRINTK (KERN_ERR, "adapter did not accept queues"); 2353 } else { 2354 2355 amb_ucode_version (dev); 2356 return 0; 2357 2358 } /* amb_talk */ 2359 2360 destroy_queues (dev); 2361 } /* create_queues, ucode_init */ 2362 2363 amb_reset (dev, 0); 2364 } /* get_loader_version */ 2365 2366 } /* amb_reset */ 2367 2368 return -1; 2369} 2370 2371static int __init amb_probe (void) { 2372 struct pci_dev * pci_dev; 2373 int devs; 2374 2375 void __init do_pci_device (void) { 2376 amb_dev * dev; 2377 2378 // read resources from PCI configuration space 2379 u8 irq = pci_dev->irq; 2380 u32 * membase = bus_to_virt (pci_resource_start (pci_dev, 0)); 2381 u32 iobase = pci_resource_start (pci_dev, 1); 2382 2383 void setup_dev (void) { 2384 unsigned char pool; 2385 memset (dev, 0, sizeof(amb_dev)); 2386 2387 // set up known dev items straight away 2388 dev->pci_dev = pci_dev; 2389 2390 dev->iobase = iobase; 2391 dev->irq = irq; 2392 dev->membase = membase; 2393 2394 // flags (currently only dead) 2395 dev->flags = 0; 2396 2397 // Allocate cell rates (fibre) 2398 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53 2399 // to be really pedantic, this should be ATM_OC3c_PCR 2400 dev->tx_avail = ATM_OC3_PCR; 2401 dev->rx_avail = ATM_OC3_PCR; 2402 2403#ifdef FILL_RX_POOLS_IN_BH 2404 // initialise bottom half 2405 INIT_LIST_HEAD(&dev->bh.list); 2406 dev->bh.sync = 0; 2407 dev->bh.routine = (void (*)(void *)) fill_rx_pools; 2408 dev->bh.data = dev; 2409#endif 2410 2411 // semaphore for txer/rxer modifications - we cannot use a 2412 // spinlock as the critical region needs to switch processes 2413 init_MUTEX (&dev->vcc_sf); 2414 // queue manipulation spinlocks; we want atomic reads and 2415 // writes to the queue descriptors (handles IRQ and SMP) 2416 // consider replacing "int pending" -> "atomic_t available" 2417 // => problem related to who gets to move queue pointers 2418 spin_lock_init (&dev->cq.lock); 2419 spin_lock_init (&dev->txq.lock); 2420 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 2421 spin_lock_init (&dev->rxq[pool].lock); 2422 } 2423 2424 void setup_pci_dev (void) { 2425 unsigned char lat; 2426 2427 /* XXX check return value */ 2428 pci_enable_device (pci_dev); 2429 2430 // enable bus master accesses 2431 pci_set_master (pci_dev); 2432 2433 // frobnicate latency (upwards, usually) 2434 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat); 2435 if (pci_lat) { 2436 PRINTD (DBG_INIT, "%s PCI latency timer from %hu to %hu", 2437 "changing", lat, pci_lat); 2438 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, pci_lat); 2439 } else if (lat < MIN_PCI_LATENCY) { 2440 PRINTK (KERN_INFO, "%s PCI latency timer from %hu to %hu", 2441 "increasing", lat, MIN_PCI_LATENCY); 2442 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, MIN_PCI_LATENCY); 2443 } 2444 } 2445 2446 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at" 2447 " IO %x, IRQ %u, MEM %p", iobase, irq, membase); 2448 2449 // check IO region 2450 if (check_region (iobase, AMB_EXTENT)) { 2451 PRINTK (KERN_ERR, "IO range already in use!"); 2452 return; 2453 } 2454 2455 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL); 2456 if (!dev) { 2457 // perhaps we should be nice: deregister all adapters and abort? 2458 PRINTK (KERN_ERR, "out of memory!"); 2459 return; 2460 } 2461 2462 setup_dev(); 2463 2464 if (amb_init (dev)) { 2465 PRINTK (KERN_ERR, "adapter initialisation failure"); 2466 } else { 2467 2468 setup_pci_dev(); 2469 2470 // grab (but share) IRQ and install handler 2471 if (request_irq (irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev)) { 2472 PRINTK (KERN_ERR, "request IRQ failed!"); 2473 // free_irq is at "endif" 2474 } else { 2475 2476 // reserve IO region 2477 request_region (iobase, AMB_EXTENT, DEV_LABEL); 2478 2479 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL); 2480 if (!dev->atm_dev) { 2481 PRINTD (DBG_ERR, "failed to register Madge ATM adapter"); 2482 } else { 2483 2484 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p", 2485 dev->atm_dev->number, dev, dev->atm_dev); 2486 dev->atm_dev->dev_data = (void *) dev; 2487 2488 // register our address 2489 amb_esi (dev, dev->atm_dev->esi); 2490 2491 // 0 bits for vpi, 10 bits for vci 2492 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS; 2493 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS; 2494 2495 // update count and linked list 2496 ++devs; 2497 dev->prev = amb_devs; 2498 amb_devs = dev; 2499 2500 // enable host interrupts 2501 interrupts_on (dev); 2502 2503 // success 2504 return; 2505 2506 // not currently reached 2507 atm_dev_deregister (dev->atm_dev); 2508 } /* atm_dev_register */ 2509 2510 release_region (iobase, AMB_EXTENT); 2511 free_irq (irq, dev); 2512 } /* request_region, request_irq */ 2513 2514 amb_reset (dev, 0); 2515 } /* amb_init */ 2516 2517 kfree (dev); 2518 } /* kmalloc, end-of-fn */ 2519 2520 PRINTD (DBG_FLOW, "amb_probe"); 2521 2522 if (!pci_present()) 2523 return 0; 2524 2525 devs = 0; 2526 pci_dev = NULL; 2527 while ((pci_dev = pci_find_device 2528 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, pci_dev) 2529 )) 2530 do_pci_device(); 2531 2532 pci_dev = NULL; 2533 while ((pci_dev = pci_find_device 2534 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, pci_dev) 2535 )) 2536 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card"); 2537 2538 return devs; 2539} 2540 2541static void __init amb_check_args (void) { 2542 unsigned char pool; 2543 unsigned int max_rx_size; 2544 2545#ifdef DEBUG_AMBASSADOR 2546 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK); 2547#else 2548 if (debug) 2549 PRINTK (KERN_NOTICE, "no debugging support"); 2550#endif 2551 2552 if (cmds < MIN_QUEUE_SIZE) 2553 PRINTK (KERN_NOTICE, "cmds has been raised to %u", 2554 cmds = MIN_QUEUE_SIZE); 2555 2556 if (txs < MIN_QUEUE_SIZE) 2557 PRINTK (KERN_NOTICE, "txs has been raised to %u", 2558 txs = MIN_QUEUE_SIZE); 2559 2560 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 2561 if (rxs[pool] < MIN_QUEUE_SIZE) 2562 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u", 2563 pool, rxs[pool] = MIN_QUEUE_SIZE); 2564 2565 // buffers sizes should be greater than zero and strictly increasing 2566 max_rx_size = 0; 2567 for (pool = 0; pool < NUM_RX_POOLS; ++pool) 2568 if (rxs_bs[pool] <= max_rx_size) 2569 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)", 2570 pool, rxs_bs[pool]); 2571 else 2572 max_rx_size = rxs_bs[pool]; 2573 2574 if (rx_lats < MIN_RX_BUFFERS) 2575 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u", 2576 rx_lats = MIN_RX_BUFFERS); 2577 2578 return; 2579} 2580 2581/********** module stuff **********/ 2582 2583#ifdef MODULE 2584EXPORT_NO_SYMBOLS; 2585 2586MODULE_AUTHOR(maintainer_string); 2587MODULE_DESCRIPTION(description_string); 2588MODULE_LICENSE("GPL"); 2589MODULE_PARM(debug, "h"); 2590MODULE_PARM(cmds, "i"); 2591MODULE_PARM(txs, "i"); 2592MODULE_PARM(rxs, __MODULE_STRING(NUM_RX_POOLS) "i"); 2593MODULE_PARM(rxs_bs, __MODULE_STRING(NUM_RX_POOLS) "i"); 2594MODULE_PARM(rx_lats, "i"); 2595MODULE_PARM(pci_lat, "b"); 2596MODULE_PARM_DESC(debug, "debug bitmap, see .h file"); 2597MODULE_PARM_DESC(cmds, "number of command queue entries"); 2598MODULE_PARM_DESC(txs, "number of TX queue entries"); 2599MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]"); 2600MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]"); 2601MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies"); 2602MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles"); 2603 2604/********** module entry **********/ 2605 2606int init_module (void) { 2607 int devs; 2608 2609 PRINTD (DBG_FLOW|DBG_INIT, "init_module"); 2610 2611 // sanity check - cast needed as printk does not support %Zu 2612 if (sizeof(amb_mem) != 4*16 + 4*12) { 2613 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).", 2614 (unsigned long) sizeof(amb_mem)); 2615 return -ENOMEM; 2616 } 2617 2618 show_version(); 2619 2620 amb_check_args(); 2621 2622 // get the juice 2623 devs = amb_probe(); 2624 2625 if (devs) { 2626 init_timer (&housekeeping); 2627 housekeeping.function = do_housekeeping; 2628 // paranoia 2629 housekeeping.data = 1; 2630 set_timer (&housekeeping, 0); 2631 } else { 2632 PRINTK (KERN_INFO, "no (usable) adapters found"); 2633 } 2634 2635 return devs ? 0 : -ENODEV; 2636} 2637 2638/********** module exit **********/ 2639 2640void cleanup_module (void) { 2641 amb_dev * dev; 2642 2643 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module"); 2644 2645 // paranoia 2646 housekeeping.data = 0; 2647 del_timer (&housekeeping); 2648 2649 while (amb_devs) { 2650 dev = amb_devs; 2651 amb_devs = dev->prev; 2652 2653 PRINTD (DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev); 2654 // the drain should not be necessary 2655 drain_rx_pools (dev); 2656 interrupts_off (dev); 2657 amb_reset (dev, 0); 2658 destroy_queues (dev); 2659 atm_dev_deregister (dev->atm_dev); 2660 free_irq (dev->irq, dev); 2661 release_region (dev->iobase, AMB_EXTENT); 2662 kfree (dev); 2663 } 2664 2665 return; 2666} 2667 2668#else 2669 2670/********** monolithic entry **********/ 2671 2672int __init amb_detect (void) { 2673 int devs; 2674 2675 // sanity check - cast needed as printk does not support %Zu 2676 if (sizeof(amb_mem) != 4*16 + 4*12) { 2677 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).", 2678 (unsigned long) sizeof(amb_mem)); 2679 return 0; 2680 } 2681 2682 show_version(); 2683 2684 amb_check_args(); 2685 2686 // get the juice 2687 devs = amb_probe(); 2688 2689 if (devs) { 2690 init_timer (&housekeeping); 2691 housekeeping.function = do_housekeeping; 2692 // paranoia 2693 housekeeping.data = 1; 2694 set_timer (&housekeeping, 0); 2695 } else { 2696 PRINTK (KERN_INFO, "no (usable) adapters found"); 2697 } 2698 2699 return devs; 2700} 2701 2702#endif 2703