1/* 2 * BK Id: %F% %I% %G% %U% %#% 3 */ 4/* 5 * arch/ppc/platform/pmac_feature.c 6 * 7 * Copyright (C) 1996-2002 Paul Mackerras (paulus@cs.anu.edu.au) 8 * Ben. Herrenschmidt (benh@kernel.crashing.org) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 * 15 * TODO: 16 * 17 * - Replace mdelay with some schedule loop if possible 18 * - Shorten some obfuscated delays on some routines (like modem 19 * power) 20 * 21 */ 22#include <linux/config.h> 23#include <linux/types.h> 24#include <linux/init.h> 25#include <linux/delay.h> 26#include <linux/kernel.h> 27#include <linux/sched.h> 28#include <linux/spinlock.h> 29#include <linux/adb.h> 30#include <linux/pmu.h> 31#include <linux/ioport.h> 32#include <linux/pci.h> 33#include <asm/sections.h> 34#include <asm/errno.h> 35#include <asm/ohare.h> 36#include <asm/heathrow.h> 37#include <asm/keylargo.h> 38#include <asm/uninorth.h> 39#include <asm/io.h> 40#include <asm/prom.h> 41#include <asm/machdep.h> 42#include <asm/pmac_feature.h> 43#include <asm/dbdma.h> 44#include <asm/pci-bridge.h> 45 46#undef DEBUG_FEATURE 47 48#ifdef DEBUG_FEATURE 49#define DBG(fmt,...) printk(KERN_DEBUG fmt) 50#else 51#define DBG(fmt,...) 52#endif 53 54/* Exported from arch/ppc/kernel/idle.c */ 55extern unsigned long powersave_nap; 56extern unsigned long powersave_lowspeed; 57 58/* 59 * We use a single global lock to protect accesses. Each driver has 60 * to take care of it's own locking 61 */ 62static spinlock_t feature_lock __pmacdata = SPIN_LOCK_UNLOCKED; 63 64#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 65#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 66 67/* 68 * Helper functions regarding the various flavors of mac-io 69 */ 70 71#define MAX_MACIO_CHIPS 2 72 73enum { 74 macio_unknown = 0, 75 macio_grand_central, 76 macio_ohare, 77 macio_ohareII, 78 macio_heathrow, 79 macio_gatwick, 80 macio_paddington, 81 macio_keylargo, 82 macio_pangea 83}; 84 85static const char* macio_names[] __pmacdata = 86{ 87 "Unknown", 88 "Grand Central", 89 "OHare", 90 "OHareII", 91 "Heathrow", 92 "Gatwick", 93 "Paddington", 94 "Keylargo", 95 "Pangea" 96}; 97 98static struct macio_chip 99{ 100 struct device_node* of_node; 101 int type; 102 int rev; 103 volatile u32* base; 104 unsigned long flags; 105} macio_chips[MAX_MACIO_CHIPS] __pmacdata; 106 107#define MACIO_FLAG_SCCA_ON 0x00000001 108#define MACIO_FLAG_SCCB_ON 0x00000002 109#define MACIO_FLAG_SCC_LOCKED 0x00000004 110#define MACIO_FLAG_AIRPORT_ON 0x00000010 111#define MACIO_FLAG_FW_SUPPORTED 0x00000020 112 113static struct macio_chip* __pmac 114macio_find(struct device_node* child, int type) 115{ 116 while(child) { 117 int i; 118 119 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++) 120 if (child == macio_chips[i].of_node && 121 (!type || macio_chips[i].type == type)) 122 return &macio_chips[i]; 123 child = child->parent; 124 } 125 return NULL; 126} 127 128#define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2)) 129#define MACIO_FCR8(macio, r) (((volatile u8*)((macio)->base)) + (r)) 130 131#define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r))) 132#define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) 133#define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) 134#define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) 135#define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r))) 136#define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) 137 138/* 139 * Uninorth reg. access. Note that Uni-N regs are big endian 140 */ 141 142#define UN_REG(r) (uninorth_base + ((r) >> 2)) 143#define UN_IN(r) (in_be32(UN_REG(r))) 144#define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) 145#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 146#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 147 148static struct device_node* uninorth_node __pmacdata; 149static u32* uninorth_base __pmacdata; 150static u32 uninorth_rev __pmacdata; 151 152 153/* 154 * For each motherboard family, we have a table of functions pointers 155 * that handle the various features. 156 */ 157 158typedef int (*feature_call)(struct device_node* node, int param, int value); 159 160struct feature_table_entry { 161 unsigned int selector; 162 feature_call function; 163}; 164 165struct pmac_mb_def 166{ 167 const char* model_string; 168 const char* model_name; 169 int model_id; 170 struct feature_table_entry* features; 171 unsigned long board_flags; 172}; 173static struct pmac_mb_def pmac_mb __pmacdata; 174 175/* 176 * Here are the chip specific feature functions 177 */ 178 179static inline int __pmac 180simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) 181{ 182 struct macio_chip* macio; 183 unsigned long flags; 184 185 macio = macio_find(node, type); 186 if (!macio) 187 return -ENODEV; 188 LOCK(flags); 189 if (value) 190 MACIO_BIS(reg, mask); 191 else 192 MACIO_BIC(reg, mask); 193 (void)MACIO_IN32(reg); 194 UNLOCK(flags); 195 196 return 0; 197} 198 199static int __pmac 200ohare_htw_scc_enable(struct device_node* node, int param, int value) 201{ 202 struct macio_chip* macio; 203 unsigned long chan_mask; 204 unsigned long fcr; 205 unsigned long flags; 206 int htw, trans; 207 unsigned long rmask; 208 209 macio = macio_find(node, 0); 210 if (!macio) 211 return -ENODEV; 212 if (!strcmp(node->name, "ch-a")) 213 chan_mask = MACIO_FLAG_SCCA_ON; 214 else if (!strcmp(node->name, "ch-b")) 215 chan_mask = MACIO_FLAG_SCCB_ON; 216 else 217 return -ENODEV; 218 219 htw = (macio->type == macio_heathrow || macio->type == macio_paddington 220 || macio->type == macio_gatwick); 221 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */ 222 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 223 pmac_mb.model_id != PMAC_TYPE_YIKES); 224 if (value) { 225#ifdef CONFIG_ADB_PMU 226 if ((param & 0xfff) == PMAC_SCC_IRDA) 227 pmu_enable_irled(1); 228#endif /* CONFIG_ADB_PMU */ 229 LOCK(flags); 230 fcr = MACIO_IN32(OHARE_FCR); 231 /* Check if scc cell need enabling */ 232 if (!(fcr & OH_SCC_ENABLE)) { 233 fcr |= OH_SCC_ENABLE; 234 if (htw) { 235 /* Side effect: this will also power up the 236 * modem, but it's too messy to figure out on which 237 * ports this controls the tranceiver and on which 238 * it controls the modem 239 */ 240 if (trans) 241 fcr &= ~HRW_SCC_TRANS_EN_N; 242 MACIO_OUT32(OHARE_FCR, fcr); 243 fcr |= (rmask = HRW_RESET_SCC); 244 MACIO_OUT32(OHARE_FCR, fcr); 245 } else { 246 fcr |= (rmask = OH_SCC_RESET); 247 MACIO_OUT32(OHARE_FCR, fcr); 248 } 249 UNLOCK(flags); 250 (void)MACIO_IN32(OHARE_FCR); 251 mdelay(15); 252 LOCK(flags); 253 fcr &= ~rmask; 254 MACIO_OUT32(OHARE_FCR, fcr); 255 } 256 if (chan_mask & MACIO_FLAG_SCCA_ON) 257 fcr |= OH_SCCA_IO; 258 if (chan_mask & MACIO_FLAG_SCCB_ON) 259 fcr |= OH_SCCB_IO; 260 MACIO_OUT32(OHARE_FCR, fcr); 261 macio->flags |= chan_mask; 262 UNLOCK(flags); 263 if (param & PMAC_SCC_FLAG_XMON) 264 macio->flags |= MACIO_FLAG_SCC_LOCKED; 265 } else { 266 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 267 return -EPERM; 268 LOCK(flags); 269 fcr = MACIO_IN32(OHARE_FCR); 270 if (chan_mask & MACIO_FLAG_SCCA_ON) 271 fcr &= ~OH_SCCA_IO; 272 if (chan_mask & MACIO_FLAG_SCCB_ON) 273 fcr &= ~OH_SCCB_IO; 274 MACIO_OUT32(OHARE_FCR, fcr); 275 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) { 276 fcr &= ~OH_SCC_ENABLE; 277 if (htw && trans) 278 fcr |= HRW_SCC_TRANS_EN_N; 279 MACIO_OUT32(OHARE_FCR, fcr); 280 } 281 macio->flags &= ~(chan_mask); 282 UNLOCK(flags); 283 mdelay(10); 284#ifdef CONFIG_ADB_PMU 285 if ((param & 0xfff) == PMAC_SCC_IRDA) 286 pmu_enable_irled(0); 287#endif /* CONFIG_ADB_PMU */ 288 } 289 return 0; 290} 291 292static int __pmac 293ohare_floppy_enable(struct device_node* node, int param, int value) 294{ 295 return simple_feature_tweak(node, macio_ohare, 296 OHARE_FCR, OH_FLOPPY_ENABLE, value); 297} 298 299static int __pmac 300ohare_mesh_enable(struct device_node* node, int param, int value) 301{ 302 return simple_feature_tweak(node, macio_ohare, 303 OHARE_FCR, OH_MESH_ENABLE, value); 304} 305 306static int __pmac 307ohare_ide_enable(struct device_node* node, int param, int value) 308{ 309 switch(param) { 310 case 0: 311 /* For some reason, setting the bit in set_initial_features() 312 * doesn't stick. I'm still investigating... --BenH. 313 */ 314 if (value) 315 simple_feature_tweak(node, macio_ohare, 316 OHARE_FCR, OH_IOBUS_ENABLE, 1); 317 return simple_feature_tweak(node, macio_ohare, 318 OHARE_FCR, OH_IDE0_ENABLE, value); 319 case 1: 320 return simple_feature_tweak(node, macio_ohare, 321 OHARE_FCR, OH_BAY_IDE_ENABLE, value); 322 default: 323 return -ENODEV; 324 } 325} 326 327static int __pmac 328ohare_ide_reset(struct device_node* node, int param, int value) 329{ 330 switch(param) { 331 case 0: 332 return simple_feature_tweak(node, macio_ohare, 333 OHARE_FCR, OH_IDE0_RESET_N, !value); 334 case 1: 335 return simple_feature_tweak(node, macio_ohare, 336 OHARE_FCR, OH_IDE1_RESET_N, !value); 337 default: 338 return -ENODEV; 339 } 340} 341 342static int __pmac 343ohare_sleep_state(struct device_node* node, int param, int value) 344{ 345 struct macio_chip* macio = &macio_chips[0]; 346 347 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 348 return -EPERM; 349 if (value == 1) { 350 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE); 351 } else if (value == 0) { 352 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 353 } 354 355 return 0; 356} 357 358static int __pmac 359heathrow_modem_enable(struct device_node* node, int param, int value) 360{ 361 struct macio_chip* macio; 362 u8 gpio; 363 unsigned long flags; 364 365 macio = macio_find(node, macio_unknown); 366 if (!macio) 367 return -ENODEV; 368 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1; 369 if (!value) { 370 LOCK(flags); 371 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 372 UNLOCK(flags); 373 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 374 mdelay(250); 375 } 376 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 377 pmac_mb.model_id != PMAC_TYPE_YIKES) { 378 LOCK(flags); 379 if (value) 380 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 381 else 382 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 383 UNLOCK(flags); 384 (void)MACIO_IN32(HEATHROW_FCR); 385 mdelay(250); 386 } 387 if (value) { 388 LOCK(flags); 389 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 390 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 391 UNLOCK(flags); mdelay(250); LOCK(flags); 392 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 393 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 394 UNLOCK(flags); mdelay(250); LOCK(flags); 395 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 396 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 397 UNLOCK(flags); mdelay(250); 398 } 399 return 0; 400} 401 402static int __pmac 403heathrow_floppy_enable(struct device_node* node, int param, int value) 404{ 405 return simple_feature_tweak(node, macio_unknown, 406 HEATHROW_FCR, 407 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE, 408 value); 409} 410 411static int __pmac 412heathrow_mesh_enable(struct device_node* node, int param, int value) 413{ 414 struct macio_chip* macio; 415 unsigned long flags; 416 417 macio = macio_find(node, macio_unknown); 418 if (!macio) 419 return -ENODEV; 420 LOCK(flags); 421 /* Set clear mesh cell enable */ 422 if (value) 423 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE); 424 else 425 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE); 426 (void)MACIO_IN32(HEATHROW_FCR); 427 udelay(10); 428 /* Set/Clear termination power (todo: test ! the bit value 429 * used by Darwin doesn't seem to match what we used so 430 * far. If you experience problems, turn #if 1 into #if 0 431 * and tell me about it --BenH. 432 */ 433 if (value) 434 MACIO_BIC(HEATHROW_MBCR, 0x00000004); 435 else 436 MACIO_BIS(HEATHROW_MBCR, 0x00000004); 437 (void)MACIO_IN32(HEATHROW_MBCR); 438 udelay(10); 439 UNLOCK(flags); 440 441 return 0; 442} 443 444static int __pmac 445heathrow_ide_enable(struct device_node* node, int param, int value) 446{ 447 switch(param) { 448 case 0: 449 return simple_feature_tweak(node, macio_unknown, 450 HEATHROW_FCR, HRW_IDE0_ENABLE, value); 451 case 1: 452 return simple_feature_tweak(node, macio_unknown, 453 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value); 454 default: 455 return -ENODEV; 456 } 457} 458 459static int __pmac 460heathrow_ide_reset(struct device_node* node, int param, int value) 461{ 462 switch(param) { 463 case 0: 464 return simple_feature_tweak(node, macio_unknown, 465 HEATHROW_FCR, HRW_IDE0_RESET_N, !value); 466 case 1: 467 return simple_feature_tweak(node, macio_unknown, 468 HEATHROW_FCR, HRW_IDE1_RESET_N, !value); 469 default: 470 return -ENODEV; 471 } 472} 473 474static int __pmac 475heathrow_bmac_enable(struct device_node* node, int param, int value) 476{ 477 struct macio_chip* macio; 478 unsigned long flags; 479 480 macio = macio_find(node, 0); 481 if (!macio) 482 return -ENODEV; 483 if (value) { 484 LOCK(flags); 485 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 486 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET); 487 UNLOCK(flags); 488 (void)MACIO_IN32(HEATHROW_FCR); 489 mdelay(10); 490 LOCK(flags); 491 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET); 492 UNLOCK(flags); 493 (void)MACIO_IN32(HEATHROW_FCR); 494 mdelay(10); 495 } else { 496 LOCK(flags); 497 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 498 UNLOCK(flags); 499 } 500 return 0; 501} 502 503static int __pmac 504heathrow_sound_enable(struct device_node* node, int param, int value) 505{ 506 struct macio_chip* macio; 507 unsigned long flags; 508 509 /* B&W G3 and Yikes don't support that properly (the 510 * sound appear to never come back after beeing shut down). 511 */ 512 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE || 513 pmac_mb.model_id == PMAC_TYPE_YIKES) 514 return 0; 515 516 macio = macio_find(node, 0); 517 if (!macio) 518 return -ENODEV; 519 if (value) { 520 LOCK(flags); 521 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 522 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 523 UNLOCK(flags); 524 (void)MACIO_IN32(HEATHROW_FCR); 525 } else { 526 LOCK(flags); 527 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 528 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 529 UNLOCK(flags); 530 } 531 return 0; 532} 533 534static u32 save_fcr[5] __pmacdata; 535static u32 save_mbcr __pmacdata; 536static u32 save_gpio_levels[2] __pmacdata; 537static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; 538static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; 539static u32 save_unin_clock_ctl __pmacdata; 540static struct dbdma_regs save_dbdma[13] __pmacdata; 541static struct dbdma_regs save_alt_dbdma[13] __pmacdata; 542 543static void __pmac 544dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) 545{ 546 int i; 547 548 /* Save state & config of DBDMA channels */ 549 for (i=0; i<13; i++) { 550 volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*) 551 (macio->base + ((0x8000+i*0x100)>>2)); 552 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi); 553 save[i].cmdptr = in_le32(&chan->cmdptr); 554 save[i].intr_sel = in_le32(&chan->intr_sel); 555 save[i].br_sel = in_le32(&chan->br_sel); 556 save[i].wait_sel = in_le32(&chan->wait_sel); 557 } 558} 559 560static void __pmac 561dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) 562{ 563 int i; 564 565 /* Save state & config of DBDMA channels */ 566 for (i=0; i<13; i++) { 567 volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*) 568 (macio->base + ((0x8000+i*0x100)>>2)); 569 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); 570 while (in_le32(&chan->status) & ACTIVE) 571 mb(); 572 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi); 573 out_le32(&chan->cmdptr, save[i].cmdptr); 574 out_le32(&chan->intr_sel, save[i].intr_sel); 575 out_le32(&chan->br_sel, save[i].br_sel); 576 out_le32(&chan->wait_sel, save[i].wait_sel); 577 } 578} 579 580static void __pmac 581heathrow_sleep(struct macio_chip* macio, int secondary) 582{ 583 if (secondary) { 584 dbdma_save(macio, save_alt_dbdma); 585 save_fcr[2] = MACIO_IN32(0x38); 586 save_fcr[3] = MACIO_IN32(0x3c); 587 } else { 588 dbdma_save(macio, save_dbdma); 589 save_fcr[0] = MACIO_IN32(0x38); 590 save_fcr[1] = MACIO_IN32(0x3c); 591 save_mbcr = MACIO_IN32(0x34); 592 /* Make sure sound is shut down */ 593 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 594 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 595 /* This seems to be necessary as well or the fan 596 * keeps coming up and battery drains fast */ 597 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE); 598 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N); 599 /* Make sure eth is down even if module or sleep 600 * won't work properly */ 601 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET); 602 } 603 /* Make sure modem is shut down */ 604 MACIO_OUT8(HRW_GPIO_MODEM_RESET, 605 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1); 606 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 607 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE); 608 609 /* Let things settle */ 610 (void)MACIO_IN32(HEATHROW_FCR); 611 mdelay(1); 612} 613 614static void __pmac 615heathrow_wakeup(struct macio_chip* macio, int secondary) 616{ 617 if (secondary) { 618 MACIO_OUT32(0x38, save_fcr[2]); 619 (void)MACIO_IN32(0x38); 620 mdelay(1); 621 MACIO_OUT32(0x3c, save_fcr[3]); 622 (void)MACIO_IN32(0x38); 623 mdelay(10); 624 dbdma_restore(macio, save_alt_dbdma); 625 } else { 626 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE); 627 (void)MACIO_IN32(0x38); 628 mdelay(1); 629 MACIO_OUT32(0x3c, save_fcr[1]); 630 (void)MACIO_IN32(0x38); 631 mdelay(1); 632 MACIO_OUT32(0x34, save_mbcr); 633 (void)MACIO_IN32(0x38); 634 mdelay(10); 635 dbdma_restore(macio, save_dbdma); 636 } 637} 638 639static int __pmac 640heathrow_sleep_state(struct device_node* node, int param, int value) 641{ 642 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 643 return -EPERM; 644 if (value == 1) { 645 if (macio_chips[1].type == macio_gatwick) 646 heathrow_sleep(&macio_chips[0], 1); 647 heathrow_sleep(&macio_chips[0], 0); 648 } else if (value == 0) { 649 heathrow_wakeup(&macio_chips[0], 0); 650 if (macio_chips[1].type == macio_gatwick) 651 heathrow_wakeup(&macio_chips[0], 1); 652 } 653 return 0; 654} 655 656static int __pmac 657core99_scc_enable(struct device_node* node, int param, int value) 658{ 659 struct macio_chip* macio; 660 unsigned long flags; 661 unsigned long chan_mask; 662 u32 fcr; 663 664 macio = macio_find(node, 0); 665 if (!macio) 666 return -ENODEV; 667 if (!strcmp(node->name, "ch-a")) 668 chan_mask = MACIO_FLAG_SCCA_ON; 669 else if (!strcmp(node->name, "ch-b")) 670 chan_mask = MACIO_FLAG_SCCB_ON; 671 else 672 return -ENODEV; 673 674 if (value) { 675 int need_reset_scc = 0; 676 int need_reset_irda = 0; 677 678 LOCK(flags); 679 fcr = MACIO_IN32(KEYLARGO_FCR0); 680 /* Check if scc cell need enabling */ 681 if (!(fcr & KL0_SCC_CELL_ENABLE)) { 682 fcr |= KL0_SCC_CELL_ENABLE; 683 need_reset_scc = 1; 684 } 685 if (chan_mask & MACIO_FLAG_SCCA_ON) { 686 fcr |= KL0_SCCA_ENABLE; 687 /* Don't enable line drivers for I2S modem */ 688 if ((param & 0xfff) == PMAC_SCC_I2S1) 689 fcr &= ~KL0_SCC_A_INTF_ENABLE; 690 else 691 fcr |= KL0_SCC_A_INTF_ENABLE; 692 } 693 if (chan_mask & MACIO_FLAG_SCCB_ON) { 694 fcr |= KL0_SCCB_ENABLE; 695 /* Perform irda specific inits */ 696 if ((param & 0xfff) == PMAC_SCC_IRDA) { 697 fcr &= ~KL0_SCC_B_INTF_ENABLE; 698 fcr |= KL0_IRDA_ENABLE; 699 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE; 700 fcr |= KL0_IRDA_SOURCE1_SEL; 701 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 702 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 703 need_reset_irda = 1; 704 } else 705 fcr |= KL0_SCC_B_INTF_ENABLE; 706 } 707 MACIO_OUT32(KEYLARGO_FCR0, fcr); 708 macio->flags |= chan_mask; 709 if (need_reset_scc) { 710 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET); 711 (void)MACIO_IN32(KEYLARGO_FCR0); 712 UNLOCK(flags); 713 mdelay(15); 714 LOCK(flags); 715 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET); 716 } 717 if (need_reset_irda) { 718 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET); 719 (void)MACIO_IN32(KEYLARGO_FCR0); 720 UNLOCK(flags); 721 mdelay(15); 722 LOCK(flags); 723 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET); 724 } 725 UNLOCK(flags); 726 if (param & PMAC_SCC_FLAG_XMON) 727 macio->flags |= MACIO_FLAG_SCC_LOCKED; 728 } else { 729 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 730 return -EPERM; 731 LOCK(flags); 732 fcr = MACIO_IN32(KEYLARGO_FCR0); 733 if (chan_mask & MACIO_FLAG_SCCA_ON) 734 fcr &= ~KL0_SCCA_ENABLE; 735 if (chan_mask & MACIO_FLAG_SCCB_ON) { 736 fcr &= ~KL0_SCCB_ENABLE; 737 /* Perform irda specific clears */ 738 if ((param & 0xfff) == PMAC_SCC_IRDA) { 739 fcr &= ~KL0_IRDA_ENABLE; 740 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE); 741 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 742 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 743 } 744 } 745 MACIO_OUT32(KEYLARGO_FCR0, fcr); 746 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) { 747 fcr &= ~KL0_SCC_CELL_ENABLE; 748 MACIO_OUT32(KEYLARGO_FCR0, fcr); 749 } 750 macio->flags &= ~(chan_mask); 751 UNLOCK(flags); 752 mdelay(10); 753 } 754 return 0; 755} 756 757static int __pmac 758core99_modem_enable(struct device_node* node, int param, int value) 759{ 760 struct macio_chip* macio; 761 u8 gpio; 762 unsigned long flags; 763 764 /* Hack for internal USB modem */ 765 if (node == NULL) { 766 if (macio_chips[0].type != macio_keylargo) 767 return -ENODEV; 768 node = macio_chips[0].of_node; 769 } 770 macio = macio_find(node, 0); 771 if (!macio) 772 return -ENODEV; 773 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 774 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 775 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 776 777 if (!value) { 778 LOCK(flags); 779 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 780 UNLOCK(flags); 781 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 782 mdelay(250); 783 } 784 LOCK(flags); 785 if (value) { 786 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 787 UNLOCK(flags); 788 (void)MACIO_IN32(KEYLARGO_FCR2); 789 mdelay(250); 790 } else { 791 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 792 UNLOCK(flags); 793 } 794 if (value) { 795 LOCK(flags); 796 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 797 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 798 UNLOCK(flags); mdelay(250); LOCK(flags); 799 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 800 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 801 UNLOCK(flags); mdelay(250); LOCK(flags); 802 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 803 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 804 UNLOCK(flags); mdelay(250); 805 } 806 return 0; 807} 808 809static int __pmac 810core99_ide_enable(struct device_node* node, int param, int value) 811{ 812 switch(param) { 813 case 0: 814 return simple_feature_tweak(node, macio_unknown, 815 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value); 816 case 1: 817 return simple_feature_tweak(node, macio_unknown, 818 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value); 819 case 2: 820 return simple_feature_tweak(node, macio_unknown, 821 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value); 822 default: 823 return -ENODEV; 824 } 825} 826 827static int __pmac 828core99_ide_reset(struct device_node* node, int param, int value) 829{ 830 switch(param) { 831 case 0: 832 return simple_feature_tweak(node, macio_unknown, 833 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value); 834 case 1: 835 return simple_feature_tweak(node, macio_unknown, 836 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value); 837 case 2: 838 return simple_feature_tweak(node, macio_unknown, 839 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value); 840 default: 841 return -ENODEV; 842 } 843} 844 845static int __pmac 846core99_gmac_enable(struct device_node* node, int param, int value) 847{ 848 unsigned long flags; 849 850 LOCK(flags); 851 if (value) 852 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 853 else 854 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 855 (void)UN_IN(UNI_N_CLOCK_CNTL); 856 UNLOCK(flags); 857 udelay(20); 858 859 return 0; 860} 861 862static int __pmac 863core99_gmac_phy_reset(struct device_node* node, int param, int value) 864{ 865 unsigned long flags; 866 struct macio_chip* macio; 867 868 macio = &macio_chips[0]; 869 if (macio->type != macio_keylargo && macio->type != macio_pangea) 870 return -ENODEV; 871 872 LOCK(flags); 873 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE); 874 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET); 875 UNLOCK(flags); 876 mdelay(10); 877 LOCK(flags); 878 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE 879 | KEYLARGO_GPIO_OUTOUT_DATA); 880 UNLOCK(flags); 881 mdelay(10); 882 883 return 0; 884} 885 886static int __pmac 887core99_sound_chip_enable(struct device_node* node, int param, int value) 888{ 889 struct macio_chip* macio; 890 unsigned long flags; 891 892 macio = macio_find(node, 0); 893 if (!macio) 894 return -ENODEV; 895 896 /* Do a better probe code, screamer G4 desktops & 897 * iMacs can do that too, add a recalibrate in 898 * the driver as well 899 */ 900 if (pmac_mb.model_id == PMAC_TYPE_PISMO || 901 pmac_mb.model_id == PMAC_TYPE_TITANIUM) { 902 LOCK(flags); 903 if (value) 904 MACIO_OUT8(KL_GPIO_SOUND_POWER, 905 KEYLARGO_GPIO_OUTPUT_ENABLE | 906 KEYLARGO_GPIO_OUTOUT_DATA); 907 else 908 MACIO_OUT8(KL_GPIO_SOUND_POWER, 909 KEYLARGO_GPIO_OUTPUT_ENABLE); 910 (void)MACIO_IN8(KL_GPIO_SOUND_POWER); 911 UNLOCK(flags); 912 } 913 return 0; 914} 915 916static int __pmac 917core99_airport_enable(struct device_node* node, int param, int value) 918{ 919 struct macio_chip* macio; 920 unsigned long flags; 921 int state; 922 923 macio = macio_find(node, 0); 924 if (!macio) 925 return -ENODEV; 926 927 /* Hint: we allow passing of macio itself for the sake of the 928 * sleep code 929 */ 930 if (node != macio->of_node && 931 (!node->parent || node->parent != macio->of_node)) 932 return -ENODEV; 933 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0; 934 if (value == state) 935 return 0; 936 if (value) { 937 /* This code is a reproduction of OF enable-cardslot 938 * and init-wireless methods, slightly hacked until 939 * I got it working. 940 */ 941 LOCK(flags); 942 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5); 943 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 944 UNLOCK(flags); 945 mdelay(10); 946 LOCK(flags); 947 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4); 948 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 949 UNLOCK(flags); 950 951 mdelay(10); 952 953 LOCK(flags); 954 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 955 (void)MACIO_IN32(KEYLARGO_FCR2); 956 udelay(10); 957 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0); 958 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb); 959 udelay(10); 960 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28); 961 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa); 962 udelay(10); 963 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28); 964 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd); 965 udelay(10); 966 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28); 967 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd); 968 udelay(10); 969 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28); 970 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe); 971 UNLOCK(flags); 972 udelay(10); 973 MACIO_OUT32(0x1c000, 0); 974 mdelay(1); 975 MACIO_OUT8(0x1a3e0, 0x41); 976 (void)MACIO_IN8(0x1a3e0); 977 udelay(10); 978 LOCK(flags); 979 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16); 980 (void)MACIO_IN32(KEYLARGO_FCR2); 981 UNLOCK(flags); 982 mdelay(100); 983 984 macio->flags |= MACIO_FLAG_AIRPORT_ON; 985 } else { 986 LOCK(flags); 987 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 988 (void)MACIO_IN32(KEYLARGO_FCR2); 989 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0); 990 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0); 991 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0); 992 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0); 993 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0); 994 (void)MACIO_IN8(KL_GPIO_AIRPORT_4); 995 UNLOCK(flags); 996 997 macio->flags &= ~MACIO_FLAG_AIRPORT_ON; 998 } 999 return 0; 1000} 1001 1002#ifdef CONFIG_SMP 1003static int __pmac 1004core99_reset_cpu(struct device_node* node, int param, int value) 1005{ 1006 const int reset_lines[] = { KL_GPIO_RESET_CPU0, 1007 KL_GPIO_RESET_CPU1, 1008 KL_GPIO_RESET_CPU2, 1009 KL_GPIO_RESET_CPU3 }; 1010 int reset_io; 1011 unsigned long flags; 1012 struct macio_chip* macio; 1013 1014 macio = &macio_chips[0]; 1015 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1016 return -ENODEV; 1017 if (param > 3 || param < 0) 1018 return -ENODEV; 1019 1020 reset_io = reset_lines[param]; 1021 1022 LOCK(flags); 1023 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1024 (void)MACIO_IN8(reset_io); 1025 udelay(1); 1026 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 1027 (void)MACIO_IN8(reset_io); 1028 UNLOCK(flags); 1029 1030 return 0; 1031} 1032 1033static int __pmac 1034rackmac_reset_cpu(struct device_node* node, int param, int value) 1035{ 1036 int reset_io; 1037 unsigned long flags; 1038 struct macio_chip* macio; 1039 struct device_node* np; 1040 1041 macio = &macio_chips[0]; 1042 if (macio->type != macio_keylargo) 1043 return -ENODEV; 1044 1045 np = find_path_device("/cpus"); 1046 if (np == NULL) 1047 return -ENODEV; 1048 for (np = np->child; np != NULL; np = np->sibling) { 1049 u32* num = (u32 *)get_property(np, "reg", NULL); 1050 u32* rst = (u32 *)get_property(np, "soft-reset", NULL); 1051 if (num == NULL || rst == NULL) 1052 continue; 1053 if (param == *num) { 1054 reset_io = *rst; 1055 break; 1056 } 1057 } 1058 if (np == NULL) 1059 return -ENODEV; 1060 1061 LOCK(flags); 1062 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1063 (void)MACIO_IN8(reset_io); 1064 udelay(1); 1065 MACIO_OUT8(reset_io, 0); 1066 (void)MACIO_IN8(reset_io); 1067 UNLOCK(flags); 1068 1069 return 0; 1070} 1071#endif /* CONFIG_SMP */ 1072 1073static int __pmac 1074core99_usb_enable(struct device_node* node, int param, int value) 1075{ 1076 struct macio_chip* macio; 1077 unsigned long flags; 1078 char* prop; 1079 int number; 1080 u32 reg; 1081 1082 macio = &macio_chips[0]; 1083 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1084 return -ENODEV; 1085 1086 prop = (char *)get_property(node, "AAPL,clock-id", NULL); 1087 if (!prop) 1088 return -ENODEV; 1089 if (strncmp(prop, "usb0u048", strlen("usb0u048")) == 0) 1090 number = 0; 1091 else if (strncmp(prop, "usb1u148", strlen("usb1u148")) == 0) 1092 number = 2; 1093 else 1094 return -ENODEV; 1095 1096 /* Sorry for the brute-force locking, but this is only used during 1097 * sleep and the timing seem to be critical 1098 */ 1099 LOCK(flags); 1100 if (value) { 1101 /* Turn ON */ 1102 if (number == 0) { 1103 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1104 (void)MACIO_IN32(KEYLARGO_FCR0); 1105 UNLOCK(flags); 1106 mdelay(1); 1107 LOCK(flags); 1108 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1109 } else { 1110 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1111 UNLOCK(flags); 1112 (void)MACIO_IN32(KEYLARGO_FCR0); 1113 mdelay(1); 1114 LOCK(flags); 1115 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1116 } 1117 reg = MACIO_IN32(KEYLARGO_FCR4); 1118 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1119 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number)); 1120 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1121 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1)); 1122 MACIO_OUT32(KEYLARGO_FCR4, reg); 1123 (void)MACIO_IN32(KEYLARGO_FCR4); 1124 udelay(10); 1125 } else { 1126 /* Turn OFF */ 1127 reg = MACIO_IN32(KEYLARGO_FCR4); 1128 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1129 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number); 1130 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1131 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1); 1132 MACIO_OUT32(KEYLARGO_FCR4, reg); 1133 (void)MACIO_IN32(KEYLARGO_FCR4); 1134 udelay(1); 1135 if (number == 0) { 1136 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1137 (void)MACIO_IN32(KEYLARGO_FCR0); 1138 udelay(1); 1139 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1140 (void)MACIO_IN32(KEYLARGO_FCR0); 1141 } else { 1142 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1143 (void)MACIO_IN32(KEYLARGO_FCR0); 1144 udelay(1); 1145 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1146 (void)MACIO_IN32(KEYLARGO_FCR0); 1147 } 1148 udelay(1); 1149 } 1150 UNLOCK(flags); 1151 1152 return 0; 1153} 1154 1155static int __pmac 1156core99_firewire_enable(struct device_node* node, int param, int value) 1157{ 1158 unsigned long flags; 1159 struct macio_chip* macio; 1160 1161 macio = &macio_chips[0]; 1162 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1163 return -ENODEV; 1164 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1165 return -ENODEV; 1166 1167 LOCK(flags); 1168 if (value) { 1169 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1170 (void)UN_IN(UNI_N_CLOCK_CNTL); 1171 } else { 1172 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1173 (void)UN_IN(UNI_N_CLOCK_CNTL); 1174 } 1175 UNLOCK(flags); 1176 mdelay(1); 1177 1178 return 0; 1179} 1180 1181static int __pmac 1182core99_firewire_cable_power(struct device_node* node, int param, int value) 1183{ 1184 unsigned long flags; 1185 struct macio_chip* macio; 1186 1187 /* Trick: we allow NULL node */ 1188 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0) 1189 return -ENODEV; 1190 macio = &macio_chips[0]; 1191 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1192 return -ENODEV; 1193 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1194 return -ENODEV; 1195 1196 LOCK(flags); 1197 if (value) { 1198 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0); 1199 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); 1200 udelay(10); 1201 } else { 1202 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4); 1203 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10); 1204 } 1205 UNLOCK(flags); 1206 mdelay(1); 1207 1208 return 0; 1209} 1210 1211static int __pmac 1212core99_read_gpio(struct device_node* node, int param, int value) 1213{ 1214 struct macio_chip* macio = &macio_chips[0]; 1215 1216 return MACIO_IN8(param); 1217} 1218 1219 1220static int __pmac 1221core99_write_gpio(struct device_node* node, int param, int value) 1222{ 1223 struct macio_chip* macio = &macio_chips[0]; 1224 1225 MACIO_OUT8(param, (u8)(value & 0xff)); 1226 return 0; 1227} 1228 1229static void __pmac 1230keylargo_shutdown(struct macio_chip* macio, int restart) 1231{ 1232 u32 temp; 1233 1234 mdelay(1); 1235 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND); 1236 (void)MACIO_IN32(KEYLARGO_FCR0); 1237 mdelay(100); 1238 1239 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1240 KL0_SCC_CELL_ENABLE | 1241 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE | 1242 KL0_IRDA_CLK19_ENABLE); 1243 1244 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1245 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); 1246 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1247 1248 MACIO_BIC(KEYLARGO_FCR1, 1249 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1250 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1251 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1252 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1253 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1254 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N | 1255 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N | 1256 KL1_UIDE_ENABLE); 1257 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1258 1259 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1260 udelay(10); 1261 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE); 1262 udelay(10); 1263 temp = MACIO_IN32(KEYLARGO_FCR3); 1264 if (macio->rev >= 2) 1265 temp |= (KL3_SHUTDOWN_PLL2X | KL3_SHUTDOWN_PLL_TOTAL); 1266 1267 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1268 KL3_SHUTDOWN_PLLKW35 | KL3_SHUTDOWN_PLLKW12; 1269 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE 1270 | KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE 1271 | KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); 1272 MACIO_OUT32(KEYLARGO_FCR3, temp); 1273 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1274} 1275 1276static void __pmac 1277pangea_shutdown(struct macio_chip* macio, int restart) 1278{ 1279 u32 temp; 1280 1281 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1282 KL0_SCC_CELL_ENABLE | 1283 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE); 1284 1285 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1286 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); 1287 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1288 1289 MACIO_BIC(KEYLARGO_FCR1, 1290 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1291 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1292 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1293 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1294 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1295 KL1_UIDE_ENABLE); 1296 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1297 1298 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1299 udelay(10); 1300 temp = MACIO_IN32(KEYLARGO_FCR3); 1301 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1302 KL3_SHUTDOWN_PLLKW35; 1303 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE 1304 | KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE 1305 | KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); 1306 MACIO_OUT32(KEYLARGO_FCR3, temp); 1307 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1308} 1309 1310static int __pmac 1311core99_sleep(void) 1312{ 1313 struct macio_chip* macio; 1314 int i; 1315 1316 macio = &macio_chips[0]; 1317 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1318 return -ENODEV; 1319 1320 /* We power off the wireless slot in case it was not done 1321 * by the driver. We don't power it on automatically however 1322 */ 1323 if (macio->flags & MACIO_FLAG_AIRPORT_ON) 1324 core99_airport_enable(macio->of_node, 0, 0); 1325 1326 /* We power off the FW cable. Should be done by the driver... */ 1327 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) { 1328 core99_firewire_enable(NULL, 0, 0); 1329 core99_firewire_cable_power(NULL, 0, 0); 1330 } 1331 1332 /* We make sure int. modem is off (in case driver lost it) */ 1333 core99_modem_enable(macio->of_node, 0, 0); 1334 /* We make sure the sound is off as well */ 1335 core99_sound_chip_enable(macio->of_node, 0, 0); 1336 1337 /* 1338 * Save various bits of KeyLargo 1339 */ 1340 1341 /* Save the state of the various GPIOs */ 1342 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0); 1343 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1); 1344 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1345 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i); 1346 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1347 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i); 1348 1349 /* Save the FCRs */ 1350 save_mbcr = MACIO_IN32(KEYLARGO_MBCR); 1351 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0); 1352 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1); 1353 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2); 1354 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3); 1355 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4); 1356 1357 /* Save state & config of DBDMA channels */ 1358 dbdma_save(macio, save_dbdma); 1359 1360 /* 1361 * Turn off as much as we can 1362 */ 1363 if (macio->type == macio_pangea) 1364 pangea_shutdown(macio, 0); 1365 else if (macio->type == macio_keylargo) 1366 keylargo_shutdown(macio, 0); 1367 1368 /* 1369 * Put the host bridge to sleep 1370 */ 1371 1372 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL); 1373 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl & 1374 ~(UNI_N_CLOCK_CNTL_GMAC|UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/)); 1375 udelay(100); 1376 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1377 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP); 1378 1379 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1380 MACIO_BIS(0x506e0, 0x00400000); 1381 MACIO_BIS(0x506e0, 0x80000000); 1382 } 1383 return 0; 1384} 1385 1386static int __pmac 1387core99_wake_up(void) 1388{ 1389 struct macio_chip* macio; 1390 int i; 1391 1392 macio = &macio_chips[0]; 1393 if (macio->type != macio_keylargo && macio->type != macio_pangea) 1394 return -ENODEV; 1395 1396 /* 1397 * Wakeup the host bridge 1398 */ 1399 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1400 udelay(10); 1401 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1402 udelay(10); 1403 1404 /* 1405 * Restore KeyLargo 1406 */ 1407 1408 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr); 1409 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1410 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]); 1411 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1412 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]); 1413 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1414 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]); 1415 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10); 1416 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]); 1417 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1418 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]); 1419 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10); 1420 1421 dbdma_restore(macio, save_dbdma); 1422 1423 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]); 1424 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]); 1425 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1426 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]); 1427 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1428 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]); 1429 1430 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1431 MACIO_BIC(0x506e0, 0x00400000); 1432 MACIO_BIC(0x506e0, 0x80000000); 1433 } 1434 1435 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl); 1436 udelay(100); 1437 1438 return 0; 1439} 1440 1441static int __pmac 1442core99_sleep_state(struct device_node* node, int param, int value) 1443{ 1444 /* Param == 1 means to enter the "fake sleep" mode that is 1445 * used for CPU speed switch 1446 */ 1447 if (param == 1) { 1448 if (value == 1) { 1449 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1450 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2); 1451 } else { 1452 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1453 udelay(10); 1454 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1455 udelay(10); 1456 } 1457 return 0; 1458 } 1459 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 1460 return -EPERM; 1461 if (value == 1) 1462 return core99_sleep(); 1463 else if (value == 0) 1464 return core99_wake_up(); 1465 return 0; 1466} 1467 1468static int __pmac 1469pangea_modem_enable(struct device_node* node, int param, int value) 1470{ 1471 struct macio_chip* macio; 1472 u8 gpio; 1473 unsigned long flags; 1474 1475 /* Hack for internal USB modem */ 1476 if (node == NULL) { 1477 if (macio_chips[0].type != macio_pangea) 1478 return -ENODEV; 1479 node = macio_chips[0].of_node; 1480 } 1481 macio = macio_find(node, 0); 1482 if (!macio) 1483 return -ENODEV; 1484 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 1485 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 1486 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 1487 1488 if (!value) { 1489 LOCK(flags); 1490 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 1491 UNLOCK(flags); 1492 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 1493 mdelay(250); 1494 } 1495 LOCK(flags); 1496 if (value) { 1497 MACIO_OUT8(KL_GPIO_MODEM_POWER, 1498 KEYLARGO_GPIO_OUTPUT_ENABLE); 1499 UNLOCK(flags); 1500 (void)MACIO_IN32(KEYLARGO_FCR2); 1501 mdelay(250); 1502 } else { 1503 MACIO_OUT8(KL_GPIO_MODEM_POWER, 1504 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 1505 UNLOCK(flags); 1506 } 1507 if (value) { 1508 LOCK(flags); 1509 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 1510 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 1511 UNLOCK(flags); mdelay(250); LOCK(flags); 1512 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 1513 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 1514 UNLOCK(flags); mdelay(250); LOCK(flags); 1515 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 1516 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 1517 UNLOCK(flags); mdelay(250); 1518 } 1519 return 0; 1520} 1521 1522 1523static int __pmac 1524generic_get_mb_info(struct device_node* node, int param, int value) 1525{ 1526 switch(param) { 1527 case PMAC_MB_INFO_MODEL: 1528 return pmac_mb.model_id; 1529 case PMAC_MB_INFO_FLAGS: 1530 return pmac_mb.board_flags; 1531 case PMAC_MB_INFO_NAME: 1532 /* hack hack hack... but should work */ 1533 *((const char **)value) = pmac_mb.model_name; 1534 break; 1535 } 1536 return 0; 1537} 1538 1539 1540/* 1541 * Table definitions 1542 */ 1543 1544/* Used on any machine 1545 */ 1546static struct feature_table_entry any_features[] __pmacdata = { 1547 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1548 { 0, NULL } 1549}; 1550 1551/* OHare based motherboards. Currently, we only use these on the 1552 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1553 * to have issues with turning on/off those asic cells 1554 */ 1555static struct feature_table_entry ohare_features[] __pmacdata = { 1556 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1557 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1558 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1559 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable}, 1560 { PMAC_FTR_IDE_RESET, ohare_ide_reset}, 1561 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state }, 1562 { 0, NULL } 1563}; 1564 1565/* Heathrow desktop machines (Beige G3). 1566 * Separated as some features couldn't be properly tested 1567 * and the serial port control bits appear to confuse it. 1568 */ 1569static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { 1570 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1571 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1572 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1573 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1574 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1575 { 0, NULL } 1576}; 1577 1578/* Heathrow based laptop, that is the Wallstreet and mainstreet 1579 * powerbooks. 1580 */ 1581static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { 1582 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1583 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1584 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1585 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1586 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1587 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1588 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1589 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 1590 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 1591 { 0, NULL } 1592}; 1593 1594/* Paddington based machines 1595 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 1596 */ 1597static struct feature_table_entry paddington_features[] __pmacdata = { 1598 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1599 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1600 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1601 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1602 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1603 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1604 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1605 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 1606 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 1607 { 0, NULL } 1608}; 1609 1610/* Core99 & MacRISC 2 machines (all machines released since the 1611 * iBook (included), that is all AGP machines, except pangea 1612 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 1613 * used on iBook2 & iMac "flow power". 1614 */ 1615static struct feature_table_entry core99_features[] __pmacdata = { 1616 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1617 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 1618 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1619 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 1620 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 1621 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 1622 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 1623 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 1624 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 1625 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 1626 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 1627 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 1628#ifdef CONFIG_SMP 1629 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 1630#endif /* CONFIG_SMP */ 1631 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 1632 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 1633 { 0, NULL } 1634}; 1635 1636/* RackMac 1637 */ 1638static struct feature_table_entry rackmac_features[] __pmacdata = { 1639 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1640 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1641 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 1642 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 1643 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 1644 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 1645 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 1646 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 1647 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 1648#ifdef CONFIG_SMP 1649 { PMAC_FTR_RESET_CPU, rackmac_reset_cpu }, 1650#endif /* CONFIG_SMP */ 1651 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 1652 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 1653 { 0, NULL } 1654}; 1655 1656/* Pangea features 1657 */ 1658static struct feature_table_entry pangea_features[] __pmacdata = { 1659 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1660 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 1661 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1662 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 1663 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 1664 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 1665 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 1666 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 1667 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 1668 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 1669 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 1670 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 1671 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 1672 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 1673 { 0, NULL } 1674}; 1675 1676static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { 1677 /* Warning: ordering is important as some models may claim 1678 * beeing compatible with several types 1679 */ 1680 { "AAPL,8500", "PowerMac 8500/8600", 1681 PMAC_TYPE_PSURGE, NULL, 1682 0 1683 }, 1684 { "AAPL,9500", "PowerMac 9500/9600", 1685 PMAC_TYPE_PSURGE, NULL, 1686 0 1687 }, 1688 { "AAPL,7500", "PowerMac 7500", 1689 PMAC_TYPE_PSURGE, NULL, 1690 0 1691 }, 1692 { "AAPL,ShinerESB", "Apple Network Server", 1693 PMAC_TYPE_ANS, NULL, 1694 0 1695 }, 1696 { "AAPL,e407", "Alchemy", 1697 PMAC_TYPE_ALCHEMY, NULL, 1698 0 1699 }, 1700 { "AAPL,e411", "Gazelle", 1701 PMAC_TYPE_GAZELLE, NULL, 1702 0 1703 }, 1704 { "AAPL,3400/2400", "PowerBook 3400", 1705 PMAC_TYPE_HOOPER, ohare_features, 1706 PMAC_MB_CAN_SLEEP 1707 }, 1708 { "AAPL,3500", "PowerBook 3500", 1709 PMAC_TYPE_KANGA, ohare_features, 1710 PMAC_MB_CAN_SLEEP 1711 }, 1712 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)", 1713 PMAC_TYPE_GOSSAMER, heathrow_desktop_features, 1714 0 1715 }, 1716 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)", 1717 PMAC_TYPE_SILK, heathrow_desktop_features, 1718 0 1719 }, 1720 { "AAPL,PowerBook1998", "PowerBook Wallstreet", 1721 PMAC_TYPE_WALLSTREET, heathrow_laptop_features, 1722 PMAC_MB_CAN_SLEEP 1723 }, 1724 { "PowerBook1,1", "PowerBook 101 (Lombard)", 1725 PMAC_TYPE_101_PBOOK, paddington_features, 1726 PMAC_MB_CAN_SLEEP 1727 }, 1728 { "iMac,1", "iMac (first generation)", 1729 PMAC_TYPE_ORIG_IMAC, paddington_features, 1730 0 1731 }, 1732 { "PowerMac4,1", "iMac \"Flower Power\"", 1733 PMAC_TYPE_PANGEA_IMAC, pangea_features, 1734 PMAC_MB_CAN_SLEEP 1735 }, 1736 { "PowerBook4,3", "iBook 2 rev. 2", 1737 PMAC_TYPE_IBOOK2, pangea_features, 1738 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1739 }, 1740 { "PowerBook4,2", "iBook 2", 1741 PMAC_TYPE_IBOOK2, pangea_features, 1742 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1743 }, 1744 { "PowerBook4,1", "iBook 2", 1745 PMAC_TYPE_IBOOK2, pangea_features, 1746 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1747 }, 1748 { "PowerMac4,4", "eMac", 1749 PMAC_TYPE_EMAC, core99_features, 1750 PMAC_MB_CAN_SLEEP 1751 }, 1752 { "PowerMac4,2", "Flat panel iMac", 1753 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features, 1754 PMAC_MB_CAN_SLEEP 1755 }, 1756 { "PowerMac1,1", "Blue&White G3", 1757 PMAC_TYPE_YOSEMITE, paddington_features, 1758 0 1759 }, 1760 { "PowerMac1,2", "PowerMac G4 PCI Graphics", 1761 PMAC_TYPE_YIKES, paddington_features, 1762 0 1763 }, 1764 { "PowerBook2,1", "iBook (first generation)", 1765 PMAC_TYPE_ORIG_IBOOK, core99_features, 1766 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 1767 }, 1768 { "PowerMac3,1", "PowerMac G4 AGP Graphics", 1769 PMAC_TYPE_SAWTOOTH, core99_features, 1770 PMAC_MB_OLD_CORE99 1771 }, 1772 { "PowerMac3,2", "PowerMac G4 AGP Graphics", 1773 PMAC_TYPE_SAWTOOTH, core99_features, 1774 PMAC_MB_OLD_CORE99 1775 }, 1776 { "PowerMac3,3", "PowerMac G4 AGP Graphics", 1777 PMAC_TYPE_SAWTOOTH, core99_features, 1778 PMAC_MB_OLD_CORE99 1779 }, 1780 { "PowerMac2,1", "iMac FireWire", 1781 PMAC_TYPE_FW_IMAC, core99_features, 1782 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 1783 }, 1784 { "PowerMac2,2", "iMac FireWire", 1785 PMAC_TYPE_FW_IMAC, core99_features, 1786 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 1787 }, 1788 { "PowerBook2,2", "iBook FireWire", 1789 PMAC_TYPE_FW_IBOOK, core99_features, 1790 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_OLD_CORE99 1791 }, 1792 { "PowerMac5,1", "PowerMac G4 Cube", 1793 PMAC_TYPE_CUBE, core99_features, 1794 PMAC_MB_OLD_CORE99 1795 }, 1796 { "PowerMac3,4", "PowerMac G4 Silver", 1797 PMAC_TYPE_QUICKSILVER, core99_features, 1798 0 1799 }, 1800 { "PowerMac3,5", "PowerMac G4 Silver", 1801 PMAC_TYPE_QUICKSILVER, core99_features, 1802 0 1803 }, 1804 { "PowerBook3,1", "PowerBook Pismo", 1805 PMAC_TYPE_PISMO, core99_features, 1806 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_OLD_CORE99 1807 }, 1808 { "PowerBook3,2", "PowerBook Titanium", 1809 PMAC_TYPE_TITANIUM, core99_features, 1810 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1811 }, 1812 { "PowerBook3,3", "PowerBook Titanium II", 1813 PMAC_TYPE_TITANIUM2, core99_features, 1814 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1815 }, 1816 { "PowerBook3,4", "PowerBook Titanium III", 1817 PMAC_TYPE_TITANIUM3, core99_features, 1818 PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER 1819 }, 1820 { "RackMac1,1", "XServe", 1821 PMAC_TYPE_RACKMAC, rackmac_features, 1822 0, 1823 }, 1824 { "PowerMac3,6", "PowerMac G4 Windtunnel", 1825 PMAC_TYPE_WINDTUNNEL, rackmac_features, 1826 0, 1827 }, 1828}; 1829 1830/* 1831 * The toplevel feature_call callback 1832 */ 1833int __pmac 1834pmac_do_feature_call(unsigned int selector, ...) 1835{ 1836 struct device_node* node; 1837 int param, value, i; 1838 feature_call func = NULL; 1839 va_list args; 1840 1841 if (pmac_mb.features) 1842 for (i=0; pmac_mb.features[i].function; i++) 1843 if (pmac_mb.features[i].selector == selector) { 1844 func = pmac_mb.features[i].function; 1845 break; 1846 } 1847 if (!func) 1848 for (i=0; any_features[i].function; i++) 1849 if (any_features[i].selector == selector) { 1850 func = any_features[i].function; 1851 break; 1852 } 1853 if (!func) 1854 return -ENODEV; 1855 1856 va_start(args, selector); 1857 node = (struct device_node*)va_arg(args, void*); 1858 param = va_arg(args, int); 1859 value = va_arg(args, int); 1860 va_end(args); 1861 1862 return func(node, param, value); 1863} 1864 1865static int __init 1866probe_motherboard(void) 1867{ 1868 int i; 1869 struct macio_chip* macio = &macio_chips[0]; 1870 const char* model = NULL; 1871 struct device_node *dt; 1872 1873 /* Lookup known motherboard type in device-tree. First try an 1874 * exact match on the "model" property, then try a "compatible" 1875 * match is none is found. 1876 */ 1877 dt = find_devices("device-tree"); 1878 if (dt != NULL) 1879 model = (const char *) get_property(dt, "model", NULL); 1880 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 1881 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) { 1882 pmac_mb = pmac_mb_defs[i]; 1883 goto found; 1884 } 1885 } 1886 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 1887 if (machine_is_compatible(pmac_mb_defs[i].model_string)) { 1888 pmac_mb = pmac_mb_defs[i]; 1889 goto found; 1890 } 1891 } 1892 1893 /* Fallback to selection depending on mac-io chip type */ 1894 switch(macio->type) { 1895 case macio_grand_central: 1896 pmac_mb.model_id = PMAC_TYPE_PSURGE; 1897 pmac_mb.model_name = "Unknown PowerSurge"; 1898 break; 1899 case macio_ohare: 1900 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE; 1901 pmac_mb.model_name = "Unknown OHare-based"; 1902 break; 1903 case macio_heathrow: 1904 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW; 1905 pmac_mb.model_name = "Unknown Heathrow-based"; 1906 pmac_mb.features = heathrow_desktop_features; 1907 break; 1908 case macio_paddington: 1909 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON; 1910 pmac_mb.model_name = "Unknown Paddington-based"; 1911 pmac_mb.features = paddington_features; 1912 break; 1913 case macio_keylargo: 1914 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99; 1915 pmac_mb.model_name = "Unknown Keylargo-based"; 1916 pmac_mb.features = core99_features; 1917 break; 1918 case macio_pangea: 1919 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA; 1920 pmac_mb.model_name = "Unknown Pangea-based"; 1921 pmac_mb.features = pangea_features; 1922 break; 1923 default: 1924 return -ENODEV; 1925 } 1926found: 1927 /* Fixup Hooper vs. Comet */ 1928 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) { 1929 u32* mach_id_ptr = (u32*)ioremap(0xf3000034, 4); 1930 if (!mach_id_ptr) 1931 return -ENODEV; 1932 /* Here, I used to disable the media-bay on comet. It 1933 * appears this is wrong, the floppy connector is actually 1934 * a kind of media-bay and works with the current driver. 1935 */ 1936 if ((*mach_id_ptr) & 0x20000000UL) 1937 pmac_mb.model_id = PMAC_TYPE_COMET; 1938 iounmap(mach_id_ptr); 1939 } 1940 1941 /* Set default value of powersave_nap on machines that support it. 1942 * It appears that uninorth rev 3 has a problem with it, we don't 1943 * enable it on those. In theory, the flush-on-lock property is 1944 * supposed to be set when not supported, but I'm not very confident 1945 * that all Apple OF revs did it properly, I do it the paranoid way. 1946 */ 1947 while (uninorth_base && uninorth_rev > 3) { 1948 struct device_node* np = find_path_device("/cpus"); 1949 if (!np || !np->child) { 1950 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n"); 1951 break; 1952 } 1953 np = np->child; 1954 /* Nap mode not supported on SMP */ 1955 if (np->sibling) 1956 break; 1957 /* Nap mode not supported if flush-on-lock property is present */ 1958 if (get_property(np, "flush-on-lock", NULL)) 1959 break; 1960 powersave_nap = 1; 1961 printk(KERN_INFO "Processor NAP mode on idle enabled.\n"); 1962 break; 1963 } 1964 1965 /* On CPUs that support it (750FX), lowspeed by default during 1966 * NAP mode 1967 */ 1968 powersave_lowspeed = 1; 1969 1970 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name); 1971 return 0; 1972} 1973 1974/* Initialize the Core99 UniNorth host bridge and memory controller 1975 */ 1976static void __init 1977probe_uninorth(void) 1978{ 1979 unsigned long actrl; 1980 1981 /* Locate core99 Uni-N */ 1982 uninorth_node = find_devices("uni-n"); 1983 if (uninorth_node && uninorth_node->n_addrs > 0) { 1984 uninorth_base = ioremap(uninorth_node->addrs[0].address, 0x4000); 1985 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION)); 1986 } else 1987 uninorth_node = NULL; 1988 1989 if (!uninorth_node) 1990 return; 1991 1992 printk(KERN_INFO "Found Uninorth memory controller & host bridge, revision: %d\n", 1993 uninorth_rev); 1994 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base); 1995 1996 /* Set the arbitrer QAck delay according to what Apple does 1997 */ 1998 if (uninorth_rev < 0x11) { 1999 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK; 2000 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 : 2001 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT; 2002 UN_OUT(UNI_N_ARB_CTRL, actrl); 2003 } 2004 2005 /* Some more magic as done by them in recent MacOS X on UniNorth 2006 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI 2007 * memory timeout 2008 */ 2009 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0) 2010 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff); 2011} 2012 2013static void __init 2014probe_one_macio(const char* name, const char* compat, int type) 2015{ 2016 struct device_node* node; 2017 int i; 2018 volatile u32* base; 2019 u32* revp; 2020 2021 node = find_devices(name); 2022 if (!node || !node->n_addrs) 2023 return; 2024 if (compat) 2025 do { 2026 if (device_is_compatible(node, compat)) 2027 break; 2028 node = node->next; 2029 } while (node); 2030 if (!node) 2031 return; 2032 for(i=0; i<MAX_MACIO_CHIPS; i++) { 2033 if (!macio_chips[i].of_node) 2034 break; 2035 if (macio_chips[i].of_node == node) 2036 return; 2037 } 2038 if (i >= MAX_MACIO_CHIPS) { 2039 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n"); 2040 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name); 2041 return; 2042 } 2043 base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size); 2044 if (!base) { 2045 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n"); 2046 return; 2047 } 2048 if (type == macio_keylargo) { 2049 u32* did = (u32 *)get_property(node, "device-id", NULL); 2050 if (*did == 0x00000025) 2051 type = macio_pangea; 2052 } 2053 macio_chips[i].of_node = node; 2054 macio_chips[i].type = type; 2055 macio_chips[i].base = base; 2056 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; 2057 revp = (u32 *)get_property(node, "revision-id", NULL); 2058 if (revp) 2059 macio_chips[i].rev = *revp; 2060 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n", 2061 macio_names[type], macio_chips[i].rev, macio_chips[i].base); 2062} 2063 2064static int __init 2065probe_macios(void) 2066{ 2067 /* Warning, ordering is important */ 2068 probe_one_macio("gc", NULL, macio_grand_central); 2069 probe_one_macio("ohare", NULL, macio_ohare); 2070 probe_one_macio("pci106b,7", NULL, macio_ohareII); 2071 probe_one_macio("mac-io", "keylargo", macio_keylargo); 2072 probe_one_macio("mac-io", "paddington", macio_paddington); 2073 probe_one_macio("mac-io", "gatwick", macio_gatwick); 2074 probe_one_macio("mac-io", "heathrow", macio_heathrow); 2075 2076 /* Make sure the "main" macio chip appear first */ 2077 if (macio_chips[0].type == macio_gatwick 2078 && macio_chips[1].type == macio_heathrow) { 2079 struct macio_chip temp = macio_chips[0]; 2080 macio_chips[0] = macio_chips[1]; 2081 macio_chips[1] = temp; 2082 } 2083 if (macio_chips[0].type == macio_ohareII 2084 && macio_chips[1].type == macio_ohare) { 2085 struct macio_chip temp = macio_chips[0]; 2086 macio_chips[0] = macio_chips[1]; 2087 macio_chips[1] = temp; 2088 } 2089 2090 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0; 2091} 2092 2093static void __init 2094initial_serial_shutdown(struct device_node* np) 2095{ 2096 int len; 2097 struct slot_names_prop { 2098 int count; 2099 char name[1]; 2100 } *slots; 2101 char *conn; 2102 int port_type = PMAC_SCC_ASYNC; 2103 int modem = 0; 2104 2105 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len); 2106 conn = get_property(np, "AAPL,connector", &len); 2107 if (conn && (strcmp(conn, "infrared") == 0)) 2108 port_type = PMAC_SCC_IRDA; 2109 else if (device_is_compatible(np, "cobalt")) 2110 modem = 1; 2111 else if (slots && slots->count > 0) { 2112 if (strcmp(slots->name, "IrDA") == 0) 2113 port_type = PMAC_SCC_IRDA; 2114 else if (strcmp(slots->name, "Modem") == 0) 2115 modem = 1; 2116 } 2117 if (modem) 2118 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0); 2119 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0); 2120} 2121 2122static void __init 2123set_initial_features(void) 2124{ 2125 struct device_node* np; 2126 2127 /* That hack appears to be necessary for some StarMax motherboards 2128 * but I'm not too sure it was audited for side-effects on other 2129 * ohare based machines... 2130 * Since I still have difficulties figuring the right way to 2131 * differenciate them all and since that hack was there for a long 2132 * time, I'll keep it around 2133 */ 2134 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) { 2135 struct macio_chip* macio = &macio_chips[0]; 2136 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES); 2137 } else if (macio_chips[0].type == macio_ohare) { 2138 struct macio_chip* macio = &macio_chips[0]; 2139 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2140 } else if (macio_chips[1].type == macio_ohare) { 2141 struct macio_chip* macio = &macio_chips[1]; 2142 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2143 } 2144 2145 if (macio_chips[0].type == macio_keylargo || 2146 macio_chips[0].type == macio_pangea) { 2147 /* Enable GMAC for now for PCI probing. It will be disabled 2148 * later on after PCI probe 2149 */ 2150 np = find_devices("ethernet"); 2151 while(np) { 2152 if (np->parent 2153 && device_is_compatible(np->parent, "uni-north") 2154 && device_is_compatible(np, "gmac")) 2155 core99_gmac_enable(np, 0, 1); 2156 np = np->next; 2157 } 2158 2159 /* Enable FW before PCI probe. Will be disabled later on 2160 * Note: We should have a batter way to check that we are 2161 * dealing with uninorth internal cell and not a PCI cell 2162 * on the external PCI. The code below works though. 2163 */ 2164 np = find_devices("firewire"); 2165 while(np) { 2166 if (np->parent 2167 && device_is_compatible(np->parent, "uni-north") 2168 && (device_is_compatible(np, "pci106b,18") || 2169 device_is_compatible(np, "pci106b,30") || 2170 device_is_compatible(np, "pci11c1,5811"))) { 2171 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2172 core99_firewire_enable(np, 0, 1); 2173 } 2174 np = np->next; 2175 } 2176 2177 /* Switch airport off */ 2178 np = find_devices("radio"); 2179 while(np) { 2180 if (np && np->parent == macio_chips[0].of_node) { 2181 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; 2182 core99_airport_enable(np, 0, 0); 2183 } 2184 np = np->next; 2185 } 2186 } 2187 2188 /* On all machines that support sound PM, switch sound off */ 2189 if (macio_chips[0].of_node) 2190 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, 2191 macio_chips[0].of_node, 0, 0); 2192 2193 /* While on some desktop G3s, we turn it back on */ 2194 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow 2195 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER || 2196 pmac_mb.model_id == PMAC_TYPE_SILK)) { 2197 struct macio_chip* macio = &macio_chips[0]; 2198 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 2199 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 2200 } 2201 2202 2203 /* On all machines, switch modem & serial ports off */ 2204 np = find_devices("ch-a"); 2205 while(np) { 2206 initial_serial_shutdown(np); 2207 np = np->next; 2208 } 2209 np = find_devices("ch-b"); 2210 while(np) { 2211 initial_serial_shutdown(np); 2212 np = np->next; 2213 } 2214} 2215 2216void __init 2217pmac_feature_init(void) 2218{ 2219 /* Detect the UniNorth memory controller */ 2220 probe_uninorth(); 2221 2222 /* Probe mac-io controllers */ 2223 if (probe_macios()) { 2224 printk(KERN_WARNING "No mac-io chip found\n"); 2225 return; 2226 } 2227 2228 /* Probe machine type */ 2229 if (probe_motherboard()) 2230 printk(KERN_WARNING "Unknown PowerMac !\n"); 2231 2232 /* Set some initial features (turn off some chips that will 2233 * be later turned on) 2234 */ 2235 set_initial_features(); 2236} 2237 2238void __init 2239pmac_feature_late_init(void) 2240{ 2241 struct device_node* np; 2242 2243 /* Request some resources late */ 2244 if (uninorth_node) 2245 request_OF_resource(uninorth_node, 0, NULL); 2246 np = find_devices("hammerhead"); 2247 if (np) 2248 request_OF_resource(np, 0, NULL); 2249 np = find_devices("interrupt-controller"); 2250 if (np) 2251 request_OF_resource(np, 0, NULL); 2252} 2253