1/* 2 * Copyright (C) 2000 RidgeRun, Inc. 3 * Author: RidgeRun, Inc. 4 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com 5 * 6 * Copyright 2001 MontaVista Software Inc. 7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 8 * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * You should have received a copy of the GNU General Public License along 27 * with this program; if not, write to the Free Software Foundation, Inc., 28 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 * 30 */ 31#include <linux/errno.h> 32#include <linux/init.h> 33#include <linux/kernel_stat.h> 34#include <linux/module.h> 35#include <linux/signal.h> 36#include <linux/sched.h> 37#include <linux/types.h> 38#include <linux/interrupt.h> 39#include <linux/ioport.h> 40#include <linux/timex.h> 41#include <linux/slab.h> 42#include <linux/random.h> 43#include <asm/bitops.h> 44#include <asm/bootinfo.h> 45#include <asm/io.h> 46#include <asm/irq.h> 47#include <asm/mipsregs.h> 48#include <asm/system.h> 49 50 51static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED; 52 53/* Function for careful CP0 interrupt mask access */ 54static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in) 55{ 56 unsigned long status; 57 unsigned clr_mask; 58 unsigned set_mask; 59 60 /* do the low 8 bits first */ 61 clr_mask = 0xff & clr_mask_in; 62 set_mask = 0xff & set_mask_in; 63 status = read_c0_status(); 64 status &= ~((clr_mask & 0xFF) << 8); 65 status |= (set_mask & 0xFF) << 8; 66 write_c0_status(status); 67 68 /* do the high 8 bits */ 69 clr_mask = 0xff & (clr_mask_in >> 8); 70 set_mask = 0xff & (set_mask_in >> 8); 71 status = read_c0_intcontrol(); 72 status &= ~((clr_mask & 0xFF) << 8); 73 status |= (set_mask & 0xFF) << 8; 74 write_c0_intrcontrol(status); 75} 76 77static inline void mask_irq(unsigned int irq) 78{ 79 modify_cp0_intmask(irq, 0); 80} 81 82static inline void unmask_irq(unsigned int irq) 83{ 84 modify_cp0_intmask(0, irq); 85} 86 87static void enable_cp7000_irq(unsigned int irq) 88{ 89 unsigned long flags; 90 91 spin_lock_irqsave(&rm7000_irq_lock, flags); 92 unmask_irq(1 << irq); 93 spin_unlock_irqrestore(&rm7000_irq_lock, flags); 94} 95 96static unsigned int startup_cp7000_irq(unsigned int irq) 97{ 98 enable_cp7000_irq(irq); 99 100 return 0; /* never anything pending */ 101} 102 103static void disable_cp7000_irq(unsigned int irq) 104{ 105 unsigned long flags; 106 107 spin_lock_irqsave(&rm7000_irq_lock, flags); 108 mask_irq(1 << irq); 109 spin_unlock_irqrestore(&rm7000_irq_lock, flags); 110} 111 112#define shutdown_cp7000_irq disable_cp7000_irq 113 114static void mask_and_ack_cp7000_irq(unsigned int irq) 115{ 116 mask_irq(1 << irq); 117} 118 119static void end_cp7000_irq(unsigned int irq) 120{ 121 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 122 unmask_irq(1 << irq); 123} 124 125static struct hw_interrupt_type cp7000_hpcdma_irq_type = { 126 "CP7000", 127 startup_cp7000_irq, 128 shutdown_cp7000_irq, 129 enable_cp7000_irq, 130 disable_cp7000_irq, 131 mask_and_ack_cp7000_irq, 132 end_cp7000_irq, 133 NULL 134}; 135 136 137extern asmlinkage void ocelot_handle_int(void); 138extern void gt64240_irq_init(void); 139 140void __init init_IRQ(void) 141{ 142 int i; 143 144 /* 145 * Clear all of the interrupts while we change the able around a bit. 146 * int-handler is not on bootstrap 147 */ 148 clear_c0_status(ST0_IM | ST0_BEV); 149 __cli(); 150 151 /* Sets the first-level interrupt dispatcher. */ 152 set_except_vector(0, ocelot_handle_int); 153 init_generic_irq(); 154 155 for (i = 0; i <= 15; i++) { 156 irq_desc[i].status = IRQ_DISABLED; 157 irq_desc[i].action = 0; 158 irq_desc[i].depth = 1; 159 irq_desc[i].handler = &cp7000_hpcdma_irq_type; 160 } 161 162 gt64240_irq_init(); 163 164#ifdef CONFIG_REMOTE_DEBUG 165 printk("start kgdb ...\n"); 166 set_debug_traps(); 167 breakpoint(); /* you may move this line to whereever you want :-) */ 168#endif 169#ifdef CONFIG_GDB_CONSOLE 170 register_gdb_console(); 171#endif 172} 173