1
2/*
3 * Copyright (c) 2000-2001 Silicon Graphics, Inc.  All rights reserved.
4 */
5
6#include <linux/config.h>
7#ifdef CONFIG_IA64_SGI_AUTOTEST
8
9// Testing only.
10// Routine will cause MCAs
11//   zzzmsa(n)
12//      n=0 MCA via duplicate TLB dropin
13//      n=0 MCA via read of garbage address
14//
15
16#define ITIR(key, ps)           ((key<<8) | (ps<<2))
17#define TLB_PAGESIZE            28                      // Use 256MB pages for now.
18
19                        .global zzzmca
20                        .proc   zzzmca
21zzzmca:
22                        alloc   loc4       = ar.pfs,2,8,1,0;;
23                        cmp.ne  p6,p0=r32,r0;;
24                        movl    r2=0x2dead
25                        movl    r3=0x3dead
26                        movl    r15=0x15dead
27                        movl    r16=0x16dead
28                        movl    r31=0x31dead
29                        movl    loc0=0x34beef
30                        movl    loc1=0x35beef
31                        movl    loc2=0x36beef
32                        movl    loc3=0x37beef
33                        movl    out0=0x42beef
34
35                        movl    r20=0x32feed;;
36                        mov     ar32=r20
37                        movl    r20=0x36feed;;
38                        mov     ar36=r20
39                        movl    r20=0x65feed;;
40                        mov     ar65=r20
41                        movl    r20=0x66feed;;
42                        mov     ar66=r20
43
44(p6)                    br.cond.sptk    1f
45
46                        rsm      0x2000;;
47                        srlz.d;
48                        mov      r11      = 1
49                        mov      r3       = ITIR(0,TLB_PAGESIZE);;
50                        mov      cr.itir  = r3
51                        mov      r10      = 0;;
52                        itr.d    dtr[r11] = r10;;
53                        mov      r11      = 2
54
55                        itr.d    dtr[r11] = r10;;
56                        br      9f
57
581:                      movl    r8=0xfe00000048;;
59                        ld8     r9=[r8];;
60                        mf
61                        mf.a
62                        srlz.d
63
649:                      mov     ar.pfs=loc4
65                        br.ret.sptk     rp
66
67                        .endp   zzzmca
68
69                        .global zzzspec
70                        .proc   zzzspec
71zzzspec:
72			mov	r8=r32
73			movl	r9=0xe000000000000000
74			movl	r10=0x4000;;
75			ld8.s	r16=[r8];;
76			ld8.s	r17=[r9];;
77			add	r8=r8,r10;;
78			ld8.s	r18=[r8];;
79			add	r8=r8,r10;;
80			ld8.s	r19=[r8];;
81			add	r8=r8,r10;;
82			ld8.s	r20=[r8];;
83			mov	r8=r0
84			tnat.nz	p6,p0=r16
85			tnat.nz	p7,p0=r17
86			tnat.nz	p8,p0=r18
87			tnat.nz	p9,p0=r19
88			tnat.nz	p10,p0=r20;;
89		(p6)	dep	r8=-1,r8,0,1;;
90		(p7)	dep	r8=-1,r8,1,1;;
91		(p8)	dep	r8=-1,r8,2,1;;
92		(p9)	dep	r8=-1,r8,3,1;;
93		(p10)	dep	r8=-1,r8,4,1;;
94                        br.ret.sptk     rp
95                        .endp   zzzspec
96
97                        .global zzzspec2
98                        .proc   zzzspec2
99zzzspec2:
100			cmp.eq	p6,p7=r2,r2
101			movl	r16=0xc0000a0001000020
102			;;
103			mf
104			;;
105			ld8	r9=[r16]
106		(p6)	br.spnt	1f
107			ld8	r10=[r32]
108			;;
109		1:	mf.a
110			mf
111
112			ld8	r9=[r16];;
113			cmp.ne	p6,p7=r9,r16
114		(p6)	br.spnt	1f
115			ld8	r10=[r32]
116			;;
117		1:	mf.a
118			mf
119
120			ld8	r9=[r33];;
121			cmp.ne	p6,p7=r9,r33
122		(p6)	br.spnt	1f
123			ld8	r10=[r32]
124			;;
125		1:	mf.a
126			mf
127
128			tpa	r23=r32
129			add	r20=512,r33
130			add	r21=1024,r33;;
131			ld8	r9=[r20]
132			ld8	r10=[r21];;
133			nop.i	0
134			{ .mib
135			nop.m 0
136			cmp.ne	p6,p7=r10,r33
137		(p6)	br.spnt	1f
138			}
139			ld8	r10=[r32]
140			;;
141		1:	mf.a
142			mf
143			br.ret.sptk     rp
144
145                        .endp   zzzspec
146
147#endif
148
149