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README

1/*  *********************************************************************
2    *  Broadcom Common Firmware Environment (CFE)
3    *  
4    *  README
5    *  
6    *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
7    *  
8    *********************************************************************  
9    *
10    *  Copyright 2000,2001,2002,2003
11    *  Broadcom Corporation. All rights reserved.
12    *  
13    *  This software is furnished under license and may be used and 
14    *  copied only in accordance with the following terms and 
15    *  conditions.  Subject to these conditions, you may download, 
16    *  copy, install, use, modify and distribute modified or unmodified 
17    *  copies of this software in source and/or binary form.  No title 
18    *  or ownership is transferred hereby.
19    *  
20    *  1) Any source code used, modified or distributed must reproduce 
21    *     and retain this copyright notice and list of conditions 
22    *     as they appear in the source file.
23    *  
24    *  2) No right is granted to use any trade name, trademark, or 
25    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
26    *     name may not be used to endorse or promote products derived 
27    *     from this software without the prior written permission of 
28    *     Broadcom Corporation.
29    *  
30    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
31    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
32    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
33    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
34    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
35    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
36    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
37    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
38    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
39    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
40    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
41    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
42    *     THE POSSIBILITY OF SUCH DAMAGE.
43    ********************************************************************* */
44
45RELEASE NOTES FOR:  CFE version 1.0.36
46
47------------------------------------------------------------------------------
48INTRODUCTION
49------------------------------------------------------------------------------
50
51This directory contains Broadcom's Broadband processor division
52"Common Firmware Environment," or CFE.  (pronounce it 'cafe' if you like)
53
54It is intended to be a flexible toolkit of CPU initialization and 
55bootstrap code for use on processors like the SB1250 and its derivatives.
56
57CFE contains the following important features:
58
59   * Easy to port to new SB1250 designs
60   * Initializes CPUs, caches, memory controllers, and peripherals
61   * Built-in device drivers for SB1250 SOC peripherals
62   * Several console choices, including serial ports, ROM
63     emulators, JTAG, etc.
64   * Environment storage in NV EEPROM, flash, etc.
65   * Supports big or little endian operation
66   * Supports 32-bit and 64-bit operation
67   * Support for network bootstrap.  Network protocols supported 
68     include IP,ARP,ICMP,UDP,DHCP,TFTP.
69   * Support for disk bootstrap.
70   * Provides an external API for boot loaders and startup programs
71   * Simple user interface.  UI is easy to remove for embedded apps.
72
73See the file 'TODO' for a list of things that are being considered
74as CFE matures.
75
76There is some documentation in PDF format in the docs/ directory.
77
78------------------------------------------------------------------------
79Customers: If you have any comments or suggestions about this
80firmware, please email me at mpl@broadcom.com - I have tried to
81anticipate many common requirements, but I need your feedback to
82make this software complete and useful for your designs.
83------------------------------------------------------------------------
84
85Directory organization
86----------------------
87
88CFE is laid out to make it easy to build and maintain versions for
89different boards at the same time.  The directories at this level 
90are the build areas for ports of CFE:
91
92	cfe/		Main CFE source tree
93	build/		The "new" build tree location
94
95The 'build' directory contains build areas for various
96targets, and the skeletal Makefiles that build them.  This
97directory has subdirectories by vendor, so you can create
98your own directory here and avoid hassles with merging changes.
99
100	build/broadcom/bcm947xx/	   BCM947XX evaluation board
101
102The 'arch' directory contains architecture-specific stuff:
103
104	cfe/arch		Top of architecture tree
105	cfe/arch/mips		All MIPS-related subdirectories
106	cfe/arch/mips/cpu	CPU-specfic subdirectories
107	cfe/arch/mips/board	Board-specific subdirectories
108	cfe/arch/mips/common	Common MIPS-related sources
109
110Platform-independent sources continue to live in the cfe/
111directory and its subdirectories:
112
113	cfe/api/     Application programming interface to CFE
114	cfe/applets/	Test "applets" for firmware API
115	cfe/dev/	Device drivers for consoles and boot storage
116	cfe/hosttools/  Tools built on the host
117	cfe/include/	Common include files
118	cfe/lib/	Common library routines
119	cfe/main/	Main program
120	cfe/net/	Network subsystem (IP, DHCP, TFTP, etc.)
121	cfe/pccons/	PC console routines
122	cfe/pci/	PCI and LDT configuration
123	cfe/ui/		User interface
124	cfe/usb/     CFE USB stack
125	cfe/vendor/     Vendor extensions to CFE
126	cfe/verif/      Stuff for running chip verification tests
127	cfe/x86emu/	X86 emulator for VGA initialization
128	cfe/zlib/     General purpose data compression library
129
130
131Building CFE
132------------
133
134To build the firmware for the BCM947xx evaluation boards. 
135for example:
136
137	cd bcm947xx ; gmake all ; cd ..
138
139This will produce:
140
141	bcm947xx/cfe     		ELF file
142	bcm947xx/cfe.bin 		Executable file
143	bcm947xx/cfe.srec 	Motorola S-records
144
145
146------------------------------------------------------------------------------
147CHANGES SINCE PREVIOUS VERSION (1.0.35)
148------------------------------------------------------------------------------
149
150  * The license has been modified to be "GPL compatible."  This
151    means that you should be able to incorporate parts of CFE
152    into a GPL'd program without license hassles.  
153
154  * The Hypertransport initialization code in CFE now supports both
155    the LDT 0.17 and the HyperTransport 1.03 styles of fabric
156    initialization.  There is a new flag, ldt_rev_017, that can be
157    included in the value of the PCI_OPTIONS environment variable.  If
158    that flag is set, the 0.17 initialization procedure will be used.
159    Otherwise, the 1.03 procedure is followed.  There is also a new
160    configuration option, CFG_LDT_REV_017, that sets the default value
161    of the ldt_rev_017 attribute.  This option is specified in the
162    Makefile.
163
164    You must choose the initialization procedure properly, either by
165    default or by making a permanent assignment to PCI_OPTIONS, to
166    match the type of devices present on your HyperTransport chain.
167    If the choice is incorrect, the system can fail to initialize the
168    Hypertransport links and may hang at startup while attempting to
169    do so.
170
171    If set to '1', fabric initialization will be appropriate for
172    the HyperTransport 0.17 specification.  The SP1011 HT->PCI bridge
173    can only operate in 0.17 mode, and standard Makefiles for boards
174    with SP1011s make this the default.
175
176    If set to '0', fabric initalization will be approprate for the 1.01
177    (and later) specification.  The PLX 7520 HT->PCI-X bridge can only
178    operate in this mode.  Standard Makefiles for boards with only HT
179    expansion connectors make this the default.
180
181    Either setting is acceptable when communicating with another
182    BCM1250 in a double-hosted chain, but both ends must agree.
183
184  * CFE now supports initialization of HyperTransport fabrics that
185    include the PLX 7520 HT->PCI-X chip.  For link speeds other than
186    200 MHz, the 1.03 initialization option (above) must be used.
187
188  * The BCM1250CPCI port had incorrectly programmed the GPIO interrupt
189    mask register, preventing Linux from being able to use the on-board
190    IDE interface.  This has been fixed.
191
192  * Some 64-bit/32-bit issues have been fixed in the "flashop engine"
193    that is used for programming flash devices.  In particular, 64-bit
194    ops are used when manipulating addresses in 64-bit mode.
195
196  * The default values for the drive strengths and skews for the
197    DRAM controllers have been modified to be more reasonable for
198    currently shipping parts.    
199
200  * The workarounds for known bugs in the BCM1125's memory controller
201    have been made a run-time check.
202
203  * The command line parser has been substantially rewritten to be more
204    shell-like in its expansion of environment variables.  In particular
205    you can now set an environment variable to include multiple CFE
206    commands.  
207
208  * The command line parser supports "aliases" - if the first word of
209    a command line matches an environment variable, it will be expanded
210    even if there is no preceding dollar sign.  For example, you can
211    now do:
212
213	CFE> setenv start "ifconfig eth0 -auto; boot -elf server:myprogram"
214
215    and later just type "start" to start the program.  
216
217    PLEASE NOTE: If you define an alias that has the same name as a built-in
218    command, you will need to quote the command to prevent the expansion
219    from occuring:
220
221	CFE> setenv e "ifconfig eth0 -auto"
222	CFE> e			(this will run the "ifconfig" command)
223	CFE> 'e'                (this will run the "edit memory" command)
224
225  * By enabling an option, CFG_URLS in your bsp_config.h file, CFE can
226    now process file names in URL syntax.  This option defaults to OFF 
227    to use the current syntax.  When enabled, you can use boot files
228    in the following format:
229
230	CFE> boot -elf tftp://servername/path/to/filename
231	CFE> boot -elf fat://ide0.0/path/to/filename
232	CFE> boot -elf rawfs://flash0.os
233
234    This syntax works with the "boot", "load", and "flash" commands.
235
236  * You can now boot from an HTTP server by enabling "CFG_HTTPFS" in
237    your bsp_config.h file.  This also requires TCP support (define CFG_TCP).
238
239	CFE> boot -elf -http servername:path/to/binary		(old syntax)
240	CFE> boot -elf http://servername/path/to/binary		(URL syntax)
241
242
243------------------------------------------------------------------------------
244CHANGES SINCE PREVIOUS VERSION (1.0.34)
245------------------------------------------------------------------------------
246
247  * CFE now builds using the "sb1-elf" toolchain by default.  
248    It will still build using mips64-sb1sim, but it is recommended
249    that you switch to the new toolchain.
250
251  * The BCM1125E port now uses the SPD EEPROM to store memory
252    parameters.  If the EEPROM is not programmed, a default memory
253    table will be used.
254
255  * For versions of the 1250 and 1125 that are step A0 (anything but
256    pass1) or newer,  PCI code now configures HyperTransport 
257    interrupts for level triggered mode.  For older versions, 
258    configuration is for edge triggered mode as before.
259
260  * If CFE is used to load an operating system such as Linux that
261    relies on CFE's configuration of interrupts, be sure to use only
262    versions of that operating system that can deal with level
263    triggered HyperTransport interrupts (must issue EOIs).
264
265  * Exceptions now display the CAUSE field symbolically, displaying
266    the exception name along with the CAUSE register value.
267
268  * A number of fixes have been made to the SB1250 include files,
269    including the addition of BCM1125 DMA features and some additional
270    constants for the drive strength registers.
271 
272  * Some additional test code has been placed in the firmware's
273    ethernet driver for testing FIFO mode.
274
275  * The memory initialization routines have had an off-by-one 
276    error corrected that can cause the memory to be run slower
277    than the rated maximum.
278
279  * The memory initialization routines will not operate properly
280    on the BCM1125 without recompiling (the #ifdef _SB11XX_ is gone)
281
282  * The memory initialization routines were losing precision
283    in the calculation of tCpuClk, so the calculation has been
284    adjusted to avoid the precision loss.
285
286  * The #ifdef _SB11XX_ in the l2 cache routines is no longer
287    necessary.
288
289  * The ethernet driver and the PHY commands now preserve the state
290    of the GENC pin while doing MII commands.
291
292  * The command line recall should work more like you expect - if you
293    recall the most recent command, it is NOT added to the history,
294    and if you recall any previous command, it IS added.
295
296  * Some fixes have been made to the USB ethernet drivers.
297
298  * The flash driver now handles some broken AMD flash parts
299    better (some AMD parts have reversed sector tables,
300    that need to be sorted in the other order before they
301    can be used).
302
303
304
305------------------------------------------------------------------------------
306CHANGES SINCE PREVIOUS VERSION (1.0.32)
307------------------------------------------------------------------------------
308
309  * Support has been included for the BCM1125 and the errata
310    that is relevant for the firmware.  In particular, there are
311    workarounds for a couple of memory controller issues that affect
312    the BCM112x (and only the 112x, this does not affect the BCM1250).
313
314  * The system include files have been updated to include constants and
315    macros that are useful for BCM1125 users, including support for the
316    new Ethernet DMA features, data mover features, etc.
317
318  * The BCM1250CPCI port now enables memory ECC by default.
319
320  * Autoboot support.  CFE now has a new feature to allow a board package
321    to supply a list of boot devices to try.  For example, you can now
322    say "first try PCMCIA, then the IDE disk, then the flash device,
323    then the network."  You configure the autoboot list in your
324    board_devs.c file by calling "cfe_add_autoboot" one or more times
325    (see swarm_devs.c for an example).  
326
327    You can then either use the "autoboot" UI command (put it in your
328    STARTUP environment) or call cfe_autoboot() at the end of
329    board_final_init() to enable automatic bootstrap. 
330
331    Additional documentation will be placed in the manual for this, but
332    is not there at this release.
333
334  * setjmp has been renamed "lib_setjmp" to prevent future versions 
335    of GCC from doing things that assume how setjmp work.
336
337  * The include files have been modified to allow you to select which
338    chip features will be present.  This can help you avoid using 
339    features that your chip does not have, such as using pass2 features
340    on a pass1 chip, etc.  See the comments in include/sb1250_defs.h
341    for an explanation of the possible selections.  The default is
342    to include all constants for all chips.
343
344  * The ethernet driver now preserves the value of the 'genc' bit
345    on the MDIO pins.  Previously it would always set this bit to zero.
346
347  * The DRAM init routines (and some other places) let you specify the
348    reference clock in hertz via SB1250_REFCLK_HZ.  The reference clock
349    affects timing calculations, so if your reference clock is very
350    nonstandard, you should change this.
351
352  * The DRAM init routines include support for BCM112x processors.
353
354  * The DRAM init routine will now automatically disable CS interleaving
355    on large memory systems that use more thena 1GB of memory per
356    chip-select.
357
358  * The ARP implementation was sending incorrect response messages to
359    inbound ARP requests.  This fix should easily apply to
360    older versions of CFE.  (see net/net_arp.c)
361
362  * The DHCP implementation makes more information available after
363    configuring from a DHCP server.  
364
365    Parameter #130 is a CFE extension that will be placed in the "BOOT_SCRIPT"
366    environment variable.
367
368    Parameter #133 is a CFE extension that will be placed in the "BOOT_OPTIONS"
369    environment variable.
370
371    You can use these variables any way you like.  For example, you could
372    set up an autoboot to read a batch file whose name is specified in
373    the DHCP server's configuration file.  Individual hosts can then
374    have their own private scripts.
375
376  * PCI/LDT configuration has had numerous changes; among them the removal
377    of many device and vendor codes from the text database.  This 
378    reduces CFE's size significantly, but you won't get a pretty
379    message when you install your 8-year-old obscure PCI mouse accelerator
380    anymore.
381
382
383------------------------------------------------------------------------------
384CHANGES SINCE PREVIOUS VERSION (1.0.30)
385------------------------------------------------------------------------------
386
387  * The memory initialization routines have been improved.  The
388    r2wIdle_twocycles bit is now always set to work around a silicon
389    bug, and two bits in the include files (sb1250_mc.h) were
390    reversed.  The new draminit module does a better job at 
391    calculating timing and will take into account a new global
392    parameter (tROUNDTRIP) which represents the total round trip
393    time in nanoseconds from the pins on the 1250 out to the 
394    memory and back.  Using this new module is HIGHLY RECOMMENDED.
395
396  * The 'memconfig' program has been improved - it uses the actual
397    copy of draminit and can be used to calculate memory
398    parameters outside of CFE to be sure they make sense.
399    Use "memconfig -i" for interactive mode.
400
401  * The UART driver for the console has been changed to include a fix
402    for errata 1956, which can cause the baud rate register to be
403    written with bad data, particularly at high "odd" (ending in 50,
404    like 550, 650, 750) speeds.
405
406  * The flash driver has been rewritten.  The new driver is called
407    "newflash" and the implementation is in dev/dev_newflash.c.
408    The new flash driver is smaller and simpler than the old one, and
409    supports some new features, including:
410
411       - Partitioning - you can instantiate sub-flash devices by breaking
412	 a large flash part into pieces, which will have names such
413	 as "flash0.boot", "flash0.os", "flash0.nvram", etc.
414
415       - Support for using flash as NVRAM is much improved.  You use
416 	 the above partitioning scheme to create a partition for the
417 	 NVRAM and attach the NVRAM subsystem to that.  There is no
418	 "hidden" reserved sectors anymore.
419
420       - New flash algorithm code - all of the flash operations are
421 	 in a single assembly file, dev_flashop_engine.S, which is 
422	 relocated to RAM when CFE is running from the flash.  
423
424       - The probe code has changed.  You will need to specify the 
425	 bus width (usually 8 bits for BCM1250 parts) and the flash 
426 	 part width (16-bits or 8-bits).  You would specify 16 bit flash
427	 widths if your 16-bit part is in "8-bit mode.".
428
429    The old flash driver (dev_flash.c) is still there for use by older
430    firmware ports.
431
432  * The memory enum API has been improved to let you enumerate all
433    memory blocks (not just available DRAM).  You can add your own
434    regions to the arena during initialization and query them from
435    applications.
436
437  * There is a new device driver for the National Semiconductor
438    DP83815 PCI Ethernet chipsets.  It is getting hard to find
439    Intel/Digital DC21143 cards, this is the replacement.
440
441  * The concept of "full names" and "boot names" has been removed.
442    All device drivers now have only one name.
443
444  * Support for the RHONE board is now included in the source 
445    distribution and binaries are on the web site.  The RHONE is
446    a SENTOSA-like board that includes a BCM1125 processor.
447
448  * Support for the BCM1250CPCI board is now included in the source 
449    distribution and binaries are on the web site.  The BCM1250CPCI is
450    a SWARM-like board that fits into a CompactPCI chassis.
451
452  * Routines to display information about the CPU type have been added
453    to the common BCM1250 sources.  Most board packages now call this 
454    during initialization to print out CPU revision information.
455
456  * A number of the commands that used to start "test" such as 
457    "test flash" have been either removed or relocated to 
458    other files (most of these things lived in "cfe_tests.c").
459    These were old test routines used to check out internal 
460    CFE features are are no longer needed.
461
462  * The "memorytest" command (in 64-bit firmware versions) has been
463    enhanced slightly to let you specify the cacheability attribute.
464    -cca=5 will do cached accesses, which promotes lots of evict
465    activity.  
466
467  * The include files have been updated in a few places to reflect
468    the user's manual.
469
470  * A USB host stack is now available in the firmware.  The host stack
471    works with OHCI-compatible host controllers and supports USB hubs,
472    keyboards, some mass storage devices, a serial port device, and
473    a couple of Ethernet controllers.  It's there mostly for
474    your amusement, we don't really support this actively.
475
476  * The VGA Console system has been improved to include support for the
477    USB keyboard.  It is now possible to build a version of CFE that
478    will display on a VGA and take its input from a USB keyboard
479    (no serial port!).  Linux can be compiled to "take over"
480    the VGA and keyboard, so you can almost have that "PC" experience
481    you've always wanted with your SWARM.  (or not.)   Like the USB
482    support, it's for your amusement, we don't support this actively.
483
484
485------------------------------------------------------------------------------
486CHANGES SINCE PREVIOUS VERSION (1.0.29)
487------------------------------------------------------------------------------
488
489  * A missing routine in init_ram.S has been added.  This is required
490    for the CFG_RAMAPP version (a RAM version of CFE you can load from a
491    TFTP server).
492
493  * A simple cache error handler has been added to the firmware.
494
495  * There is a new defined, _SERIAL_PORT_LEDS_ that you can put in the
496    swarm_init.S file (or copy into your own board's init routines) to 
497    send the LED messages to the serial port.
498
499------------------------------------------------------------------------------
500CHANGES SINCE PREVIOUS VERSION (1.0.27)
501------------------------------------------------------------------------------
502
503  * A simple TCP stack has been added to the firmware.  If you define
504    CFG_TCP=1, this stack will be added to the firmware build.  
505    Note that this stack is unfinished, largely untested,
506    and is not meant to provide high performance.  As of this version,
507    several important TCP features are not implemented, including
508    slow-start, fast-retransmit, round-trip-delay calculation,
509    out-of-band data, etc.  It works well enough for simple interactive
510    applications (a miniature rlogin client is included) and may be
511    sufficient for a simple httpd.  This stack will be improved over
512    time; it is meant for amusement purposes only at this time.
513
514  * Support has been added for the ST Micro clock chips present
515    on newer SWARM (rev3) boards.  This chip replaces the Xicor X1241
516    on previous versions.  The environment variables are now
517    stored in a second Microchip 24LC128 on SMBus1.
518
519  * A new bsp_config.h option, CFG_UNIPROCESSOR_CPU0, has been
520    added.  If this is set to '1' and CFG_MULTI_CPUS=0 (uniprocessor mode)
521    then the firmware will switch the CPU into "uniprocessor CPU0"
522    mode, making it look more like an 1125 (it will actually report
523    itself as an 1150, since 512KB of L2 cache are available).
524
525  * Moved the exception vectors into RAM.  For relocatable versions
526    of CFE, the exception vectors are now in RAM.  Previously, 
527    exceptions were handled by the ROM version whether or not the
528    firmware was relocated, causing all sorts of problems, including 
529    running the wrong code after an exception.  As a result, CFE is much
530    more robust now at handling exceptions when the GP register 
531    has been trashed, since it can recover the GP value from a low-memory
532    vector.  The PromICE (BOOTRAM) version does not use RAM exception 
533    vectors.  This change also paves the way for building versions
534    of CFE that include a real interrupt handler, should that be required.
535
536  * The exception register dump now includes the register names as
537    well as the numbers.
538
539  * Support has been added to the Ethernet driver for the quirks of the
540    BCM5421 PHY (the quirks only affect A0 silicon).
541
542  * If you run the multiprocessor version of CFE on a single-processor
543    chip (for example, a 1250 that has been restarted in uniprocessor mode),
544    it will not hang when starting the secondary core.  Error codes will
545    be returned to applications that attempt to start the secondary
546    cores.
547
548  * The cache operations now include routines for invalidating  
549    or flushing ranges.  This is of limited use on the 1250.
550
551  * A simple cache error handler has been added.  It will display 
552    'Cerr' on the LEDs.
553
554  * The DRAM init routines now have better support for large memory
555    systems, using an external decoder on the chip select lines.
556
557  * Support has been added to the flash driver for 16-bit Intel-style
558    flash parts, and "burst mode" on the pass2 generic bus interface.
559
560  * The X86 emulator in the VGA init code has been enhanced to include
561    some previously unimplemented instructions.
562
563
564------------------------------------------------------------------------------
565CHANGES SINCE PREVIOUS VERSION (1.0.26)
566------------------------------------------------------------------------------
567
568  * The memory initialization code has been dramatically improved.  
569    It now supports calculating all of the timing parameters using
570    the CPU speed and the timing data in the SPD ROMs on the DIMMs.
571    You can also specify this information from the datasheets for
572    systems with soldered-down memory.
573
574    Better support has been added for non-JEDEC memory types
575    such as FCRAMs and SGRAMs, and this information is also stored
576    in the "initialization table."
577
578    Systems with more than 1GB of physical memory are now supported 
579    correctly by the dram init routines.  The MC_CS_START/END registers
580    were being programmed incorrectly.  A limitation of the current
581    design is that memory DIMMs must not be broken across the 1GB
582    line (for example, in MSB-CS mode, do not install a 512M DIMM,
583    a 128M DIMM, and a 512M DIMM). 
584
585    NOTE: TO MAKE THIS CHANGE, COMPATIBILITY WITH OLD DRAM INIT
586    TABLES HAS BEEN BROKEN!
587
588    You should re-read the CFE manual for information about the new
589    DRAM init table format, which now contains multiple record types
590    to describe memory channels, chip select information, timing
591    information, and geometries.   As more features are added to
592    the memory init routine in the future, new record types can be
593    added.
594
595  * An bug in the L2 cache flush routine has been fixed
596    that might cause some boards to hang at the "L12F"
597    display on the LEDs.  The bug can occur depending on
598    the previous contents of the cache (presumably garbage).
599    In rare circumstances, an ALU overflow can occur because
600    of an incorrect 'dadd' instruction that should have been 'daddu'    
601
602  * All of the BSPs have been updated to support the new memory init
603    routine.  This involves changes to the bsp_config.h files and
604    the various board_init.S files.
605
606  * The memory initialization routine now returns the memory size
607    in megabytes, not bytes.  This prevents overflows on large memory
608    systems using 32-bit firmware.
609
610  * An L2 cache diagnostic is now included.  It is only run for
611    pass2 parts, since the tag format has changed.  If a quadrant
612    of the cache fails the diagnostic, it will be disabled.
613
614  * Support for downloading binaries to SENTOSA boards over the PCI
615    bus is now included.   Enable the CFG_DOWNLOAD parameter 
616    in the makefile to add the required object files and 
617    source.  See the manual for more information about how to
618    use this feature.
619
620  * A better (but still not ideal) memory diagnostic is included 
621    in the 64-bit firmware.  The "memorytest" command will 
622    test all memory not used by CFE.
623
624  * The Ethernet interface will be reset when an OS like Linux
625    exits.  In previous versions Linux would not probe
626    the Ethernet if the kernel was restarted, since the
627    Ethernet address register was not reset.
628
629  * Numerous improvements have been made to the LDT configuration
630    routines.
631
632  * The real-time clock driver for the ST Micro part used on the
633    SENTOSA boards is now included.
634
635  * It is possible to build a variant of CFE that runs in DRAM
636    (to be loaded like an application program) by setting the
637    configuration parameter "CFG_RAMAPP=1" in your Makefile.
638    When this option is used, the resulting CFE binary
639    skips the CPU and DRAM initialization, but continues to install
640    its device drivers.  You can use CFE like a big runtime 
641    library or as a framework for diagnostics or other small apps.
642
643------------------------------------------------------------------------------
644CHANGES SINCE PREVIOUS VERSION (1.0.25)
645------------------------------------------------------------------------------
646
647  * More improvements to the directory structure, moving architecture-specific
648    code and macros into appropriate subdirectories.
649
650  * The new "Sentosa" evaluation board is now a supported target.
651
652  * More macros to customize 32 vs 64-bit implementations  For example,
653    certain CPU-specific things like ERET and hazard avoidance have
654    been moved to each CPU's cpu_config.h file.
655
656  * For the SWARM target, you can now build a "bi-endian"
657    firmware image.  This actually contains two different
658    versions of CFE with some magic code at the exception
659    vectors to transfer control to the appropriate version
660    depending on system endianness.  See the 'biend' target 
661    in swarm/Makefile, arch/mips/common/include/mipsmacros.h,
662    arch/mips/common/src/init_mips.S, and the documentation.
663
664  * The "filesystem" calls have been moved into cfe_filesys.c and are 
665    now functions, not macros.  There is a 'hook' facility to allow
666    you to intercept I/O calls to do preprocessing on data received
667    from the filesys.
668
669  * A 'hook' has been created for zlib (compressed file support).  If you
670    compile with CFG_ZLIB=1 in your Makefile, CFE will support the
671    "-z" switch on the 'boot' and 'load' commands.  This can be used
672    to load compressed binaries, elf files, and s-records.
673
674  * A new 'build' directory has been created.  This directory and
675    its subdirectories will contain the makefiles and object file areas
676    for supported builds.  You can create your own directories in there
677    for your ports, and this should ease merge headaches.
678
679  * The 'dump', 'edit' and 'disassemble' commands now gracefully
680    trap exceptions that occur when you mistype addresses.  CFE will no
681    longer reboot in these cases.  Over time we'll use this feature
682    to catch more exceptions.
683
684  * The "-p" (physical) switch for the dump, edit, and disassemble 
685    commands now makes uncached references to the addresses you specify.
686    It used to make cached references.
687
688  * Non-relocatable builds work again.  There was a bug in one of the
689    macros used in init_mips.S
690
691  * A new include file, sb1250_draminit.h, has been created to hold
692    structures and constants for the DRAM init code.  For example,
693    the DRAMINFO macro, which was duplicated in all the board packages,
694    has been moved here.
695
696  * The DRAM init code now uses the upper bit (bit 7) of the SMBus
697    device address to indicate which SMBus channel the SPDs are on.
698    this way you can use both SMBus channels for SPD ROMs.  There
699    are macros in sb1250_draminit.h to take apart the SMBus
700    device ID into the channel # and device.
701
702  * The DRAM init code now supports chipselect interleaving
703    by setting the CFG_DRAM_CSINTERLEAVE value in bsp_config.h
704    You set this value to the number of bits of chip selects
705    you want to interleave (0=none, 1=CS0/CS1, 2=CS0/1/2/3)
706
707  * The flash device has been substantially rewritten.  It now supports
708    Intel-style flash, 16-bit devices (not particularly useful on
709    the 1250), and "manual" sectoring for JEDEC flash devices that
710    do not have CFI support.  Usage of the flash for NVRAM (environment)
711    storage has been substantially improved and tested.
712
713  * There's a #define in the SWARM init module (swarm_init.S) to cause
714    the LED messages to go to the serial port.  #define _SERIAL_PORT_LEDS_
715    if you want to use it.
716
717  * The environment storage format has changed slightly, but 
718    in a backward-compatible way.  It is now possible to store
719    TLVs whose data portions is more than 255 bytes, and a 
720    portion of the TLV code range has been reserved for 
721    customer use. 
722
723  * The VGA initialization code is once again alive on the SWARM board.
724    (In the processs, it got broken for the P5064.  Oh, well.)  There's
725    still no USB keyboard support, but adventurous souls that want to
726    put text out on a VGA display can now do that, at least for some
727    of the cards we've tried.
728
729  * The real-time-clock commands were not properly setting the clock
730    to "military time" mode, affecting the notion of AM and PM.
731
732  * The real-time-clock code has been divided into two pieces,
733    the user-interface and a standard CFE driver.  This is to
734    make things easier when supporting different RTC chips.
735
736  * Calls through the "init table" in init_mips.S that must take place
737    after relocation should use the new CALLINIT_RELOC macro.  this
738    macro makes use of the text relocation amount (mem_textreloc)
739    and the GP register, so care must be taken when using it.  If 
740    you don't use this macro, however, you can end up running the code
741    non-relocated even though you've gone and moved it!  Basically,
742    pointers stored in the text segment (like the init table) are
743    not fixed up, so fixups must be applied manually.
744
745  * The installboot program in the ./hosttools directory has been
746    improved to be actually useful for installing bootstraps on
747    disks.  You can compile this program under Linux and use it to
748    put a boot sector and boot program on an IDE disk, then boot
749    from that disk via CFE.
750
751  * The FAT filesystem code should now properly detect whether the
752    underlying disk has or doesn't have a partition table.  This
753    can be a problem with CF flash cards - they are 
754    formatted at the factory with partition tables, but if
755    reformatted under Windows 2000, the partition table will be 
756    eliminated (more like a floppy).
757
758  * The FAT filesystem code should now correctly find files stored
759    in subdirectories (below the root)
760
761
762------------------------------------------------------------------------------
763SPECIAL NOTE FOR RELEASES STARTING WITH 1.0.25
764------------------------------------------------------------------------------
765
766  * The directory structure of the CFE firmware has changed
767    substantially starting with 1.0.25.  You will notice many 
768    changes, including:
769
770	- Board, CPU, and architecture-specific files are now
771	  in their own directories.
772
773	- The makefile is distributed among several subdirectories
774
775	- Wherever possible, code has been made more generic.
776
777  	- Some user-interface code has been changed.
778
779    These changes are in anticipation of the use of CFE on
780    future Broadcom processors and reference designs.
781
782    Should you wish, you can also make use of this new organization
783    to port CFE to other MIPS designs, and with some difficulty
784    to non-MIPS designs as well.  
785
786  * The build procedure has been modified to allow you to
787    build the object files into an arbitrary directory
788    that is not related to the source directories.
789
790  * The release that contains this reorganization is now 
791    called "1.0.xx"
792
793  * The documentation (docs/cfe.pdf) contains important information
794    related to the change in the directory structure.
795
796  * The code reorganization that goes with this change is not
797    fully complete, so expect some additional changes in the
798    future, including:
799
800	- A way to conditionally remove all the debug/bringup
801	  code specific to the BCM1250
802
803	- New include files to abstract certain aspects of device
804	  I/O, especially for PCI devices
805
806	- A potential change in the default location that the
807	  default CFE builds take place.  They are currently in
808	  their familiar locations to make it easier for
809 	  you (customers) to incorporate your code.
810
811   * Please let me know if this new directory organization
812     has caused major headaches.
813
814   * The license text has been updated.
815
816
817------------------------------------------------------------------------------
818CHANGES SINCE PREVIOUS VERSION (0.0.23)
819------------------------------------------------------------------------------
820
821    * The directory layout has been substantially modified
822      (see above)
823
824    * The user interface for the memory-related commands,
825      (dump, edit, disassemble) have been improved.  They
826      remember the previous address and length and now
827      have simple switches (-p, -v) to deal with physical
828      and virtual (kernel or useg) addresses.
829
830    * The PCI configuration option has moved from bsp_config.h
831      to the Makefile
832
833    * Some initialization of UI modules have been moved
834      out of cfe_main.c and into board-specific startup 
835      files.
836
837    * The Algorithmics P5064 port has been resurrected to
838      verify the build procedure for other designs.
839
840    * There are new commands to deal with the SWARM board's
841      Xicor X1241 real time clock.  See "show time, set time, set date"
842
843------------------------------------------------------------------------------
844CHANGES SINCE PREVIOUS VERSION (0.0.21)
845------------------------------------------------------------------------------
846
847    * The memory initialization module (sb1250_draminit.c)
848      had a bug where it was not setting the START/END
849      registers properly when using double-sided DIMMs.
850      This is the most important fix in this release.
851
852    * The cfe_ioctl() internal routine now takes the 'offset'
853      parameter for the iocb.  This is used by programs and
854      extensions inside the firmware.
855
856    * The CMD PCI0648 chip has been added to the list of
857      PCI devices probed by the IDE routines.
858
859    * A "vendor commands" file has been added to the
860      vendor/ directory.  Some other changes have been 
861      made to "un-static" variables useful to vendor
862      extensions.
863
864
865    
866------------------------------------------------------------------------------
867CHANGES SINCE PREVIOUS VERSION (0.0.19, 0.0.20)
868------------------------------------------------------------------------------
869
870    * The "C" memory initialization code introduced in 0.0.19
871      has been improved to calculate refresh timing based on
872      CPU speed.  In the future, additional timing parameters will
873      be automatically calculated, particularly for DIMMS.
874      If you have special values for the clock config register you
875      can now specify those in your bsp_config.h file.
876
877    * The PCI subsystem now reads an environment variable PCI_OPTIONS
878      which contains a comma-separated list of flags to control
879      PCI startup.  You can prefix an option name with "no" to
880      turn off an option.  Currently the following flags are defined:
881
882	verbose     	Be very verbose while probing
883	ldt_prefetch	Turn on prefetching from the Sturgeon bridges
884 
885      The default is to enable ldt_prefetch. 
886
887      Some SWARM boards appear to have a problem related to
888      prefetch across the HyperTransport (LDT) bus.  If you experience
889      DMA failures with devices connected to the PCI slots behind
890      the Sturgeon bridge, you may wish to disable prefetching
891      to work around this issue.   To do this, set the
892      PCI_OPTIONS environment variable as follows:
893
894	CFE> setenv -p PCI_OPTIONS "noldt_prefetch" 
895
896 	(reboot for changes to take effect)
897
898      Board support packages should be modified to add the NVRAM
899      device and call cfe_set_envdevice() in the board_console_init()
900      routine instead of board_device_init(), since the PCI
901      init code is done before device initialization.
902
903
904    * A number of improvements have been made to the Tulip (Intel 21143)
905      device driver.
906
907    * The SB1250 include files have had some minor fixes.  In particular,
908      the correct values are now used for the interframe gap in the MAC.
909
910    * The SB1250 Ethernet driver was erroneously setting the M_MAC_FC_SEL
911      bit in all full-duplex modes.  M_MAC_FC_SEL is only supposed to be
912      used to force pause frames.
913
914    * The SWARM board package supports Rev2 SWARM boards, which
915      have all 4 configuration bits on the configuration switch (SW2)
916
917    * A better memory test is now part of the 64-bit CFE,
918      see the "memorytest" command.
919
920    * The 'flash2.m4' file was missing from the 0.0.19 distribution.
921
922
923------------------------------------------------------------------------------
924CHANGES SINCE PREVIOUS VERSION (0.0.17, 0.0.18)
925------------------------------------------------------------------------------
926
927    * The memory initialization code has been rewritten in "C".
928      It should be much easier to read and more flexible now,
929      supporting more memory configurations.  In particular,
930      if you have CFG_DRAM_INTERLEAVE set, CFE will automatically
931      use port interleaving if the DIMMs on adjacent channels
932      are of the same type and geometry.
933
934    * There is a new 'save' command that invokes a TFTP client
935      for writing regions of memory to a TFTP server.  
936      You should ensure that your TFTP server is capable of
937      write access before using this feature.
938
939    * The API functions for the cache flush routines have been
940      filled in, so the bitmask in the iocb.iocb_flags field
941      for determining which type of cache flush to do should
942      behave as the documentation indicates.
943
944    * For customers wishing to extend CFE's APIs, a new 
945      directory "vendor/" has been added to the tree.  
946      If CFG_VENDOR_EXTENSIONS is defined, IOCBs above
947      the value CFE_FW_CMD_VENDOR_USE will be redirected to
948      a vendor-specific dispatch area.  You can implement 
949      custom IOCB functions there.
950
951    * On the C3 platform there is some code to send the
952      4-character LED messages to the serial port.  If your
953      design does not include a 4-character LED, you can 
954      incorporate this into your code to see the LED messages.
955
956    * Many improvements have been made to the Tulip (DC21143) driver.
957
958    * The disassembler has been modified to create far fewer
959      initialized pointers, increasing the amount of space
960      available in the GP area.
961
962    * The value in the A1 register for the primary processor
963      startup is now zero.  Eventually you'll be able to pass
964      a parameter here like you can to CPU1.
965
966    * The "-addr" and "-max" switches to the "load -raw" 
967      command now work.
968
969------------------------------------------------------------------------------
970CHANGES SINCE PREVIOUS VERSION (0.0.16)
971------------------------------------------------------------------------------
972
973    * The LDT initialization code has been improved.  LDT 
974      operation should be much more reliable on SWARM
975      boards.
976    * If you set the configuration switch to zero, CFE was
977      still trying to access PCI space on SWARM boards.
978      This has been fixed.
979
980------------------------------------------------------------------------------
981CHANGES SINCE PREVIOUS VERSION (0.0.15)
982------------------------------------------------------------------------------
983
984BUGS FIXED
985
986    * If you don't initialize the PCI bus, CFE was still trying to
987      read configuration space to configure PCI devices.  This has been
988      fixed.
989
990------------------------------------------------------------------------------
991CHANGES SINCE PREVIOUS MAJOR VERSION (0.0.10)
992------------------------------------------------------------------------------
993
994BUGS FIXED
995
996    * The DRAM CAS latency now defaults to 2.5 for 500MHz 
997      operation.
998    * To work around a PASS1 bug (see the errata) some portions
999      of the multi-CPU startup have been changed.  See the
1000      stuff in init_mips.S in the _SB1250_PASS1_WORKAROUNDS_ 
1001      blocks.
1002
1003NEW FEATURES
1004
1005    * The build procedure now uses 'mkflashimage' to build
1006      a header on the front of a flash image.  This is 
1007      used to prevent you from flashing an invalid file
1008      over a running CFE.
1009    * Many improvements in the PCI/LDT configuration code.
1010    * The DC21143 (Tulip) driver has been improved.
1011    * The IDE driver has been revamped to perform a little
1012      better and work in either endianness without 
1013      unnecessary byte swapping.  
1014    * The PCMCIA driver has been updated to support the SWARM
1015    * A new switch "-p" is required on SETENV to set the
1016      environment in the NVRAM.  It now defaults to storing
1017      in RAM only unless this switch is supplied.
1018    * The environment variable "STARTUP" can be used to run
1019      some commands at boot time.
1020    * You can put multiple commands on a command line by
1021      separating them with semicolons
1022    * The configuration switch can now configure some
1023      aspects of CFE at run time.  See the manual.
1024
1025KNOWN PROBLEMS
1026
1027    * The flash update erases the entire device, not just the 
1028      sectors it needs.
1029    * IDE disks work on real hardware, but ATAPI devices don't.
1030      The Generic Bus timing registers probably need to be tweaked.
1031
1032
1033------------------------------------------------------------------------------
1034RUNNING CFE UNDER THE FUNCTIONAL SIMULATOR
1035------------------------------------------------------------------------------
1036
1037One goal for the functional simulator is for it to more-or-less completely
1038emulate the functionality and peripherals available on the "SWARM"
1039BCM12500 checkout board.  
1040
1041The configuration files in the swarm/ directory contain the current
1042port of CFE to the evaluation board.
1043
1044Heed this warning:
1045
1046NOTE: CFE and the functional simulator are often out of sync, so be sure
1047      to read these release notes for information on running CFE on
1048      older versions of the simulator.
1049
1050* Compiling CFE for use under the functional simulator
1051
1052  Because the functional simulator is significantly slower than real
1053  hardware (on a 900MHz PC it operates at the equivalent of 500Khz)
1054  it is important to define the following symbols before compiling
1055  the firmware (place this in the Makefile, see the comments there):
1056
1057	CFLAGS += -D_FUNCSIM_ -D_FASTEMUL_
1058
1059  You can also build the simulator in the 'sim' target directory
1060  where these symbols are already defined.
1061
1062  These two preprocessor symbols _FUNCSIM_ and _FASTEMUL_ change the
1063  timing loops to be appropriate for the slow processor and eliminate
1064  certain parts of the cache initialization , since the simulated caches
1065  start in an initialized state.  
1066
1067  Don't forget to remove this before running on real hardware!
1068
1069* Running CFE under the functional simulator.
1070
1071  To run the simulator using the new sb1250-run script (part of the
1072  1.9.1 and later toolchains), you can do:
1073
1074	#!/bin/sh
1075	sb1250-run \
1076                --with-boot-flash-file cfe.srec \
1077                --with-boot-flash-type ram \
1078                --no-file \
1079                --with-swarm-devs \
1080		--with-sample-pci-devs \
1081                --with-swarm-ide \
1082                --with-swarm-ide-disk0-file disk0.dsk \
1083                --with-swarm-ide-disk0-size 60 \
1084                --with-memory-config 2x32 \
1085                --with-swarm-rtc-eeprom-file x1240rom.bin 
1086
1087  In this configuration, CFE will have "null" back-ends for the Ethernet
1088  and use standard I/O for the console.  It is a convenient way
1089  to verify that CFE is operational, but it does not provide a good
1090  way to load programs.  See the next section for configuring
1091  network operation.
1092
1093  PCI and LDT configuration are supported under the 1.8.12 and newer
1094  toolchains.
1095
1096* Simulated hardware description:
1097
1098This command and the devices file will configure the simulator as follows:
1099
1100   * 64MB of memory in one DIMM, as two 32MB DIMMs
1101   * Two Serial Presence Detect modules at SMBus Channel 0 address 0x54
1102   * A Xicor X1240 clock/eeprom module on SMBus Channel 1 (device "eeprom0")
1103   * A four-character LED at 0x100A0000
1104   * A 60MB IDE disk at 0x100B0000 (device "ide0")
1105   * 4MB of flash at 0x1FC00000 (device "flash0")
1106   * Two UARTs on the BCM12500 (devices "uart0", "uart1")
1107   * Three Ethernet devices (devices "eth0", "eth1", and "eth2")
1108
1109   * The Xicor's EEPROM contents will be stored in a local file 
1110     called "x1240rom.bin"
1111   * The IDE disk's contents will be stored in the local file "disk0.dsk"
1112   * The flash at 0x1FC00000 will read the file "cfe.srec" when the 
1113     simulator starts.
1114   * The flash at 0x1FC00000 is set to behave like SRAM.  You can use this
1115     area to load other programs into the boot ROM and set breakpoints when 
1116     running under GDB.  If you want the flash to behave like real flash, 
1117     edit sb1250-run command above and change the flash-type to "flash"
1118
1119
1120If successful, you should see the following when you start
1121the simulator:
1122
1123----------------------------------------------------------------------
1124
1125[mpl@swarm test]# ./runcfe
1126Disk 0: 60MB, 122 Cyl 16 Head 63 Sect: File disk1.dsk
1127Loading S-Record file cfe.srec (offset 0x00000000)
1128Finished loading file.
1129sim: cpu model mips:sb-1, word size 64, addr size 64, big endian
1130
1131CFE version 0.0.10 for CSWARM-SIM (32bit,MP,BE)
1132Build Date: Wed Jun 20 07:02:57 PDT 2001 (mpl@swarm.sibyte.com)
1133Copyright (C) 2000,2001 Broadcom Corporation.  All Rights Reserved.
1134
1135Initializing Arena.
1136Initializing Devices.
1137SysCfg: 0000000000480500 [PLL_DIV: 10, IOB0_DIV: CPUCLK/4, IOB1_DIV: CPUCLK/3]
1138Config switch: 0
1139CPU type 0x1040101: 500KHz
1140Total memory: 0x4000000 bytes (64MB)
1141
1142Total memory used by CFE:  0x81E00000 - 0x81F06290 (1073808)
1143Initialized Data:          0x81E00000 - 0x81E04020 (16416)
1144BSS Area:                  0x81E04020 - 0x81E04290 (624)
1145Local Heap:                0x81E04290 - 0x81F04290 (1048576)
1146Stack Area:                0x81F04290 - 0x81F06290 (8192)
1147Text (code) segment:       0x9FC00000 - 0x9FC26720 (157472)
1148Boot area (physical):      0x01F07000 - 0x01F47000
1149Relocation Factor:         I:00000000 - D:00000000
1150
1151CFE> 
1152
1153
1154----------------------------------------------------------------------
1155
1156------------------------------------------------------------------------------
1157NETWORK BOOTSTRAP
1158------------------------------------------------------------------------------
1159
1160CFE includes an Ethernet driver, so you should be able to use
1161the "simether-live" program to access the live network.  The program
1162"simether-live" feeds packets from your real network into the simulated
1163Ethernet devices of the functional simulator.  To use this, you will need
1164to activate the simulator's "backends."  Invoke the simulator with the
1165following command:
1166
1167	#!/bin/sh
1168	sb1250-run \
1169                --with-boot-flash-file cfe.srec \
1170                --with-boot-flash-type ram \
1171                --no-file \
1172                --with-swarm-devs \
1173		--with-sample-pci-devs \
1174                --with-swarm-ide \
1175		--with-sockets-for-io \
1176		--stream-socket-base-addr "0.0.0.0:10100" \
1177		--sim-wait-after-init \
1178                --with-swarm-ide-disk0-file disk0.dsk \
1179                --with-swarm-ide-disk0-size 60 \
1180                --with-memory-config 2x32 \
1181                --with-swarm-rtc-eeprom-file x1240rom.bin 
1182
1183
1184The simulator wll start up as follows:
1185
1186----------------------------------------------------------------------
1187/sb1250sio/backend_a: listening on TCP socket 0.0.0.0:10100
1188/sb1250sio/backend_b: listening on TCP socket 0.0.0.0:10101
1189/sb1250jtag/backend: listening on TCP socket 0.0.0.0:10102
1190/sb1250eth@0x10064000/backend: listening on TCP socket 0.0.0.0:10103
1191/sb1250eth@0x10065000/backend: listening on TCP socket 0.0.0.0:10104
1192/sb1250eth@0x10066000/backend: listening on TCP socket 0.0.0.0:10105
1193Disk 0: 60MB, 122 Cyl 16 Head 63 Sect: File disk0.dsk
1194Loading S-Record file cfe.srec (offset 0x00000000)
1195Finished loading file.
1196sim: cpu model mips:sb-1, word size 64, addr size 64, big endian
1197sb1-elf-run: initialization complete.
1198sb1-elf-run: hit return to run...
1199----------------------------------------------------------------------
1200
1201The messages from the simulator in the form 
1202
1203	/device/backend: listening on TCP socket 0.0.0.0:xxxxx
1204
1205let you know how to connect external programs to the simulator.
1206
1207In this case, the console will be connected to port 10100, since
1208it is the serial port's "backend_a" device.  Start another window
1209and run the "conn" program to connect to the serial port
1210as follows:
1211
1212	$ conn localhost 10100
1213
1214The Ethernets will also be available as TCP sockets.  In this case,
1215MAC 0 (ast SB1250 physical address 10064000) has a socket at
121610103.  To connect to this socket, create another shell window 
1217and "su" to super-user mode.  Run the simether-live
1218program as follows:
1219
1220	# simether-live localhost:10103 eth0
1221
1222(replace 'eth0' with the name of your Ethernet interface).
1223
1224Now, let the simulator begin execution by pressing "return"
1225in the simulator's window.  CFE should start up and display
1226its startup messages in the window you ran "conn" in.
1227
1228If you are running more than one copy of the simulator on 
1229your network, you can set the hardware address for the Ethernet
1230port by typing:
1231
1232	CFE> setenv ETH0_HWADDR 40:00:00:11:22:33
1233
1234(replace 11-22-33 with a unique value for your network).  If you
1235have configured the EEPROM device file, this setting will be
1236persistent across restarts of the simulator.
1237
1238If you configure a DHCP server on your network, you should be
1239able to:
1240
1241	CFE> ifconfig eth0 -auto
1242
1243Or, you can manually configure the network:
1244
1245	CFE> ifconfig eth0 -addr=192.168.168.168 -mask=255.255.255.0 \
1246             -gw=192.168.168.1 -dns=192.168.168.240
1247
1248(the backslash is just for this document - you should type the entire
1249command on one line).
1250
1251Then, you can boot a program from your TFTP server:
1252
1253	CFE> boot -elf myserver:path/filename
1254
1255You'll need the -elf switch if the program you're loading is in
1256ELF format.  Eventually, CFE will do this automatically.
1257
1258
1259------------------------------------------------------------------------------
1260LOADING CFE INTO THE FUNCTIONAL SIMULATOR'S DEBUGGER
1261------------------------------------------------------------------------------
1262
1263The 'debugcfe' script in the sim/ directory will invoke
1264sb1250-run to generate hardware description files, and then
1265run CFE under the debugger and step to the first instruction.
1266
1267------------------------------------------------------------------------------
1268SIMULATOR HACK: LOADING LARGE IMAGES
1269------------------------------------------------------------------------------
1270
1271Loading large programs via TFTP can be painfully slow in the 
1272simulator.  To work around this, the simulator's bsp includes
1273an additional flash device called 'flash2'.  This flash is
1274mapped in the address space normally occupied by the PCMCIA 
1275adapter and is 64MB in size.
1276
1277You can instantiate a flash device in the simulator to live at
1278that same address and pre-load a binary file into it.  CFE
1279can then be used to boot that file using the "raw" file system
1280loader.
1281
1282The files "runcfe" and "runcfe_withnet" in the sim/ directory
1283have been provided for this purpose.  For example, to boot
1284Linux in the simulator using this method, you can do:
1285
1286	./runcfe /path/to/my/vmlinux
1287
1288(this assumes you have "cfe.srec" in your current directory
1289from a recent CFE build, you can modify the shell script
1290if you want it located somewhere else).
1291
1292When CFE starts, you can do:
1293
1294	CFE> boot -elf -rawfs flash2:
1295
1296This will cause CFE to read bytes sequentially from the 
1297flash2 device and parse them as an ELF file.  The additional
1298hardware configuration information in the "flash2.m4" 
1299file (loaded via the "runcfe" script) will cause the file
1300you choose to live at the PCMCIA flash address 0xB1000000).
1301
1302You can also use this same technique to load elf files via
1303the simulated disk, but it is much slower.  To do this, modify
1304the shell script "runcfe" to point the disk container
1305file (it's called "disk0.dsk" in the sample) to your binary.
1306Then you can do:
1307
1308	CFE> boot -elf -rawfs ide0:
1309
1310to read the binary in from the disk.  Flash emulation is 
1311much faster and is the preferred way to load binaries
1312into the simulator quickly.
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326