Searched refs:edid (Results 1 - 25 of 31) sorted by relevance

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/u-boot/drivers/video/sunxi/
H A Dsunxi_lcd.c13 #include <edid.h>
39 const struct display_timing *edid) argument
56 lcdc_pll_set(ccm, 0, edid->pixelclock.typ / 1000,
58 lcdc_tcon0_mode_set(lcdc, edid, clk_div, false,
90 u8 edid[EDID_SIZE];
98 ret = video_bridge_read_edid(cdev, edid, EDID_SIZE);
100 ret = edid_get_timing(edid, ret,
91 u8 edid[EDID_SIZE]; local
H A Dsunxi_dw_hdmi.c12 #include <edid.h>
238 static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid,
243 int div = DIV_ROUND_UP(clock_get_pll3(), edid->pixelclock.typ);
269 lcdc_tcon1_mode_set(lcdc, edid, false, false);
297 const struct display_timing *edid) argument
305 ret = dw_hdmi_enable(&priv->hdmi, edid);
309 sunxi_dw_hdmi_lcdc_init(uc_plat->source_id, edid, panel_bpp);
311 if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
314 if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
239 sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid, int bpp) argument
H A Dsunxi_display.c1094 int hpd, hpd_delay, edid; local
1107 edid = video_get_option_int(options, "edid", 1);
1130 if (hdmi_present && edid) {
1138 if (edid && !hdmi_present) {
1145 if ((hpd || edid) && !hdmi_present) {
/u-boot/common/
H A Dedid.c12 #include <edid.h>
44 int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
52 if (edid_check_info(edid))
55 for (i = 0; i < ARRAY_SIZE(edid->monitor_details.descriptor); i++) {
56 monitor = &edid->monitor_details.descriptor[i];
201 struct edid1_info *edid = (struct edid1_info *)buf;
204 if (buf_size < sizeof(*edid) || edid_check_info(edid)) {
209 if (!EDID1_INFO_VIDEO_INPUT_DIGITAL(*edid)) {
214 if (!EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(*edid)) {
45 edid_get_ranges(struct edid1_info *edid, unsigned int *hmin, unsigned int *hmax, unsigned int *vmin, unsigned int *vmax) argument
202 struct edid1_info *edid = (struct edid1_info *)buf; local
358 edid_get_manufacturer_name(struct edid1_info *edid, char *name) argument
[all...]
H A DMakefile37 obj-$(CONFIG_I2C_EDID) += edid.o
/u-boot/drivers/video/rockchip/
H A Drk3399_hdmi.c10 #include <edid.h>
21 const struct display_timing *edid) argument
32 return dw_hdmi_enable(&priv->hdmi, edid);
H A Drk_vop.c11 #include <edid.h>
43 const struct display_timing *edid,
51 u32 hactive = edid->hactive.typ;
52 u32 vactive = edid->vactive.typ;
58 writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) |
59 V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ),
162 const struct display_timing *edid, argument
171 u32 hactive = edid
42 rkvop_enable(struct udevice *dev, ulong fbbase, int fb_bits_per_pixel, const struct display_timing *edid, struct reset_ctl *dclk_rst) argument
[all...]
H A Drk3288_hdmi.c10 #include <edid.h>
23 const struct display_timing *edid) argument
36 return dw_hdmi_enable(&priv->hdmi, edid);
H A Drk3328_hdmi.c20 const struct display_timing *edid)
24 return dw_hdmi_enable(&priv->hdmi, edid);
19 rk3328_hdmi_enable(struct udevice *dev, int panel_bpp, const struct display_timing *edid) argument
H A Drk_hdmi.c12 #include <edid.h>
H A Drk_lvds.c8 #include <edid.h>
52 const struct display_timing *edid) argument
H A Drk_edp.c11 #include <edid.h>
725 unsigned int val_addr, unsigned int count, u8 edid[]) argument
784 edid[i + cur_data_idx] = (u8)val;
962 const struct display_timing *edid) argument
/u-boot/drivers/video/
H A Ddw_hdmi.c459 const struct display_timing *edid)
466 hbl = edid->hback_porch.typ + edid->hfront_porch.typ +
467 edid->hsync_len.typ;
468 vbl = edid->vback_porch.typ + edid->vfront_porch.typ +
469 edid->vsync_len.typ;
474 inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ?
478 inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ?
486 inv_val |= (edid
457 hdmi_av_composer(struct dw_hdmi *hdmi, const struct display_timing *edid) argument
997 dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) argument
[all...]
H A Dvideomodes.h7 #include <edid.h>
H A Ddisplay-uclass.c10 #include <edid.h>
H A Dsimple_panel.c9 #include <edid.h>
/u-boot/drivers/video/bridge/
H A Danx6345.c9 #include <edid.h>
20 u8 edid[EDID_SIZE];
258 memcpy(buf, priv->edid, size);
340 anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
341 if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) {
21 u8 edid[EDID_SIZE]; member in struct:anx6345_priv
H A Dvideo-bridge-uclass.c11 #include <edid.h>
/u-boot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.h50 unsigned char edid[]);
H A Dexynos_dp.c71 unsigned char edid[EDID_BLOCK_LENGTH * 2];
95 &edid[EDID_HEADER_PATTERN]);
100 sum = exynos_dp_calc_edid_check_sum(edid);
111 &edid[EDID_BLOCK_LENGTH]);
116 sum = exynos_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]);
127 edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
140 &edid[EDID_HEADER_PATTERN]);
146 sum = exynos_dp_calc_edid_check_sum(edid);
156 DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]);
72 unsigned char edid[EDID_BLOCK_LENGTH * 2]; local
/u-boot/cmd/
H A Di2c.c72 #include <edid.h>
1611 * i2c edid {i2c_chip}
1617 struct edid1_info edid;
1632 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
1634 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
1639 if (edid_check_info(&edid)) {
1644 edid_print_info(&edid);
1920 U_BOOT_CMD_MKENT(edid,
1618 struct edid1_info edid; local
[all...]
/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.c9 #include <edid.h>
354 const struct display_timing *edid) argument
359 return dw_hdmi_enable(&priv->hdmi, edid);
/u-boot/arch/x86/include/asm/
H A Dbootparam.h10 #include <asm/video/edid.h>
/u-boot/include/
H A Ddw_hdmi.h12 #include <edid.h>
564 int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid);
/u-boot/drivers/video/tegra124/
H A Ddisplay.c10 #include <edid.h>
13 #include <edid.h>

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