/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn303/ |
H A D | dcn303_hwseq.c | 18 hws->ctx 20 hws->regs->reg 24 hws->shifts->field_name, hws->masks->field_name 27 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 32 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 37 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 42 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) argument
|
H A D | dcn303_hwseq.h | 13 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on); 14 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on); 15 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on); 16 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
|
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn302/ |
H A D | dcn302_hwseq.h | 31 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on); 32 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on); 33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
|
H A D | dcn302_hwseq.c | 36 hws->ctx 38 hws->regs->reg 42 hws->shifts->field_name, hws->masks->field_name 45 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 50 if (hws->ctx->dc->debug.disable_dpp_power_gate) 102 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 107 if (hws->ctx->dc->debug.disable_hubp_power_gate) 159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 165 if (hws [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn301/ |
H A D | dcn301_hwseq.c | 34 hws->ctx 36 hws->regs->reg 40 hws->shifts->field_name, hws->masks->field_name
|
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dce120/ |
H A D | dce120_hw_sequencer.h | 34 bool dce121_xgmi_enabled(struct dce_hwseq *hws);
|
H A D | dce120_hw_sequencer.c | 41 hws->ctx 43 hws->regs->reg 47 hws->shifts->field_name, hws->masks->field_name 194 struct dce_hwseq *hws, 246 * @hws: DCE hardware sequencer object 250 bool dce121_xgmi_enabled(struct dce_hwseq *hws) argument 193 dce120_update_dchub( struct dce_hwseq *hws, struct dchub_init_data *dh_data) argument
|
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn314/ |
H A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on); 38 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable); 44 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context); 46 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);
|
H A D | dcn314_hwseq.c | 61 hws->ctx 63 hws->regs->reg 70 hws->shifts->field_name, hws->masks->field_name 238 struct dce_hwseq *hws, 246 if (hws->ctx->dc->debug.disable_dsc_power_gate) 249 if (hws->ctx->dc->debug.root_clock_optimization.bits.dsc && 250 hws->ctx->dc->res_pool->dccg->funcs->enable_dsc && 252 hws->ctx->dc->res_pool->dccg->funcs->enable_dsc( 253 hws 237 dcn314_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 308 dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) argument 393 dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) argument 422 dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) argument [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn31/ |
H A D | dcn31_hwseq.h | 36 struct dce_hwseq *hws, 41 struct dce_hwseq *hws, 49 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on); 50 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config); 57 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
|
H A D | dcn31_hwseq.c | 57 hws->ctx 59 hws->regs->reg 66 hws->shifts->field_name, hws->masks->field_name 70 struct dce_hwseq *hws = dc->hwseq; local 111 struct dce_hwseq *hws = dc->hwseq; local 121 hws->funcs.bios_golden_init(dc); 122 if (hws->funcs.disable_vga) 123 hws->funcs.disable_vga(dc->hwseq); 179 if (hws 277 dcn31_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 341 dcn31_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 439 dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 478 dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument 570 struct dce_hwseq *hws = dc->hwseq; local 600 dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) argument [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.c | 32 hws->ctx 34 hws->regs->reg 38 hws->shifts->field_name, hws->masks->field_name 40 void dce_enable_fe_clock(struct dce_hwseq *hws, argument 53 struct dce_hwseq *hws = dc->hwseq; local 75 if (hws->masks->BLND_BLND_V_UPDATE_LOCK != 0) 80 if (hws->wa.blnd_crtc_trigger) { 97 void dce_set_blender_mode(struct dce_hwseq *hws, argument 129 if (hws 138 dce_disable_sram_shut_down(struct dce_hwseq *hws) argument 145 dce_underlay_clock_enable(struct dce_hwseq *hws) argument 163 dce_clock_gating_power_up(struct dce_hwseq *hws, bool enable) argument 175 dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, struct clock_source *clk_src, unsigned int tg_inst) argument [all...] |
/openbsd-current/sys/dev/pci/drm/i915/selftests/ |
H A D | igt_spinner.c | 21 spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); 22 if (IS_ERR(spin->hws)) { 23 err = PTR_ERR(spin->hws); 26 i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC); 37 i915_gem_object_put(spin->hws); 90 vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, I915_MAP_WB, &spin->hws_vma); 116 static u64 hws_address(const struct i915_vma *hws, argument 119 return i915_vma_offset(hws) + seqno_offset(rq->fence.context); 129 struct i915_vma *hws, *vma; local 145 hws [all...] |
H A D | igt_spinner.h | 21 struct drm_i915_gem_object *hws; member in struct:igt_spinner
|
/openbsd-current/sys/dev/pci/drm/amd/display/dc/inc/ |
H A D | hw_sequencer_private.h | 110 void (*disable_vga)(struct dce_hwseq *hws); 116 void (*enable_power_gating_plane)(struct dce_hwseq *hws, 119 struct dce_hwseq *hws, 122 void (*dpp_pg_control)(struct dce_hwseq *hws, 125 void (*hubp_pg_control)(struct dce_hwseq *hws, 128 void (*dsc_pg_control)(struct dce_hwseq *hws, 131 bool (*dsc_pg_status)(struct dce_hwseq *hws, 145 void (*dccg_init)(struct dce_hwseq *hws); 154 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable); 163 void (*resync_fifo_dccg_dio)(struct dce_hwseq *hws, struc [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_hwseq.h | 34 struct dce_hwseq *hws, 39 struct dce_hwseq *hws, 42 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on); 78 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context); 105 struct dce_hwseq *hws,
|
H A D | dcn32_hwseq.c | 57 hws->ctx 59 hws->regs->reg 66 hws->shifts->field_name, hws->masks->field_name 69 struct dce_hwseq *hws, 77 if (hws->ctx->dc->debug.disable_dsc_power_gate) 80 if (!hws->ctx->dc->debug.enable_double_buffered_dsc_pg_support) 131 struct dce_hwseq *hws, 160 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 165 if (hws 68 dcn32_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 130 dcn32_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 524 struct dce_hwseq *hws = dc->hwseq; local 709 struct dce_hwseq *hws = dc->hwseq; local 767 struct dce_hwseq *hws = dc->hwseq; local 1198 dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) argument 1234 struct dce_hwseq *hws = link->dc->hwseq; local 1405 dcn32_dsc_pg_status( struct dce_hwseq *hws, unsigned int dsc_inst) argument 1441 struct dce_hwseq *hws = dc->hwseq; local 1501 struct dce_hwseq *hws = dc->hwseq; local 1584 struct dce_hwseq *hws = dc->hwseq; local [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hwseq.h | 91 struct dce_hwseq *hws); 94 struct dce_hwseq *hws, 97 struct dce_hwseq *hws, 101 struct dce_hwseq *hws, 120 struct dce_hwseq *hws, 128 struct dce_hwseq *hws, 134 void dcn20_dccg_init(struct dce_hwseq *hws); 135 int dcn20_init_sys_ctx(struct dce_hwseq *hws,
|
H A D | dcn20_hwseq.c | 62 hws->ctx 64 hws->regs->reg 68 hws->shifts->field_name, hws->masks->field_name 189 struct dce_hwseq *hws, 238 void dcn20_dccg_init(struct dce_hwseq *hws) argument 263 struct dce_hwseq *hws) 290 struct dce_hwseq *hws = dc->hwseq; local 352 hws->funcs.wait_for_blank_complete(opp); 356 struct dce_hwseq *hws, 188 dcn20_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 262 dcn20_disable_vga( struct dce_hwseq *hws) argument 355 dcn20_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 432 dcn20_dpp_pg_control( struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 506 dcn20_hubp_pg_control( struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 585 struct dce_hwseq *hws = dc->hwseq; local 676 struct dce_hwseq *hws = dc->hwseq; local 943 struct dce_hwseq *hws = dc->hwseq; local 1117 dcn20_power_on_plane_resources( struct dce_hwseq *hws, struct pipe_ctx *pipe_ctx) argument 1499 struct dce_hwseq *hws = dc->hwseq; local 1690 struct dce_hwseq *hws = dc->hwseq; local 1793 struct dce_hwseq *hws = dc->hwseq; local 2161 struct dce_hwseq *hws = dc->hwseq; local 2281 struct dce_hwseq *hws = dc->hwseq; local 2296 struct dce_hwseq *hws = dc->hwseq; local 2329 dcn20_init_vm_ctx( struct dce_hwseq *hws, struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid) argument 2351 dcn20_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument 2431 struct dce_hwseq *hws = link->dc->hwseq; local 2562 struct dce_hwseq *hws = dc->hwseq; local 2721 struct dce_hwseq *hws = dc->hwseq; local 2812 struct dce_hwseq *hws = dc->hwseq; local [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn201/ |
H A D | dcn201_hwseq.c | 44 hws->ctx 47 hws->regs->reg 54 hws->shifts->field_name, hws->masks->field_name 135 struct dce_hwseq *hws = dc->hwseq; local 144 plane_address_in_gpu_space_to_uma(hws, &uma); 165 struct dce_hwseq *hws = dc->hwseq; local 196 hws->funcs.wait_for_blank_complete(opp); 199 static void read_mmhub_vm_setup(struct dce_hwseq *hws) argument 209 hws 224 struct dce_hwseq *hws = dc->hwseq; local 374 struct dce_hwseq *hws = dc->hwseq; local 526 struct dce_hwseq *hws = dc->hwseq; local 593 struct dce_hwseq *hws = link->dc->hwseq; local [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn21/ |
H A D | dcn21_hwseq.h | 33 int dcn21_init_sys_ctx(struct dce_hwseq *hws,
|
H A D | dcn21_hwseq.c | 43 hws->ctx 45 hws->regs->reg 49 hws->shifts->field_name, hws->masks->field_name 53 struct dce_hwseq *hws) 67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument 81 mmhub_update_page_table_config(&config, hws); 90 struct dce_hwseq *hws = dc->hwseq; local 52 mmhub_update_page_table_config(struct dcn_hubbub_phys_addr_config *config, struct dce_hwseq *hws) argument
|
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 63 hws->ctx 65 hws->regs->reg 69 hws->shifts->field_name, hws->masks->field_name 129 struct dce_hwseq *hws = dc->hwseq; local 554 struct dce_hwseq *hws, 576 struct dce_hwseq *hws) 611 * @hws: dce_hwseq reference. 618 struct dce_hwseq *hws, 625 if (hws 553 dcn10_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 575 dcn10_disable_vga( struct dce_hwseq *hws) argument 617 dcn10_dpp_pg_control( struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 678 dcn10_hubp_pg_control( struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 730 power_on_plane_resources( struct dce_hwseq *hws, int plane_id) argument 758 struct dce_hwseq *hws = dc->hwseq; local 778 struct dce_hwseq *hws = dc->hwseq; local 808 struct dce_hwseq *hws = dc->hwseq; local 1183 struct dce_hwseq *hws = dc->hwseq; local 1230 struct dce_hwseq *hws = dc->hwseq; local 1260 struct dce_hwseq *hws = dc->hwseq; local 1293 struct dce_hwseq *hws = dc->hwseq; local 1310 struct dce_hwseq *hws = dc->hwseq; local 1483 struct dce_hwseq *hws = dc->hwseq; local 1667 struct dce_hwseq *hws = dc->hwseq; local 1875 struct dce_hwseq *hws = dc->hwseq; local 2363 mmhub_read_vm_system_aperture_settings(struct dcn10_hubp *hubp1, struct vm_system_aperture_param *apt, struct dce_hwseq *hws) argument 2388 mmhub_read_vm_context0_settings(struct dcn10_hubp *hubp1, struct vm_context0_param *vm0, struct dce_hwseq *hws) argument 2433 dcn10_program_pte_vm(struct dce_hwseq *hws, struct hubp *hubp) argument 2451 struct dce_hwseq *hws = dc->hwseq; local 2696 struct dce_hwseq *hws = dc->hwseq; local 2920 struct dce_hwseq *hws = dc->hwseq; local 3050 struct dce_hwseq *hws = dc->hwseq; local 3088 struct dce_hwseq *hws = dc->hwseq; local 3272 struct dce_hwseq *hws = dc->hwseq; local 3347 dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data) argument 3800 struct dce_hwseq *hws = link->dc->hwseq; local [all...] |
H A D | dcn10_hw_sequencer.h | 87 struct dce_hwseq *hws, 91 struct dce_hwseq *hws, 95 struct dce_hwseq *hws, 99 struct dce_hwseq *hws); 112 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
|
/openbsd-current/sys/dev/pci/drm/i915/gt/ |
H A D | selftest_hangcheck.c | 34 struct drm_i915_gem_object *hws; member in struct:hang 55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); 56 if (IS_ERR(h->hws)) { 57 err = PTR_ERR(h->hws); 67 i915_gem_object_set_cache_coherency(h->hws, I915_CACHE_LLC); 68 vaddr = i915_gem_object_pin_map_unlocked(h->hws, I915_MAP_WB); 86 i915_gem_object_unpin_map(h->hws); 90 i915_gem_object_put(h->hws); 96 static u64 hws_address(const struct i915_vma *hws, argument 99 return i915_vma_offset(hws) 110 struct i915_vma *hws, *vma; local [all...] |