/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ks8695/ |
H A D | uncompress.h | 22 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) 30 while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE))
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H A D | system.h | 38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pnx4008/ |
H A D | time.c | 42 __raw_readl(HSTIM_MATCH0) - __raw_readl(HSTIM_COUNTER); 52 if (__raw_readl(HSTIM_INT) & MATCH0_INT) { 64 __raw_writel(__raw_readl(HSTIM_MATCH0) + LATCH, 74 (__raw_readl(HSTIM_MATCH0) - 75 __raw_readl(HSTIM_COUNTER)) < 0); 95 while (__raw_readl(MSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */ 100 while (__raw_readl(HSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */ 122 timclk_ctrl_reg_save = __raw_readl(TIMCLK_CTRL_REG);
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H A D | irq.c | 42 __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ 47 __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */ 52 __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ 60 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 61 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */ 65 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 66 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */ 70 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ 71 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */ 75 __raw_writel(__raw_readl(INTC_AT [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-at91/ |
H A D | uncompress.h | 38 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) 48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
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H A D | io.h | 38 return __raw_readl(addr + reg_offset);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ks8695/ |
H A D | time.c | 50 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); 53 intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1); 54 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); 92 tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
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H A D | cpu.c | 50 id = __raw_readl(KS8695_MISC_VA + KS8695_DID); 51 rev = __raw_readl(KS8695_MISC_VA + KS8695_RID); 61 unsigned int scdc = __raw_readl(KS8695_SYS_VA + KS8695_CLKCON) & CLKCON_SCDC;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ep93xx/ |
H A D | uncompress.h | 19 static unsigned int __raw_readl(unsigned int ptr) function 65 v = __raw_readl(PHYS_ETH_SELF_CTL); 69 while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
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H A D | system.h | 18 devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-s3c2410/ |
H A D | system.h | 37 __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, 42 tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ 47 __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-realview/ |
H A D | system.h | 46 val = __raw_readl(hdr_ctrl);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/plat-s3c24xx/ |
H A D | irq.h | 27 submask = __raw_readl(S3C2410_INTSUBMSK); 28 mask = __raw_readl(S3C2410_INTMSK); 49 submask = __raw_readl(S3C2410_INTSUBMSK); 50 mask = __raw_readl(S3C2410_INTMSK);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/ |
H A D | pm.c | 53 DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); 54 DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); 64 calc += __raw_readl(base+ptr); 80 calc += __raw_readl(base+ptr); 96 tmp = __raw_readl(S3C2410_GSTATUS2);
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H A D | gpio.c | 54 val = __raw_readl(reg); 61 val = __raw_readl(S3C24XX_EXTINT2);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2412/ |
H A D | irq.c | 53 mask = __raw_readl(S3C2410_INTMSK); 56 mask = __raw_readl(S3C2412_EINTMASK); 76 mask = __raw_readl(S3C2410_INTMSK); 79 mask = __raw_readl(S3C2412_EINTMASK); 93 mask = __raw_readl(S3C2412_EINTMASK); 96 mask = __raw_readl(S3C2410_INTMSK);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-versatile/ |
H A D | system.h | 41 val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-s3c24xx/ |
H A D | pm-simtec.c | 58 gstatus4 = (__raw_readl(S3C2410_BANKCON7) & 0x3) << 30; 59 gstatus4 |= (__raw_readl(S3C2410_BANKCON6) & 0x3) << 28; 60 gstatus4 |= (__raw_readl(S3C2410_BANKSIZE) & S3C2410_BANKSIZE_MASK);
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H A D | gpio.c | 73 con = __raw_readl(base + 0x00); 87 unsigned long val = __raw_readl(base); 115 up = __raw_readl(base + 0x08); 134 dat = __raw_readl(base + 0x04); 149 return __raw_readl(base + 0x04) & (1<< offs); 160 misccr = __raw_readl(S3C24XX_MISCCR);
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H A D | time.c | 104 tval = __raw_readl(S3C2410_TCNTO(4)); 109 irqpend = __raw_readl(S3C2410_SRCPND); 116 tval = __raw_readl(S3C2410_TCNTO(4)); 168 tcon = __raw_readl(S3C2410_TCON); 169 tcfg1 = __raw_readl(S3C2410_TCFG1); 170 tcfg0 = __raw_readl(S3C2410_TCFG0);
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H A D | irq.c | 139 mask = __raw_readl(S3C2410_INTMSK); 159 mask = __raw_readl(S3C2410_INTMSK); 177 mask = __raw_readl(S3C2410_INTMSK); 205 mask = __raw_readl(S3C24XX_EINTMASK); 219 mask = __raw_readl(S3C24XX_EINTMASK); 223 req = __raw_readl(S3C24XX_EINTPEND); 244 mask = __raw_readl(S3C24XX_EINTMASK); 288 value = __raw_readl(gpcon_reg); 324 value = __raw_readl(extint_reg); 476 subsrc = __raw_readl(S3C2410_SUBSRCPN [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-iop13xx/ |
H A D | pci.c | 157 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) 163 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) 247 status = __raw_readl(IOP13XX_ATUX_ATUISR); 288 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, 357 status = __raw_readl(IOP13XX_ATUE_ATUISR); 368 status = __raw_readl(IOP13XX_ATUE_PIE_STS) & 369 ~(__raw_readl(IOP13XX_ATUE_PIE_MSK)); 373 __raw_readl(IOP13XX_ATUE_PIE_STS)); 377 __raw_readl(IOP13XX_ATUE_PIE_STS)); 379 __raw_readl(IOP13XX_ATUE_PIE_MS [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/ |
H A D | clock.c | 60 clkcon = __raw_readl(S3C2443_HCLKCON); 77 clkcon = __raw_readl(S3C2443_PCLKCON); 94 clkcon = __raw_readl(S3C2443_SCLKCON); 176 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 202 unsigned long div = __raw_readl(S3C2443_CLKDIV0); 220 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 253 unsigned long clksrc = __raw_readl(S3C2443_CLKSRC); 283 unsigned long div = __raw_readl(S3C2443_CLKDIV1); 295 unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1); 324 unsigned long div = __raw_readl(S3C2443_CLKDIV [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/sound/soc/at91/ |
H A D | at91-pcm.h | 69 #define at91_ssc_read(a) ((unsigned long) __raw_readl(a))
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-clps711x/ |
H A D | uncompress.h | 27 #define __raw_readl(p) (*(unsigned long *)(p)) macro
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