Searched refs:SI_CORE_SIZE (Results 1 - 8 of 8) sorted by relevance
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/ |
H A D | aiutils.c | 132 cpu = REG_MAP(sii->wrapba[3], SI_CORE_SIZE); 134 pcie = REG_MAP(sii->wrapba[5], SI_CORE_SIZE); 136 i2s = REG_MAP(sii->wrapba[8], SI_CORE_SIZE); 235 eromptr = (uint32 *)REG_MAP(erombase, SI_CORE_SIZE); 240 sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE); 342 if ((addrh != 0) || (sizeh != 0) || (sizel != SI_CORE_SIZE)) { 355 if ((asd != 0) && (j == 1) && (sizel == SI_CORE_SIZE)) { 383 if ((sizeh != 0) || (sizel != SI_CORE_SIZE)) { 400 if ((sizeh != 0) || (sizel != SI_CORE_SIZE)) { 447 sii->regs[coreidx] = REG_MAP(addr, SI_CORE_SIZE); [all...] |
H A D | siutils_priv.h | 91 #define GOODCOREADDR(x, b) (((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \ 92 ISALIGNED((x), SI_CORE_SIZE)) 93 #define GOODREGS(regs) ((regs) != NULL && ISALIGNED((uintptr)(regs), SI_CORE_SIZE))
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H A D | sbutils.c | 382 ASSERT(regoff < SI_CORE_SIZE); 394 SI_CORE_SIZE); 492 sii->coresba[next] = sbba + (i * SI_CORE_SIZE); 626 sii->regs[coreidx] = REG_MAP(sbaddr, SI_CORE_SIZE);
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H A D | hndpci.c | 781 resetctrl = (uint32 *)OSL_UNCACHED(SI_WRAP_BASE + (9 * SI_CORE_SIZE) +
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H A D | sbsdram.S | 116 addu a0,SI_CORE_SIZE
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H A D | siutils.c | 115 regs = REG_MAP(SI_ENUM_BASE, SI_CORE_SIZE); 492 cc = (chipcregs_t *)REG_MAP(SI_ENUM_BASE, SI_CORE_SIZE);
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/ |
H A D | hndsoc.h | 46 #define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ macro
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H A D | sbconfig.h | 36 #define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) /* Max cores per bus */
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