Searched refs:mult_div1_reg (Results 1 - 8 of 8) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap2/ |
H A D | clkt2xxx_dpllcore.c | 116 tmpset.cm_clksel1_pll = __raw_readl(dd->mult_div1_reg);
|
H A D | dpll3xxx.c | 285 v = __raw_readl(dd->mult_div1_reg); 299 __raw_writel(v, dd->mult_div1_reg);
|
H A D | clkt_dpll.c | 249 v = __raw_readl(dd->mult_div1_reg);
|
H A D | clock44xx_data.c | 246 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_ABE, 401 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_CORE, 613 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_IVA, 673 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_MPU, 745 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_PER, 860 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, 915 .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
|
H A D | clock3xxx_data.c | 275 .mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL), 347 .mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL), 409 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 567 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2), 590 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2), 916 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL4),
|
H A D | clock2420_data.c | 102 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
|
H A D | clock2430_data.c | 102 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
|
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/ |
H A D | clock.h | 80 void __iomem *mult_div1_reg; member in struct:dpll_data
|
Completed in 111 milliseconds