/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh2/cpu/ |
H A D | dma.h | 15 #define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) macro
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/asm/ |
H A D | dma-register.h | 17 #define SAR 0x00 macro
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/xtensa/include/asm/ |
H A D | system.h | 201 "rsr a13," __stringify(SAR) "\n\t" 207 "wsr a13," __stringify(SAR) "\n\t"
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H A D | regs.h | 33 #define SAR 3 macro
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/ |
H A D | txx9dmac.h | 75 u64 SAR; /* Source Address Register */ member in struct:txx9dmac_cregs 85 u32 SAR; member in struct:txx9dmac_cregs32 210 u64 SAR; member in struct:txx9dmac_hwdesc 216 u32 SAR; member in struct:txx9dmac_hwdesc32
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H A D | txx9dmac.c | 303 " CHAR: %#llx SAR: %#llx DAR: %#llx CNTR: %#x" 306 channel64_readq(dc, SAR), 315 " CHAR: %#x SAR: %#x DAR: %#x CNTR: %#x" 318 channel32_readl(dc, SAR), 332 channel_writeq(dc, SAR, 0); 336 channel_writel(dc, SAR, 0); 449 desc->hwdesc.SAR : desc->hwdesc32.SAR; 518 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); 523 (u64)desc->CHAR, desc->SAR, des [all...] |
H A D | dw_dmac_regs.h | 23 DW_REG(SAR); /* Source Address Register */ 82 #define DWC_CTLL_SRC_INC (0<<7) /* SAR update/not */
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H A D | intel_mid_dma_regs.h | 51 #define SAR 0x00 /* Source Address Register*/ macro
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H A D | dw_dmac.c | 178 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", 179 channel_readl(dwc, SAR), 380 return channel_readl(dwc, SAR); 424 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", 425 channel_readl(dwc, SAR), 1003 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", 1004 channel_readl(dwc, SAR),
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H A D | shdma.c | 142 sh_dmae_writel(sh_chan, hw->sar, SAR); 856 u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
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H A D | intel_mid_dma.c | 258 iowrite32(first->sar, midc->ch_regs + SAR); 264 pr_debug("MDMA:TX SAR %x,DAR %x,CFGL %x,CFGH %x,CTLH %x, CTLL %x\n",
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/ |
H A D | sh_dma.h | 24 u32 sar; /* SAR / source address */ 68 #define SAR 0x00 macro
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/xtensa/kernel/ |
H A D | coprocessor.S | 230 /* Save remaining registers a1-a3 and SAR */ 234 rsr a3, SAR 256 ssl a3 # SAR: 32 - coprocessor_number 324 wsr a0, SAR
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H A D | entry.S | 87 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to 125 /* Save SAR and turn off single stepping */ 128 rsr a3, SAR 206 /* WINDOWBASE still in SAR! */ 208 rsr a2, SAR # original WINDOWBASE 265 /* Save SAR and turn off single stepping */ 268 rsr a3, SAR 449 ssr a2 # preserve user's WB in the SAR 479 rsr a3, SAR 603 /* Restore PC, SAR */ [all...] |
H A D | align.S | 143 /* Keep value of SAR in a0 */ 145 rsr a0, SAR 386 /* restore SAR and return */ 388 wsr a0, SAR 399 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */ 406 wsr a0, SAR
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/drivers/dma/ |
H A D | dma-sh.c | 175 * It's important that we don't accidentally write any value to SAR/DAR 185 * SAR and DAR, regardless of value, in order for cascading to work. 189 __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/common/ |
H A D | pl330.c | 262 SAR = 0, enumerator in enum:dmamov_dst 554 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); 1143 /* DMAMOV SAR, x->src_addr */ 1144 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/char/ |
H A D | synclinkmp.c | 360 #define SAR 0x84 macro
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