Searched refs:ECP (Results 1 - 11 of 11) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/amule/libcryptoxx-5.6.0/ |
H A D | ecp.h | 30 class CRYPTOPP_DLL ECP : public AbstractGroup<ECPPoint> class in inherits:AbstractGroup 37 ECP() {} function in class:ECP 38 ECP(const ECP &ecp, bool convertToMontgomeryRepresentation = false); 39 ECP(const Integer &modulus, const FieldElement &a, const FieldElement &b) function in class:ECP 43 ECP(BufferedTransformation &bt); 82 bool operator==(const ECP &rhs) const 91 CRYPTOPP_DLL_TEMPLATE_CLASS DL_FixedBasePrecomputationImpl<ECP::Point>; 92 CRYPTOPP_DLL_TEMPLATE_CLASS DL_GroupPrecomputation<ECP::Point>; 96 //! ECP precomputatio [all...] |
H A D | ecp.cpp | 16 static inline ECP::Point ToMontgomery(const ModularArithmetic &mr, const ECP::Point &P) 18 return P.identity ? P : ECP::Point(mr.ConvertIn(P.x), mr.ConvertIn(P.y)); 21 static inline ECP::Point FromMontgomery(const ModularArithmetic &mr, const ECP::Point &P) 23 return P.identity ? P : ECP::Point(mr.ConvertOut(P.x), mr.ConvertOut(P.y)); 27 ECP::ECP(const ECP &ecp, bool convertToMontgomeryRepresentation) function in class:ECP 39 ECP function in class:ECP [all...] |
H A D | eccrypto.cpp | 21 ECNR<ECP>::Signer t3; 22 ECNR<ECP>::Verifier t4(t3); 23 ECIES<ECP>::Encryptor t5; 25 ECDH<ECP>::Domain t7; 26 ECMQV<ECP>::Domain t8; 88 template<> struct EcRecommendedParameters<ECP> 92 ECP *NewEC() const 97 return new ECP(Integer(ssP, (size_t)ssP.MaxRetrievable()), ECP::FieldElement(ssA, (size_t)ssA.MaxRetrievable()), ECP [all...] |
H A D | eccrypto.h | 263 CRYPTOPP_DLL_TEMPLATE_CLASS DL_GroupParameters_EC<ECP>; 265 CRYPTOPP_DLL_TEMPLATE_CLASS DL_PublicKeyImpl<DL_GroupParameters_EC<ECP> >; 267 CRYPTOPP_DLL_TEMPLATE_CLASS DL_PublicKey_EC<ECP>; 269 CRYPTOPP_DLL_TEMPLATE_CLASS DL_PrivateKeyImpl<DL_GroupParameters_EC<ECP> >; 271 CRYPTOPP_DLL_TEMPLATE_CLASS DL_PrivateKey_EC<ECP>; 273 CRYPTOPP_DLL_TEMPLATE_CLASS DL_Algorithm_GDSA<ECP::Point>; 275 CRYPTOPP_DLL_TEMPLATE_CLASS DL_PrivateKey_WithSignaturePairwiseConsistencyTest<DL_PrivateKey_EC<ECP>, ECDSA<ECP> >;
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H A D | bench2.cpp | 290 ECIES<ECP>::Decryptor cpriv(rng, ASN1::secp256k1()); 291 ECIES<ECP>::Encryptor cpub(cpriv); 292 ECDSA<ECP, SHA>::Signer spriv(cpriv); 293 ECDSA<ECP, SHA>::Verifier spub(spriv); 294 ECDH<ECP>::Domain ecdhc(ASN1::secp256k1()); 295 ECMQV<ECP>::Domain ecmqvc(ASN1::secp256k1());
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H A D | validat2.cpp | 585 ECIES<ECP>::Decryptor cpriv(GlobalRNG(), ASN1::secp192r1()); 586 ECIES<ECP>::Encryptor cpub(cpriv); 591 ECDSA<ECP, SHA>::Signer spriv(bq); 592 ECDSA<ECP, SHA>::Verifier spub(bq); 593 ECDH<ECP>::Domain ecdhc(ASN1::secp192r1()); 594 ECMQV<ECP>::Domain ecmqvc(ASN1::secp192r1()); 619 while (!(oid = DL_GroupParameters_EC<ECP>::GetNextRecommendedParametersOID(oid)).m_values.empty()) 621 DL_GroupParameters_EC<ECP> params(oid);
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H A D | fipsalgt.cpp | 577 pass = EC_PKV<ECP>(m_rng, DecodeHex(m_data["Qx"]), DecodeHex(m_data["Qy"]), name2oid[m_bracketString]); 586 EC_KeyPair<ECP>(output, atol(m_data["N"].c_str()), name2oid[m_bracketString]); 593 EC_SigGen<ECP>(output, name2oid[m_bracketString]); 600 EC_SigVer<ECP>(output, name2oid[m_bracketString]);
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H A D | fipstest.cpp | 561 SignaturePairwiseConsistencyTest<ECDSA<ECP, SHA1> >(
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/parport/ |
H A D | procfs.c | 220 printmode(ECP);
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H A D | parport_ip32.c | 32 * Hardware SPP (a.k.a. compatibility), EPP, and ECP modes are 34 * SPP/ECP FIFO can be driven in PIO or DMA mode. PIO mode can work with 37 * Hardware ECP mode is not fully implemented (ecp_read_data and 42 * Fully implement ECP mode. 43 * EPP and ECP mode need to be tested. I currently do not own any 55 * This chip supports SPP, bidirectional, EPP and ECP modes. It has a 16 byte 159 * @ecpAFifo: ECP Address FIFO 162 * - ecpDFifo, the ECP Data FIFO 163 * - tFifo, the ECP Test FIFO 203 /* ECP Configuratio [all...] |
H A D | parport_pc.c | 13 * Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999 32 * base+0x400 ECP config A 33 * base+0x401 ECP config B 34 * base+0x402 ECP control 41 * Note that the ECP registers may not start at offset 0x400 for PCI cards, 144 DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n", m); 164 case ECR_ECP: /* ECP Parallel Port mode */ 711 /* Parallel Port FIFO mode (ECP chipsets) */ 785 /* ECP */ 821 /* Set up ECP paralle [all...] |
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