Lines Matching refs:ECP
32 * Hardware SPP (a.k.a. compatibility), EPP, and ECP modes are
34 * SPP/ECP FIFO can be driven in PIO or DMA mode. PIO mode can work with
37 * Hardware ECP mode is not fully implemented (ecp_read_data and
42 * Fully implement ECP mode.
43 * EPP and ECP mode need to be tested. I currently do not own any
55 * This chip supports SPP, bidirectional, EPP and ECP modes. It has a 16 byte
159 * @ecpAFifo: ECP Address FIFO
162 * - ecpDFifo, the ECP Data FIFO
163 * - tFifo, the ECP Test FIFO
203 /* ECP Configuration Register A */
214 /* ECP Configuration Register B */
323 * @show_ecp_config: shall we dump ECP configuration registers too?
340 "ECP", "EPP", "???",
835 * parport_ip32_set_mode - change mode of ECP port
1231 /*--- ECP mode functions (FIFO) ----------------------------------------*/
1553 * tested in ECP mode). Switching directly to Test mode (as
1555 * ECP service interrupts are no more working after that. A
1578 /* Host recovery for ECP mode */
1677 * parport_ip32_ecp_write_data - write a block of data in ECP mode
1795 * parport_ip32_ecp_supported - check for an ECP port
1798 * Returns 1 if an ECP port is found, and 0 otherwise. This function actually
1979 * @base_hi: base address of ECP registers
1984 * addresses of the ECP registers are computed from address @base_hi.
2114 /* Enable ECP FIFO mode */
2119 pr_probe(p, "Hardware support for ECP mode enabled\n");
2144 printmode(ECP);
2222 ", bit 4: hardware ECP mode");