/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 363 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; 364 IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) { 365 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT);
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H A D | TargetLowering.h | 2035 virtual bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT, argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 616 for (MVT IntVT : {MVT::i32, MVT::i64}) { 618 setOperationAction(ISD::UREM, IntVT, Expand); 619 setOperationAction(ISD::SREM, IntVT, Expand); 620 setOperationAction(ISD::SDIVREM, IntVT, Expand); 621 setOperationAction(ISD::UDIVREM, IntVT, Expand); 623 setOperationAction(ISD::CTTZ, IntVT, Expand); 624 setOperationAction(ISD::ROTL, IntVT, Expand); 625 setOperationAction(ISD::ROTR, IntVT, Expand); 628 setOperationAction(ISD::BSWAP, IntVT, Legal); 629 setOperationAction(ISD::CTLZ, IntVT, Lega [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 438 EVT IntVT = ValueVTs[0]; local 440 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1) 442 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT); 443 unsigned BitWidth = IntVT.getSizeInBits();
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H A D | FastISel.cpp | 439 EVT IntVT = TLI.getPointerTy(DL); local 440 uint32_t IntBitWidth = IntVT.getSizeInBits(); 448 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg, 1782 EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); 1783 if (!TLI.isTypeLegal(IntVT)) 1786 Register IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), 1792 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, 1793 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); 1797 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST,
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H A D | TargetLowering.cpp | 6281 EVT IntVT = SrcVT.changeTypeToInteger(); 6282 EVT IntShVT = getShiftAmountTy(IntVT, DAG.getDataLayout()); 6284 SDValue ExponentMask = DAG.getConstant(0x7F800000, dl, IntVT); 6285 SDValue ExponentLoBit = DAG.getConstant(23, dl, IntVT); 6286 SDValue Bias = DAG.getConstant(127, dl, IntVT); 6287 SDValue SignMask = DAG.getConstant(APInt::getSignMask(SrcEltBits), dl, IntVT); 6288 SDValue SignLowBit = DAG.getConstant(SrcEltBits - 1, dl, IntVT); 6289 SDValue MantissaMask = DAG.getConstant(0x007FFFFF, dl, IntVT); 6291 SDValue Bits = DAG.getNode(ISD::BITCAST, dl, IntVT, Src); 6294 ISD::SRL, dl, IntVT, DA [all...] |
H A D | LegalizeDAG.cpp | 1520 EVT IntVT = SignAsInt.IntValue.getValueType(); 1521 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); 1522 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, 1531 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, 1532 DAG.getConstant(0, DL, IntVT), ISD::SETNE); 1546 EVT ShiftVT = IntVT; 1581 EVT IntVT = ValueAsInt.IntValue.getValueType(); 1582 SDValue ClearSignMask = DAG.getConstant(~ValueAsInt.SignMask, DL, IntVT); 1583 SDValue ClearedSign = DAG.getNode(ISD::AND, DL, IntVT, ValueAsInt.IntValue,
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H A D | DAGCombiner.cpp | 11888 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), SrcEltVT.getSizeInBits()); local 11889 BV = ConstantFoldBITCASTofBUILD_VECTOR(BV, IntVT).getNode(); 11890 SrcEltVT = IntVT; 13904 EVT IntVT = Int.getValueType(); local 13905 if (IntVT.isInteger() && !IntVT.isVector()) { 13911 SignMask = APInt::getSplat(IntVT.getSizeInBits(), SignMask); 13914 SignMask = APInt::getSignMask(IntVT.getSizeInBits()); 13917 Int = DAG.getNode(ISD::XOR, DL0, IntVT, Int, 13918 DAG.getConstant(SignMask, DL0, IntVT)); 14001 EVT IntVT = Int.getValueType(); local [all...] |
H A D | LegalizeFloatTypes.cpp | 909 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; 910 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; 911 ++IntVT) { 912 NVT = (MVT::SimpleValueType)IntVT;
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H A D | SelectionDAG.cpp | 5877 EVT IntVT = VT.getScalarType(); 5878 if (!IntVT.isInteger()) 5879 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits()); 5881 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value); 5886 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value, 5887 DAG.getConstant(Magic, dl, IntVT));
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H A D | SelectionDAGBuilder.cpp | 265 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); local 266 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, CC);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1595 EVT IntVT = MemVT.changeTypeToInteger(); local 1607 SDValue ArgVal = DAG.getNode(ISD::TRUNCATE, SL, IntVT, Extract); 4536 EVT IntVT = LoadVT.changeTypeToInteger(); local 4552 return getMemIntrinsicNode(Opc, DL, M->getVTList(), Ops, IntVT, 5287 MVT IntVT = MVT::getIntegerVT(VecSize); 5294 SDValue ExtVal = DAG.getNode(ISD::BITCAST, SL, IntVT, 5303 SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec); 5304 SDValue BFM = DAG.getNode(ISD::SHL, SL, IntVT, 5305 DAG.getConstant(0xffff, SL, IntVT), 5308 SDValue LHS = DAG.getNode(ISD::AND, SL, IntVT, BF 6750 EVT IntVT = VT.changeTypeToInteger(); local 7677 EVT IntVT = LoadVT.changeTypeToInteger(); local 7783 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); local [all...] |
H A D | AMDGPUISelLowering.cpp | 1643 MVT IntVT = MVT::i32; local 1663 SDValue jq = DAG.getConstant(1, DL, IntVT); 1710 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 618 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits().getFixedSize()); local 619 if (IntVT.isValid()) { 621 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3508 MVT IntVT = is64Bit() ? MVT::i64 : MVT::i32; 3509 RegParmTypes.push_back(IntVT); 19286 MVT IntVT = CastToInt.getSimpleValueType(); 19295 IntVT != MVT::i32) 19299 unsigned IntSize = IntVT.getSizeInBits(); 19302 MVT VecIntVT = MVT::getVectorVT(IntVT, 128 / IntSize); 21461 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); 21462 if (!DAG.getTargetLoweringInfo().isTypeLegal(IntVT)) 21465 DAG.getBitcast(IntVT, MaskBits(V)), 21466 DAG.getConstant(0, DL, IntVT)); [all...] |
H A D | X86ISelDAGToDAG.cpp | 1065 EVT IntVT = EVT(VecVT).changeVectorElementTypeToInteger(); local 1066 Op0 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op0); 1067 Op1 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op1); 1076 Res = CurDAG->getNode(Opc, dl, IntVT, Op0, Op1);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 5206 MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits()); 5207 MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements()); 5210 DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2); 5233 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits()); 5234 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); 5235 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntVT,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 10647 EVT IntVT = BV->getValueType(0); local 10652 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst); 10653 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 7841 EVT IntVT = Op.getValueType(); local 7848 SDVTList VTs = DAG.getVTList(IntVT);
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