| /freebsd-12-stable/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | RandomIRBuilder.cpp | 56 auto *NewLoad = new LoadInst( local
60 if (Pred.matches(Srcs, NewLoad))
61 RS.sample(NewLoad, RS.totalWeight());
63 NewLoad->eraseFromParent();
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | VNCoercion.cpp | 432 LoadInst *NewLoad = Builder.CreateLoad(DestTy, PtrVal); local
433 NewLoad->takeName(SrcVal);
434 NewLoad->setAlignment(MaybeAlign(SrcVal->getAlignment()));
437 LLVM_DEBUG(dbgs() << "TO: " << *NewLoad << "\n");
441 Value *RV = NewLoad;
447 SrcVal = NewLoad;
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineLoadStoreAlloca.cpp | 472 LoadInst *NewLoad = Builder.CreateAlignedLoad( local
474 NewLoad->setAtomic(LI.getOrdering(), LI.getSyncScopeID());
475 copyMetadataForLoad(*NewLoad, LI);
476 return NewLoad;
610 LoadInst *NewLoad = IC.combineLoadToNewType( local
616 combineStoreToNewValue(IC, *SI, NewLoad);
633 LoadInst *NewLoad = IC.combineLoadToNewType(LI, CI->getDestTy()); local
634 CI->replaceAllUsesWith(NewLoad);
661 LoadInst *NewLoad = IC.combineLoadToNewType(LI, ST->getTypeAtIndex(0U), local
665 NewLoad
711 LoadInst *NewLoad = IC.combineLoadToNewType(LI, ET, ".unpack"); local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 1246 auto *NewLoad = new LoadInst( local
1250 NewLoad->setDebugLoc(LI->getDebugLoc());
1256 NewLoad->setAAMetadata(Tags);
1259 NewLoad->setMetadata(LLVMContext::MD_invariant_load, MD);
1261 NewLoad->setMetadata(LLVMContext::MD_invariant_group, InvGroupMD);
1263 NewLoad->setMetadata(LLVMContext::MD_range, RangeMD);
1273 NewLoad));
1275 LLVM_DEBUG(dbgs() << "GVN INSERTED " << *NewLoad << '\n');
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 397 MachineInstr *NewLoad = local
408 getBaseOperand(NewLoad).setIsKill(false);
409 LLVM_DEBUG(NewLoad->dump());
|
| H A D | X86InterleavedAccess.cpp | 218 Instruction *NewLoad = local
220 DecomposedVectors.push_back(NewLoad);
|
| H A D | X86ISelLowering.cpp | [all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LegalizerInfo.cpp | 716 auto NewLoad = MIRBuilder.buildLoad(NewReg, MI.getOperand(1).getReg(), MMO); local
717 MIRBuilder.buildBitcast({ValReg}, {NewLoad});
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1341 SDValue NewLoad;
1344 NewLoad =
1347 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr,
1352 DAG.ReplaceAllUsesOfValueWith(Ch, SDValue(NewLoad.getNode(), 1));
1356 SmallVector<SDValue, 6> NewLoadOperands(NewLoad->op_begin(),
1357 NewLoad->op_end());
1359 NewLoad =
1360 SDValue(DAG.UpdateNodeOperands(NewLoad.getNode(), NewLoadOperands), 0);
1361 return NewLoad;
|
| H A D | DAGCombiner.cpp | 5034 SDValue NewLoad = ReduceLoadWidth(And.getNode()); local
5035 assert(NewLoad &&
5037 CombineTo(Load, NewLoad, NewLoad.getValue(1));
5321 SDValue NewLoad(Load, 0);
5323 // Fold the AND away. NewLoad may get replaced immediately.
5324 CombineTo(N, (N0.getNode() == Load) ? NewLoad : N0);
5327 NewLoad = DAG.getLoad(Load->getAddressingMode(), ISD::ZEXTLOAD,
5335 SDValue To[] = { NewLoad.getValue(0), NewLoad
9565 SDValue NewLoad = DAG.getMaskedLoad( local
10907 SDValue NewLoad = DAG.getExtLoad(LN0->getExtensionType(), SDLoc(LN0), local
14366 SDValue NewLoad = DAG.getExtLoad( local
16230 SDValue NewLoad, NewStore; local
[all...] |
| H A D | TargetLowering.cpp | 3349 SDValue NewLoad = DAG.getLoad( local
3353 DAG.getNode(ISD::AND, dl, newVT, NewLoad,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 2247 Instruction *NewLoad;
2263 NewLoad =
2268 NewLoad = Builder.CreateAlignedLoad(VecTy, AddrParts[Part],
2270 Group->addMetadata(NewLoad);
2271 NewLoads.push_back(NewLoad);
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1505 SDValue NewLoad = DAG.getExtLoad( local
1508 SDValue Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, NewLoad,
|
| H A D | AMDGPUISelLowering.cpp | 2917 SDValue NewLoad local
2921 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad);
2922 DCI.CombineTo(N, BC, NewLoad.getValue(1));
|
| H A D | SIISelLowering.cpp | 7301 SDValue NewLoad = DAG.getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, local
7317 SDValue Cvt = NewLoad;
7319 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad,
7323 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT);
7341 return DAG.getMergeValues({ Cvt, NewLoad.getValue(1) }, SL);
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3274 SDValue NewLoad = DAG.getLoad(ResVT, DL, LoadN->getChain(), local
3277 DAG.ReplaceAllUsesOfValueWith(SDValue(LoadN, 1), NewLoad.getValue(1));
3278 return NewLoad;
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9153 SDValue NewLoad = DAG.getMaskedLoad( local
9157 SDValue Combo = NewLoad;
9161 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru);
9162 return DAG.getMergeValues({Combo, NewLoad.getValue(1)}, dl);
14130 if (SDValue NewLoad = PerformSplittingToWideningLoad(N, DAG))
14131 return NewLoad;
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 10421 SDValue NewLoad[2]; local
10430 NewLoad[i] = DAG.getMemIntrinsicNode(
10435 DAG.getNode(Op0.getOpcode(), SDLoc(Op0), MVT::v4f32, NewLoad[0],
10436 NewLoad[1], Op0.getNode()->getFlags());
|