Searched refs:Registers (Results 1 - 9 of 9) sorted by relevance
/freebsd-11.0-release/contrib/llvm/utils/TableGen/ |
H A D | AsmWriterEmitter.cpp | 524 const std::deque<CodeGenRegister> &Registers) { 526 SmallVector<std::string, 4> AsmNames(Registers.size()); 528 for (const auto &Reg : Registers) { 568 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 580 const auto &Registers = Target.getRegBank().getRegisters(); local 584 Registers.front().TheDef->getValueAsString("Namespace"); 595 O << " assert(RegNo && RegNo < " << (Registers.size()+1) 601 emitRegisterNameString(O, R->getName(), Registers); 603 emitRegisterNameString(O, "", Registers); 523 emitRegisterNameString(raw_ostream &O, StringRef AltName, const std::deque<CodeGenRegister> &Registers) argument
|
H A D | CodeGenRegisters.cpp | 959 for (auto &Reg : Registers) 963 for (auto &Reg : Registers) 973 for (auto &Reg : Registers) 977 for (auto &Reg : Registers) 983 for (auto &Reg : Registers) 1032 Registers.emplace_back(Def, Registers.size() + 1); 1033 Reg = &Registers.back(); 1122 for (const auto &Reg1 : Registers) { 1314 const auto &Registers local [all...] |
H A D | RegisterInfoEmitter.cpp | 73 const auto &Registers = Bank.getRegisters(); local 76 assert(Registers.size() <= 0xffff && "Too many regs to fit in tables"); 79 Registers.front().TheDef->getValueAsString("Namespace"); 96 for (const auto &Reg : Registers) 98 assert(Registers.size() == Registers.back().EnumValue && 100 OS << " NUM_TARGET_REGS \t// " << Registers.size()+1 << "\n";
|
H A D | CodeGenRegisters.h | 190 // less than RegBank.getNumTopoSigs(). Registers with the same TopoSig have 490 // Registers. 491 std::deque<CodeGenRegister> Registers; member in class:llvm::CodeGenRegBank 592 const std::deque<CodeGenRegister> &getRegisters() { return Registers; } 600 // Get a Register's index into the Registers array.
|
H A D | AsmMatcherEmitter.cpp | 198 RegisterSet Registers; member in struct:__anon4566::ClassInfo 220 // Registers classes are only related to registers classes, and only if 228 std::set_intersection(Registers.begin(), Registers.end(), 229 RHS.Registers.begin(), RHS.Registers.end(), 1145 const auto &Registers = Target.getRegBank().getRegisters(); local 1167 for (const CodeGenRegister &CGR : Registers) { 1206 CI->Registers = RS; 1473 assert(Op.Class && Op.Class->Registers [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2847 static const MCPhysReg Registers[6][8] = { local 2869 SrcReg = Registers[0][GPRIdx++]; 2873 SrcReg = Registers[1][GPRIdx++]; 2876 SrcReg = Registers[2][FPRIdx++]; 2879 SrcReg = Registers[3][FPRIdx++]; 2882 SrcReg = Registers[4][FPRIdx++]; 2885 SrcReg = Registers[5][FPRIdx++];
|
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 425 SmallVector<unsigned, 8> Registers; member in class:__anon2788::ARMOperand 606 return Registers; 2624 Op->Registers.push_back(I->second); 3346 SmallVector<std::pair<unsigned, unsigned>, 16> Registers; local 3352 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3367 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3398 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3435 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3438 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3448 Operands.push_back(ARMOperand::CreateRegList(Registers, [all...] |
/freebsd-11.0-release/crypto/openssl/crypto/bn/asm/ |
H A D | pa-risc2.s | 918 ; Registers to hold 64-bit values to manipulate. The "L" part
|
H A D | pa-risc2W.s | 905 ; Registers to hold 64-bit values to manipulate. The "L" part
|
Completed in 271 milliseconds