/freebsd-11.0-release/sys/arm/freescale/imx/ |
H A D | imx_gpt.c | 60 #define READ4(_sc, _r) \ macro 63 WRITE4((_sc), (_r), READ4((_sc), (_r)) | (_m)) 65 WRITE4((_sc), (_r), READ4((_sc), (_r)) & ~(_m)) 211 while (READ4(sc, IMX_GPT_CR) & GPT_CR_SWR) 233 sc->clkfreq / 1000, basefreq, READ4(sc, IMX_GPT_CR), READ4(sc, IMX_GPT_PR)); 279 WRITE4(sc, IMX_GPT_OCR2, READ4(sc, IMX_GPT_CNT) + sc->sc_period); 288 WRITE4(sc, IMX_GPT_OCR3, READ4(sc, IMX_GPT_CNT) + ticks); 329 status = READ4(sc, IMX_GPT_SR); 351 WRITE4(sc, IMX_GPT_OCR2, READ4(s [all...] |
H A D | imx6_sdma.c | 66 #define READ4(_sc, _reg) \ macro 92 pending = READ4(sc, SDMAARM_INTR); 214 reg = READ4(sc, SDMAARM_EVTOVR); 222 reg = READ4(sc, SDMAARM_HOSTOVR); 230 reg = READ4(sc, SDMAARM_DSPOVR); 333 while (!(ret = READ4(sc, SDMAARM_INTR) & 1)) { 443 while (!(ret = READ4(sc, SDMAARM_INTR) & 1)) {
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H A D | imx_gpio.c | 69 #define READ4(_sc, _r) \ macro 72 WRITE4((_sc), (_r), READ4((_sc), (_r)) | (_m)) 74 WRITE4((_sc), (_r), READ4((_sc), (_r)) & ~(_m)) 369 wrk = READ4(sc, reg); 459 interrupts = READ4(sc, IMX_GPIO_ISR_REG) & READ4(sc, IMX_GPIO_IMR_REG); 648 *val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1; 665 (READ4(sc, IMX_GPIO_DR_REG) ^ (1U << pin))); 728 (READ4(sc, IMX_GPIO_OE_REG) & (1U << i)) ? GPIO_PIN_OUTPUT :
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/freebsd-11.0-release/sys/arm/samsung/exynos/ |
H A D | exynos5_spi.c | 132 reg = READ4(sc, CH_CFG); 153 reg = READ4(sc, CH_CFG); 160 reg = READ4(sc, CS_REG); 169 while (READ4(sc, SPI_STATUS) & \ 176 while ((READ4(sc, SPI_STATUS) & \ 184 reg = READ4(sc, CS_REG);
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H A D | exynos5_common.h | 29 #define READ4(_sc, _reg) \ macro
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H A D | exynos5_xhci.c | 159 rev = READ4(esc, GSNPSID); 172 reg = READ4(esc, GUSB3PIPECTL(0)); 176 reg = READ4(esc, GUSB2PHYCFG(0)); 180 reg = READ4(esc, GCTL); 184 hwparams1 = READ4(esc, GHWPARAMS1); 186 reg = READ4(esc, GCTL); 199 reg = READ4(esc, GCTL);
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H A D | exynos5_usb_phy.c | 182 reg = READ4(sc, USB_DRD_PHYPARAM0); 194 reg = READ4(sc, USB_DRD_PHYPARAM1); 199 reg = READ4(sc, USB_DRD_PHYUTMICLKSEL); 203 reg = READ4(sc, USB_DRD_PHYTEST);
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/freebsd-11.0-release/sys/arm/altera/socfpga/ |
H A D | socfpga_manager.c | 168 reg = READ4(sc, FPGAMGR_STAT); 206 msel = READ4(sc, FPGAMGR_STAT); 222 reg = READ4(sc, FPGAMGR_CTRL); 231 reg = READ4(sc, FPGAMGR_CTRL); 236 reg = READ4(sc, FPGAMGR_CTRL); 247 reg = READ4(sc, FPGAMGR_CTRL); 260 reg = READ4(sc, FPGAMGR_CTRL); 273 if (READ4(sc, FPGAMGR_DCLKSTAT) != 0) 282 if (READ4(sc, FPGAMGR_DCLKSTAT) == 1) { 305 reg = READ4(s [all...] |
H A D | socfpga_common.h | 33 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) macro
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H A D | socfpga_gpio.c | 69 #define READ4(_sc, _reg) \ macro 178 version = READ4(sc, GPIO_VER_ID_CODE); 187 cfg2 = READ4(sc, GPIO_CONFIG_REG2); 196 (READ4(sc, GPIO_SWPORTA_DDR) & (1 << i)) ? 315 *val = (READ4(sc, GPIO_EXT_PORTA) & (1 << i)) ? 1 : 0; 338 reg = READ4(sc, GPIO_SWPORTA_DR); 362 reg = READ4(sc, GPIO_SWPORTA_DDR); 417 reg = READ4(sc, GPIO_SWPORTA_DR);
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/freebsd-11.0-release/sys/arm/freescale/vybrid/ |
H A D | vf_anadig.c | 136 reg = READ4(sc, pll_ctrl); 145 while (!(READ4(sc, pll_ctrl) & ANADIG_PLL_LOCKED)) 148 reg = READ4(sc, pll_ctrl); 167 reg = READ4(sc, ANADIG_PLL4_CTRL); 208 reg = READ4(sc, ANADIG_REG_3P0); 213 reg = READ4(sc, USB_MISC(0)); 217 reg = READ4(sc, USB_MISC(1)); 223 READ4(sc, USB_ANALOG_USB_MISC(0))); 225 READ4(sc, USB_ANALOG_USB_MISC(1)));
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H A D | vf_spi.c | 164 reg = READ4(sc, SPI_MCR); 172 reg = READ4(sc, SPI_RSER); 176 reg = READ4(sc, SPI_MCR); 180 reg = READ4(sc, SPI_CTAR0); 198 reg = READ4(sc, SPI_CTAR0); 232 while((READ4(sc, SPI_SR) & SR_EOQF) == 0) 235 reg = READ4(sc, SPI_SR); 241 while((READ4(sc, SPI_SR) & SR_RFDF) == 0)
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H A D | vf_adc.c | 162 return (READ4(sc, ADC_R0)); 175 reg = READ4(sc, ADC_HC0); 212 reg = READ4(sc, ADC_CFG); 218 reg = READ4(sc, ADC_GC); 223 reg = READ4(sc, ADC_HC0);
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H A D | vf_common.h | 29 #define READ4(_sc, _reg) \ macro
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H A D | vf_nfc.c | 203 reg = READ4(sc, NFC_CFG); 241 reg = READ4(sc, NFC_CMD2); 250 reg = READ4(sc, NFC_CMD1); 264 reg = READ4(sc, NFC_CMD2); 270 reg = READ4(sc, NFC_CMD2); 277 reg = READ4(sc, NFC_CAR); 285 reg = READ4(sc, NFC_RAR); 294 reg = READ4(sc, NFC_CMD2); 299 while (READ4(sc, NFC_CMD2) & (1 << CMD2_START_SHIFT)) 413 sr1 = READ4(s [all...] |
H A D | vf_edma.c | 102 interrupts = READ4(sc, DMA_INT); 125 reg = READ4(sc, DMA_ERR); 129 reg, READ4(sc, DMA_ES)); 198 reg = READ4(sc, DMA_ERQ); 245 reg = READ4(sc, DMA_ERQ); 250 reg = READ4(sc, DMA_EEI);
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H A D | vf_sai.c | 358 reg = READ4(sc, I2S_TCR2); 612 READ4(sc, I2S_TCSR)); 624 reg = READ4(sc, I2S_TCSR); 628 reg = READ4(sc, I2S_TCR3); 635 reg = READ4(sc, I2S_TCR2); 643 reg = READ4(sc, I2S_TCR3); 648 reg = READ4(sc, I2S_TCR4); 656 reg = READ4(sc, I2S_TCR5); 666 reg = READ4(sc, I2S_TCSR);
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H A D | vf_ccm.c | 378 reg = READ4(sc, clk->sel_reg); 384 reg = READ4(sc, clk->reg); 461 reg = READ4(sc, CCM_CCR); 467 if (READ4(sc, CCM_CSR) & FXOSC_RDY) {
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/freebsd-11.0-release/sys/dev/dwc/ |
H A D | if_dwc.c | 82 #define READ4(_sc, _reg) \ macro 311 reg = READ4(sc, OPERATION_MODE); 316 reg = READ4(sc, OPERATION_MODE); 321 reg = READ4(sc, MAC_CONFIGURATION); 326 reg = READ4(sc, OPERATION_MODE); 335 reg = READ4(sc, MMC_CONTROL); 352 if_inc_counter(ifp, IFCOUNTER_IPACKETS, READ4(sc, RXFRAMECOUNT_GB)); 353 if_inc_counter(ifp, IFCOUNTER_IMCASTS, READ4(sc, RXMULTICASTFRAMES_G)); 355 READ4(sc, RXOVERSIZE_G) + READ4(s [all...] |
/freebsd-11.0-release/sys/dev/mmc/host/ |
H A D | dwmmc.c | 69 #define READ4(_sc, _reg) \ macro 185 reg = READ4(sc, SDMMC_CTRL); 191 if (!(READ4(sc, SDMMC_CTRL) & reset_bits)) 294 cmd->resp[3] = READ4(sc, SDMMC_RESP0); 295 cmd->resp[2] = READ4(sc, SDMMC_RESP1); 296 cmd->resp[1] = READ4(sc, SDMMC_RESP2); 297 cmd->resp[0] = READ4(sc, SDMMC_RESP3); 302 cmd->resp[0] = READ4(sc, SDMMC_RESP0); 347 reg = READ4(sc, SDMMC_MINTSTS); 400 reg = READ4(s [all...] |
/freebsd-11.0-release/sys/dev/xilinx/ |
H A D | axi_quad_spi.c | 67 #define READ4(_sc, _reg) \ macro 168 while(!(READ4(sc, SPI_SR) & SR_TX_EMPTY)) 171 data = READ4(sc, SPI_DRR); 197 reg = READ4(sc, SPI_SSR); 208 reg = READ4(sc, SPI_SSR);
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/freebsd-11.0-release/sys/dev/beri/virtio/ |
H A D | virtio.h | 35 #define READ4(_sc, _reg) \ macro
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/freebsd-11.0-release/sys/dev/altera/pio/ |
H A D | pio.c | 60 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) macro 117 return (READ4(sc, PIO_DATA));
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/freebsd-11.0-release/sys/dev/hatm/ |
H A D | if_hatmvar.h | 472 #define READ4(SC,OFF) bus_space_read_4(SC->memt, SC->memh, (OFF)) macro 487 #define READ_SUNI(SC,OFF) READ4(SC, HE_REGO_SUNI + 4 * (OFF)) 495 while((READ4(SC, HE_REGO_LB_MEM_ACCESS) & HE_REGM_LB_MEM_HNDSHK))\ 497 READ4(SC, HE_REGO_LB_MEM_DATA); \ 505 while((READ4(SC, HE_REGO_LB_MEM_ACCESS) & HE_REGM_LB_MEM_HNDSHK))\ 514 while((READ4(SC, HE_REGO_CON_CTL) & HE_REGM_CON_STATUS) != 0) \ 522 while((READ4(SC, HE_REGO_CON_CTL) & HE_REGM_CON_STATUS) != 0) \ 524 READ4(SC, HE_REGO_CON_DAT); \
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/freebsd-11.0-release/sys/mips/mediatek/ |
H A D | mtk_intr_v1.c | 104 #define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) macro 234 intr = READ4(sc, MTK_IRQ1STAT); 251 intr = READ4(sc, MTK_IRQ0STAT);
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