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Searched refs:K_INT_GPIO_0 (Results 1 - 9 of 9) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/sibyte/
H A D	bigsur.h	`38 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 45 #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)`
H A D	swarm.h	`54 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 61 #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)`
H A D	carmel.h	`54 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)`
H A D	sb1250_int.h	`84 #define K_INT_GPIO_0 32 macro 158 #define M_INT_GPIO_0 _SB_MAKEMASK1(K_INT_GPIO_0)`
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/sibyte/
H A D	bigsur.h	`38 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 45 #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)`
H A D	swarm.h	`54 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 61 #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)`
H A D	carmel.h	`54 #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)`
H A D	sb1250_int.h	`84 #define K_INT_GPIO_0 32 macro 158 #define M_INT_GPIO_0 _SB_MAKEMASK1(K_INT_GPIO_0)`
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/
H A D	sb1250_int.h	`100 #define K_INT_GPIO_0 32 macro 173 #define M_INT_GPIO_0 _SB_MAKEMASK1(K_INT_GPIO_0)`

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