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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/sibyte/
1/*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
17 */
18#ifndef __ASM_SIBYTE_SWARM_H
19#define __ASM_SIBYTE_SWARM_H
20
21#include <asm/sibyte/sb1250.h>
22#include <asm/sibyte/sb1250_int.h>
23
24#ifdef CONFIG_SIBYTE_SWARM
25#define SIBYTE_BOARD_NAME "BCM91250A (SWARM)"
26#define SIBYTE_HAVE_PCMCIA 1
27#define SIBYTE_HAVE_IDE    1
28#endif
29#ifdef CONFIG_SIBYTE_LITTLESUR
30#define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)"
31#define SIBYTE_HAVE_PCMCIA 0
32#define SIBYTE_HAVE_IDE    1
33#define SIBYTE_DEFAULT_CONSOLE "cfe0"
34#endif
35#ifdef CONFIG_SIBYTE_CRHONE
36#define SIBYTE_BOARD_NAME "BCM91125C (CRhone)"
37#define SIBYTE_HAVE_PCMCIA 0
38#define SIBYTE_HAVE_IDE    0
39#endif
40#ifdef CONFIG_SIBYTE_CRHINE
41#define SIBYTE_BOARD_NAME "BCM91120C (CRhine)"
42#define SIBYTE_HAVE_PCMCIA 0
43#define SIBYTE_HAVE_IDE    0
44#endif
45
46/* Generic bus chip selects */
47#define LEDS_CS         3
48#define LEDS_PHYS       0x100a0000
49
50#ifdef SIBYTE_HAVE_IDE
51#define IDE_CS          4
52#define IDE_PHYS        0x100b0000
53#define K_GPIO_GB_IDE   4
54#define K_INT_GB_IDE    (K_INT_GPIO_0 + K_GPIO_GB_IDE)
55#endif
56
57#ifdef SIBYTE_HAVE_PCMCIA
58#define PCMCIA_CS       6
59#define PCMCIA_PHYS     0x11000000
60#define K_GPIO_PC_READY 9
61#define K_INT_PC_READY  (K_INT_GPIO_0 + K_GPIO_PC_READY)
62#endif
63
64#endif /* __ASM_SIBYTE_SWARM_H */
65