Searched refs:slot (Results 1 - 25 of 952) sorted by path

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/linux-master/arch/alpha/kernel/
H A Dpci_impl.h26 #define EISA_DEFAULT_IO_BASE 0x9000 /* start above 8th slot */
27 #define DEFAULT_IO_BASE 0x8000 /* start at 8th slot */
121 if (slot >= min_idsel && slot <= max_idsel && pin < irqs_per_slot) \
122 _ctl_ = irq_tab[slot - min_idsel][pin]; \
/linux-master/arch/alpha/lib/
H A Dev6-stxncpy.S289 cmoveq a2, t6, t8 # E : Latency=2, extra map slot (stall)
370 cmoveq a2, t5, t8 # E : Latency=2, extra map slot
/linux-master/arch/arm/mach-orion5x/
H A Dboard-mss2.c27 static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
34 irq = orion5x_pci_map_irq(dev, slot, pin);
H A Dterastation_pro2-setup.c98 static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
105 irq = orion5x_pci_map_irq(dev, slot, pin);
112 if (slot == TSP2_PCI_SLOT0_OFFS)
H A Dts209-setup.c141 static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot, argument
149 irq = orion5x_pci_map_irq(dev, slot, pin);
156 switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) {
H A Dts409-setup.c119 static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot, argument
127 irq = orion5x_pci_map_irq(dev, slot, pin);
/linux-master/arch/mips/include/asm/txx9/
H A Dgeneric.h40 int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
H A Drbtx4927.h90 int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
H A Dtx4938.h290 int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
/linux-master/arch/mips/pci/
H A Dfixup-bcm63xx.c13 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
H A Dfixup-fuloong2e.c15 /* South bridge slot number is set by the pci probe process */
18 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
22 if (slot == sb_slot) {
H A Dfixup-ip32.c12 * 2 expansion slot
37 * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
43 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
45 return irq_tab_mace[slot][pin];
H A Dfixup-malta.c42 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
45 virq = irq_tab[slot][pin];
H A Dfixup-rbtx4927.c39 int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
45 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
48 irq = (irq + 0 + slot) % 4;
52 irq = (irq + 33 - slot) % 4;
54 irq = (irq + 3 + slot) % 4;
H A Dfixup-rc32434.c39 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
H A Dops-rc32434.c41 #define PCI_CFG_SET(bus, slot, func, off) \
43 ((bus) << 16) | ((slot)<<11) | \
50 unsigned int slot = PCI_SLOT(devfn); local
54 PCI_CFG_SET(bus->number, slot, func, where);
H A Dpci-bcm1480.c65 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
H A Dpci-sb1250.c75 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
H A Dpci-tx4938.c115 int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot) argument
118 switch (slot) {
/linux-master/arch/parisc/include/asm/
H A Deisa_eeprom.h15 #define HPEE_SLOT_INFO(slot) (20+(48*slot))
39 /* bits 0..3 are the duplicate slot id */
63 * in the parsed slot data area */
/linux-master/arch/powerpc/include/asm/
H A Dspu_csa.h51 u32 slot[4]; member in struct:spu_reg128
/linux-master/arch/powerpc/platforms/cell/spufs/
H A Dbacking_ops.c145 int slot = ctx->csa.spu_chnlcnt_RW[29]; local
152 BUG_ON(avail != (4 - slot));
153 ctx->csa.spu_mailbox_data[slot] = data;
154 ctx->csa.spu_chnlcnt_RW[29] = ++slot;
156 ctx->csa.prob.mb_stat_R |= (((4 - slot) & 0xff) << 8);
H A Dspu_restore.c79 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING;
82 decr = regs_spill[offset].slot[0];
97 data = regs_spill[offset].slot[0];
111 data = regs_spill[offset].slot[0];
138 srr0 = regs_spill[offset].slot[0];
151 event_mask = regs_spill[offset].slot[0];
164 tag_mask = regs_spill[offset].slot[0];
192 stopped_status = regs_spill[offset].slot[0];
193 stopped_code = regs_spill[offset].slot[1];
H A Dspu_save.c33 regs_spill[offset].slot[0] = spu_readch(SPU_RdEventMask);
44 regs_spill[offset].slot[0] = spu_readch(MFC_RdTagMask);
89 regs_spill[offset].slot[0] = spu_readch(SPU_RdDec);
101 regs_spill[offset].slot[0] = spu_readch(SPU_RdSRR0);
H A Dspu_utils.h23 unsigned int slot[4]; member in union:__anon157
51 ((char *)(&(dummy->_field)) - (char *)(&(dummy->gprs[0].slot[0])))

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