1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
4 *
5 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
6 */
7
8#ifndef ASM_EISA_EEPROM_H
9#define ASM_EISA_EEPROM_H
10
11extern void __iomem *eisa_eeprom_addr;
12
13#define HPEE_MAX_LENGTH       0x2000	/* maximum eeprom length */
14
15#define HPEE_SLOT_INFO(slot) (20+(48*slot))
16
17struct eeprom_header
18{
19
20	u_int32_t num_writes;       /* number of writes */
21 	u_int8_t  flags;            /* flags, usage? */
22	u_int8_t  ver_maj;
23	u_int8_t  ver_min;
24	u_int8_t  num_slots;        /* number of EISA slots in system */
25	u_int16_t csum;             /* checksum, I don't know how to calculate this */
26	u_int8_t  pad[10];
27} __attribute__ ((packed));
28
29
30struct eeprom_eisa_slot_info
31{
32	u_int32_t eisa_slot_id;
33	u_int32_t config_data_offset;
34	u_int32_t num_writes;
35	u_int16_t csum;
36	u_int16_t num_functions;
37	u_int16_t config_data_length;
38
39	/* bits 0..3 are the duplicate slot id */
40#define HPEE_SLOT_INFO_EMBEDDED  0x10
41#define HPEE_SLOT_INFO_VIRTUAL   0x20
42#define HPEE_SLOT_INFO_NO_READID 0x40
43#define HPEE_SLOT_INFO_DUPLICATE 0x80
44	u_int8_t slot_info;
45
46#define HPEE_SLOT_FEATURES_ENABLE         0x01
47#define HPEE_SLOT_FEATURES_IOCHK          0x02
48#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
49	u_int8_t slot_features;
50
51	u_int8_t  ver_min;
52	u_int8_t  ver_maj;
53
54#define HPEE_FUNCTION_INFO_HAVE_TYPE      0x01
55#define HPEE_FUNCTION_INFO_HAVE_MEMORY    0x02
56#define HPEE_FUNCTION_INFO_HAVE_IRQ       0x04
57#define HPEE_FUNCTION_INFO_HAVE_DMA       0x08
58#define HPEE_FUNCTION_INFO_HAVE_PORT      0x10
59#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
60/* I think there are two slighty different
61 * versions of the function_info field
62 * one int the fixed header and one optional
63 * in the parsed slot data area */
64#define HPEE_FUNCTION_INFO_HAVE_FUNCTION  0x01
65#define HPEE_FUNCTION_INFO_F_DISABLED     0x80
66#define HPEE_FUNCTION_INFO_CFG_FREE_FORM  0x40
67	u_int8_t  function_info;
68
69#define HPEE_FLAG_BOARD_IS_ISA		  0x01 /* flag and minor version for isa board */
70	u_int8_t  flags;
71	u_int8_t  pad[24];
72} __attribute__ ((packed));
73
74
75#define HPEE_MEMORY_MAX_ENT   9
76/* memory descriptor: byte 0 */
77#define HPEE_MEMORY_WRITABLE  0x01
78#define HPEE_MEMORY_CACHABLE  0x02
79#define HPEE_MEMORY_TYPE_MASK 0x18
80#define HPEE_MEMORY_TYPE_SYS  0x00
81#define HPEE_MEMORY_TYPE_EXP  0x08
82#define HPEE_MEMORY_TYPE_VIR  0x10
83#define HPEE_MEMORY_TYPE_OTH  0x18
84#define HPEE_MEMORY_SHARED    0x20
85#define HPEE_MEMORY_MORE      0x80
86
87/* memory descriptor: byte 1 */
88#define HPEE_MEMORY_WIDTH_MASK 0x03
89#define HPEE_MEMORY_WIDTH_BYTE 0x00
90#define HPEE_MEMORY_WIDTH_WORD 0x01
91#define HPEE_MEMORY_WIDTH_DWORD 0x02
92#define HPEE_MEMORY_DECODE_MASK 0x0c
93#define HPEE_MEMORY_DECODE_20BITS 0x00
94#define HPEE_MEMORY_DECODE_24BITS 0x04
95#define HPEE_MEMORY_DECODE_32BITS 0x08
96/* byte 2 and 3 are a 16bit LE value
97 * containing the memory size in kilobytes */
98/* byte 4,5,6 are a 24bit LE value
99 * containing the memory base address */
100
101
102#define HPEE_IRQ_MAX_ENT      7
103/* Interrupt entry: byte 0 */
104#define HPEE_IRQ_CHANNEL_MASK 0xf
105#define HPEE_IRQ_TRIG_LEVEL   0x20
106#define HPEE_IRQ_MORE         0x80
107/* byte 1 seems to be unused */
108
109#define HPEE_DMA_MAX_ENT     4
110
111/* dma entry: byte 0 */
112#define HPEE_DMA_CHANNEL_MASK 7
113#define HPEE_DMA_SIZE_MASK	0xc
114#define HPEE_DMA_SIZE_BYTE	0x0
115#define HPEE_DMA_SIZE_WORD	0x4
116#define HPEE_DMA_SIZE_DWORD	0x8
117#define HPEE_DMA_SHARED      0x40
118#define HPEE_DMA_MORE        0x80
119
120/* dma entry: byte 1 */
121#define HPEE_DMA_TIMING_MASK 0x30
122#define HPEE_DMA_TIMING_ISA	0x0
123#define HPEE_DMA_TIMING_TYPEA 0x10
124#define HPEE_DMA_TIMING_TYPEB 0x20
125#define HPEE_DMA_TIMING_TYPEC 0x30
126
127#define HPEE_PORT_MAX_ENT 20
128/* port entry byte 0 */
129#define HPEE_PORT_SIZE_MASK 0x1f
130#define HPEE_PORT_SHARED    0x40
131#define HPEE_PORT_MORE      0x80
132/* byte 1 and 2 is a 16bit LE value
133 * containing the start port number */
134
135#define HPEE_PORT_INIT_MAX_LEN     60 /* in bytes here */
136/* port init entry byte 0 */
137#define HPEE_PORT_INIT_WIDTH_MASK  0x3
138#define HPEE_PORT_INIT_WIDTH_BYTE  0x0
139#define HPEE_PORT_INIT_WIDTH_WORD  0x1
140#define HPEE_PORT_INIT_WIDTH_DWORD 0x2
141#define HPEE_PORT_INIT_MASK        0x4
142#define HPEE_PORT_INIT_MORE        0x80
143
144#define HPEE_SELECTION_MAX_ENT 26
145
146#define HPEE_TYPE_MAX_LEN    80
147
148#endif
149