Searched refs:rg (Results 1 - 25 of 34) sorted by last modified time

12

/linux-master/mm/
H A Dhugetlb.c455 struct file_region *rg)
458 nrg->reservation_counter = rg->reservation_counter;
459 nrg->css = rg->css;
460 if (rg->css)
461 css_get(rg->css);
500 static void put_uncharge_info(struct file_region *rg) argument
503 if (rg->css)
504 css_put(rg->css);
508 static bool has_same_uncharge_info(struct file_region *rg, argument
512 return rg
454 copy_hugetlb_cgroup_uncharge_info(struct file_region *nrg, struct file_region *rg) argument
520 coalesce_file_region(struct resv_map *resv, struct file_region *rg) argument
548 hugetlb_resv_map_add(struct resv_map *map, struct list_head *rg, long from, long to, struct hstate *h, struct hugetlb_cgroup *cg, long *regions_needed) argument
581 struct list_head *rg = NULL; local
641 struct file_region *trg = NULL, *rg = NULL; variable in typeref:struct:
684 kfree(rg); variable
835 struct file_region *rg, *trg; local
962 struct file_region *rg; local
1086 struct file_region *rg = kmalloc(sizeof(*rg), GFP_KERNEL); local
1119 struct file_region *rg, *trg; local
[all...]
H A Dhugetlb_cgroup.c427 struct file_region *rg,
431 if (hugetlb_cgroup_disabled() || !resv || !rg || !nr_pages)
434 if (rg->reservation_counter && resv->pages_per_hpage &&
436 page_counter_uncharge(rg->reservation_counter,
439 * Only do css_put(rg->css) when we delete the entire region
443 css_put(rg->css);
426 hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, struct file_region *rg, unsigned long nr_pages, bool region_del) argument
/linux-master/drivers/scsi/libsas/
H A Dsas_expander.c439 struct report_general_resp *rg; local
470 rg = &rg_resp->rg;
471 dev->ex_dev.ex_change_count = be16_to_cpu(rg->change_count);
472 dev->ex_dev.max_route_indexes = be16_to_cpu(rg->route_indexes);
473 dev->ex_dev.num_phys = min(rg->num_phys, (u8)MAX_EXPANDER_PHYS);
474 dev->ex_dev.t2t_supp = rg->t2t_supp;
475 dev->ex_dev.conf_route_table = rg->conf_route_table;
476 dev->ex_dev.configuring = rg->configuring;
478 rg
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/linux-master/drivers/gpu/drm/i915/
H A Di915_hwmon.c61 struct hwm_reg rg; member in struct:i915_hwmon
136 rgaddr = hwmon->rg.energy_status_tile;
138 rgaddr = hwmon->rg.energy_status_all;
168 r = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit);
237 hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
259 return i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit) ? attr->mode : 0;
327 reg_value = intel_uncore_read(ddat->uncore, hwmon->rg.gt_perf_status);
345 return i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit) ? 0664 : 0;
347 return i915_mmio_reg_valid(hwmon->rg.pkg_power_sku) ? 0444 : 0;
360 * "typical but not guaranteed" min/max values in rg
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/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_switch.c4795 struct ice_recp_grp_entry *rg; local
4805 list_for_each_entry(rg, rg_list, l_entry) {
4808 for (i = 0; i < rg->r_group.n_val_pairs; i++) {
4814 pr = &rg->r_group.pairs[i];
4815 mask = rg->r_group.mask[i];
4823 rg->fv_idx[i] = j;
4824 rg->fv_mask[i] = mask;
/linux-master/drivers/media/i2c/
H A Dalvium-csi2.c530 dev_dbg(dev, "avail bayer rg: %u\n",
1148 alvium->is_bay_avail[ALVIUM_BIT_BAY_RG] = avail_bay->rg;
H A Dalvium-csi2.h328 u8 rg:1; member in struct:alvium_avail_bayer
/linux-master/arch/arm64/boot/dts/rockchip/
H A DMakefile74 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-d.dtb
75 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-s.dtb
/linux-master/scripts/dtc/include-prefixes/arm64/rockchip/
H A DMakefile74 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-d.dtb
75 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-s.dtb
/linux-master/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-main.c493 struct omapfb2_mem_region *rg = ofbi->region; local
494 struct vrfb *vrfb = &rg->vrfb;
503 if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB)
543 omap_vrfb_setup(&rg->vrfb, rg->paddr,
595 struct omapfb2_mem_region *rg = ofbi->region; local
620 fix->smem_len = rg->size;
1068 struct omapfb2_mem_region *rg = vma->vm_private_data; local
1070 omapfb_get_mem_region(rg);
1071 atomic_inc(&rg
1077 struct omapfb2_mem_region *rg = vma->vm_private_data; local
1093 struct omapfb2_mem_region *rg; local
1302 struct omapfb2_mem_region *rg; local
1358 struct omapfb2_mem_region *rg; local
1554 struct omapfb2_mem_region *rg; local
1585 struct omapfb2_mem_region *rg = ofbi->region; local
[all...]
H A Domapfb-sysfs.c42 struct omapfb2_mem_region *rg; local
59 rg = omapfb_get_mem_region(ofbi->region);
61 if (rg->size) {
73 omapfb_put_mem_region(rg);
429 struct omapfb2_mem_region *rg; local
445 rg = ofbi->region;
447 down_write_nested(&rg->lock, rg->id);
448 atomic_inc(&rg->lock_count);
450 if (atomic_read(&rg
[all...]
/linux-master/drivers/video/fbdev/omap/
H A Domapfb_main.c371 struct omapfb_mem_region *rg; local
374 rg = &plane->fbdev->mem_desc.region[plane->idx];
375 fbi->screen_base = rg->vaddr;
379 fix->smem_start = rg->paddr;
380 fix->smem_len = rg->size;
383 fix->smem_start = rg->paddr;
384 fix->smem_len = rg->size;
817 struct omapfb_mem_region *rg = &fbdev->mem_desc.region[plane->idx]; local
832 if (rg->size != size || rg
893 struct omapfb_mem_region *rg; local
[all...]
/linux-master/drivers/gpu/drm/omapdrm/dss/
H A Ddispc.c1319 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) |
/linux-master/drivers/dma/mediatek/
H A Dmtk-uart-apdma.c214 unsigned int len, wg, rg; local
226 rg = mtk_uart_apdma_read(c, VFF_RPT);
228 cnt = (wg & VFF_RING_SIZE) - (rg & VFF_RING_SIZE);
234 if ((rg ^ wg) & VFF_RING_WRAP)
/linux-master/include/linux/
H A Dhugetlb_cgroup.h151 struct file_region *rg,
161 struct file_region *rg,
160 hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, struct file_region *rg, unsigned long nr_pages, bool region_del) argument
/linux-master/arch/arm/boot/dts/allwinner/
H A DMakefile259 sun8i-v3s-anbernic-rg-nano.dtb \
/linux-master/scripts/dtc/include-prefixes/arm/allwinner/
H A DMakefile259 sun8i-v3s-anbernic-rg-nano.dtb \
/linux-master/drivers/thermal/tegra/
H A Dsoctherm.c253 /* get THERMCTL_LEVELx offset per CPU/GPU/MEM/TSENSE rg and LEVEL0~3 lv */
255 #define THERMCTL_LVL_REG(rg, lv) ((rg) + ((lv) * THERMCTL_LVL_REGS_SIZE))
/linux-master/drivers/power/reset/
H A Dkeystone-reset.c82 unsigned int rg; local
146 rg = rsmux_offset + val * 4;
148 ret = regmap_update_bits(devctrl_regs, rg, RSMUX_OMODE_MASK,
/linux-master/drivers/gpu/drm/arm/display/include/
H A Dmalidp_utils.h32 static inline void set_range(struct malidp_range *rg, u32 start, u32 end) argument
34 rg->start = start;
35 rg->end = end;
38 static inline bool malidp_in_range(struct malidp_range *rg, u32 v) argument
40 return (v >= rg->start) && (v <= rg->end);
/linux-master/drivers/dma/dw-edma/
H A Ddw-edma-pcie.c41 struct dw_edma_block rg; member in struct:dw_edma_pcie_data
57 .rg.bar = BAR_0,
58 .rg.off = 0x00001000, /* 4 Kbytes */
59 .rg.sz = 0x00002000, /* 8 Kbytes */
143 pdata->rg.bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
156 pdata->rg.off = off;
185 mask = BIT(vsec_data.rg.bar);
233 chip->reg_base = pcim_iomap_table(pdev)[vsec_data.rg.bar];
298 vsec_data.rg.bar, vsec_data.rg
[all...]
/linux-master/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddispc.c1062 coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) |
H A Dmanager-sysfs.c365 info.cpr_coefs.rg,
387 &coefs.rr, &coefs.rg, &coefs.rb,
392 arr = (s16[]){ coefs.rr, coefs.rg, coefs.rb,
/linux-master/arch/arm64/crypto/
H A Dsm3-neon-core.S47 #define rg w9 define
359 ldp rg, rh, [RSTATE, #24]
401 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 0, 0, IW, _, 0)
402 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 1, 1, IW, _, 0)
403 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 2, 2, IW, _, 0)
404 R1(rb, rc, rd, ra, rf, rg, rh, re, k_odd, _, 3, 3, IW, _, 0)
407 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 4, 0, IW, _, 0)
408 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 5, 1, IW, _, 0)
409 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 6, 2, IW, SCHED_W_W0W1W2W3W4W5_1, 12)
410 R1(rb, rc, rd, ra, rf, rg, r
[all...]
/linux-master/drivers/gpio/
H A Dgpio-mt7621.c66 mtk_gpio_w32(struct mtk_gc *rg, u32 offset, u32 val) argument
68 struct gpio_chip *gc = &rg->chip;
71 offset = (rg->bank * GPIO_BANK_STRIDE) + offset;
76 mtk_gpio_r32(struct mtk_gc *rg, u32 offset) argument
78 struct gpio_chip *gc = &rg->chip;
81 offset = (rg->bank * GPIO_BANK_STRIDE) + offset;
89 struct mtk_gc *rg = to_mediatek_gpio(gc); local
94 pending = mtk_gpio_r32(rg, GPIO_REG_STAT);
98 mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit));
109 struct mtk_gc *rg local
132 struct mtk_gc *rg = to_mediatek_gpio(gc); local
155 struct mtk_gc *rg = to_mediatek_gpio(gc); local
199 struct mtk_gc *rg = to_mediatek_gpio(chip); local
224 struct mtk_gc *rg; local
[all...]

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