/linux-master/drivers/crypto/cavium/zip/ |
H A D | zip_main.h | 67 char *reg_name; member in struct:zip_registers
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H A D | zip_main.c | 597 while (zipregs[i].reg_name) { 601 zipregs[i].reg_name, val);
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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
H A D | hw_translate_dce120.c | 51 #define REG(reg_name)\ 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 54 #define REGI(reg_name, block, id)\ 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 56 mm ## block ## id ## _ ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
H A D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 54 #define REGI(reg_name, block, id)\ 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 56 mm ## block ## id ## _ ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/ |
H A D | hw_gpio.c | 34 #define FN(reg_name, field_name) \
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/linux-master/scripts/ |
H A D | markup_oops.pl | 86 sub reg_name subroutine 127 my $clobberprime = reg_name($clobber); 128 my $lastwordprime = reg_name($lastword);
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/linux-master/arch/alpha/lib/ |
H A D | stacktrace.c | 40 static char reg_name[][4] = { variable 62 printk("\t\t%s / 0x%016lx\n", reg_name[reg], value);
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/linux-master/drivers/char/hw_random/ |
H A D | cctrng.c | 26 #define CC_REG_FLD_GET(reg_name, fld_name, reg_val) \ 27 (FIELD_GET(CC_GENMASK(CC_ ## reg_name ## _ ## fld_name), reg_val))
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/linux-master/drivers/clk/ |
H A D | clk-si5341.c | 1588 char reg_name[10]; local 1590 snprintf(reg_name, sizeof(reg_name), "vddo%d", i); 1592 &client->dev, reg_name); 1604 reg_name, err);
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/linux-master/drivers/cpufreq/ |
H A D | cpufreq-dt.c | 196 const char *reg_name[] = { NULL, NULL }; local 221 reg_name[0] = find_supply_name(cpu_dev); 222 if (reg_name[0]) { 223 priv->opp_token = dev_pm_opp_set_regulators(cpu_dev, reg_name);
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/linux-master/drivers/crypto/ccree/ |
H A D | cc_driver.h | 94 #define CC_REG(reg_name) CC_ ## reg_name ## _REG_OFFSET
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu.h | 1203 uint32_t inst, uint32_t reg_addr, char reg_name[],
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H A D | amdgpu_device.c | 6462 uint32_t inst, uint32_t reg_addr, char reg_name[], 6480 inst, reg_name, (uint32_t)expected_value, 6461 amdgpu_device_wait_on_rreg(struct amdgpu_device *adev, uint32_t inst, uint32_t reg_addr, char reg_name[], uint32_t expected_value, uint32_t mask) argument
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H A D | soc15_common.h | 58 #define WREG32_FIELD15_PREREG(ip, idx, reg_name, field, val) \ 59 __WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \ 61 adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \ 63 ~REG_FIELD_MASK(reg_name, field)) | (val) << REG_FIELD_SHIFT(reg_name, field), \
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/linux-master/drivers/gpu/drm/amd/display/dc/bios/ |
H A D | bios_parser_helper.c | 54 #define FN(reg_name, field_name) \
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
H A D | dce_clk_mgr.c | 50 #define FN(reg_name, field_name) \
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
H A D | dce110_clk_mgr.c | 35 #define SR(reg_name)\ 36 .reg_name = mm ## reg_name 39 #define SRI(reg_name, block, id)\ 40 .reg_name = mm ## block ## id ## _ ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
H A D | dce112_clk_mgr.c | 37 #define SR(reg_name)\ 38 .reg_name = mm ## reg_name 41 #define SRI(reg_name, block, id)\ 42 .reg_name = mm ## block ## id ## _ ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
H A D | dce60_clk_mgr.c | 50 #define FN(reg_name, field_name) \ 54 #define SR(reg_name)\ 55 .reg_name = mm ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
H A D | rv1_clk_mgr_vbios_smu.c | 65 #define REG(reg_name) \ 66 (MP1_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name) 68 #define FN(reg_name, field) \ 69 FD(reg_name##__##field)
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
H A D | dcn20_clk_mgr.c | 43 #define FN(reg_name, field_name) \ 53 #define SR(reg_name)\ 54 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 55 mm ## reg_name
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
H A D | dcn201_clk_mgr.c | 49 #define SR(reg_name)\ 50 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 51 mm ## reg_name 57 #define FN(reg_name, field_name) \
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
H A D | rn_clk_mgr.c | 50 #define REG(reg_name) \ 51 (CLK_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name) 371 chars_printed = snprintf_count(log_info->pBuf, remaining_buffer, "reg_name,value,clk_type\n");
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H A D | rn_clk_mgr_vbios_smu.c | 40 #define REG(reg_name) \ 41 (MP0_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name) 43 #define FN(reg_name, field) \ 44 FD(reg_name##__##field)
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_clk_mgr.c | 48 #define FN(reg_name, field_name) \ 58 #define SR(reg_name)\ 59 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 60 mm ## reg_name 63 #define CLK_SRI(reg_name, block, inst)\ 64 .reg_name = mm ## block ## _ ## reg_name
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