Searched refs:per (Results 1 - 25 of 61) sorted by path

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/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-pciercx-defs.h74 __BITFIELD_FIELD(uint32_t per:1,
/linux-master/arch/sh/lib/
H A Dcopy_page.S310 1: ! Read longword, write two words per iteration
332 ! Read longword, write byte, word, byte per iteration
H A Dmemcpy-sh4.S39 ! 6 cycles, 4 bytes per iteration
112 ! 6 cycles, 4 bytes per iteration
222 ! 4 cycles, 2 bytes per iteration
250 ! 3 cycles, 1 byte per iteration
332 ! 4 cycles, 2 long words per iteration
366 ! 4 cycles, 2 long words per iteration
386 ! 3 cycles, 1 byte per iteration
434 ! 4 cycles, 2 long words per iteration
471 ! 16 cycles, 32 bytes per iteration
538 ! 4 cycles, 2 long words per iteratio
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/linux-master/
H A DMakefile1697 boards-per-dir = $(sort $(notdir $(wildcard $(srctree)/arch/$(SRCARCH)/configs/$*/*_defconfig)))
1701 @$(if $(boards-per-dir), \
1702 $(foreach b, $(boards-per-dir), \
/linux-master/arch/arc/kernel/
H A Dhead.S161 ; setup per-cpu idle task as "current" on this CPU
/linux-master/arch/arm/boot/compressed/
H A Dhead.S700 mov \reg, #4 @ bytes per word
/linux-master/arch/arm/crypto/
H A Dsha1-armv4-large.S56 @ Cortex A8 core and in absolute terms ~870 cycles per input block
57 @ [or 13.6 cycles per byte].
62 @ improvement on Cortex A8 core and 12.2 cycles per byte.
/linux-master/arch/arm/mach-shmobile/
H A Dheadsmp.S103 add r5, r5, r2 @ array of per-cpu mpidr values
104 add r6, r6, r2 @ array of per-cpu functions
105 add r7, r7, r2 @ array of per-cpu arguments
/linux-master/arch/arm/mm/
H A Dproc-macros.S84 mov \reg, #4 @ bytes per word
101 mov \reg, #4 @ bytes per word
/linux-master/arch/s390/boot/
H A Dpgm_check_info.c166 psw->per, psw->dat, psw->io, psw->ext, psw->key, psw->mcheck,
/linux-master/arch/s390/include/asm/
H A Dptrace.h60 unsigned long per : 1; /* PER-Mask */ member in struct:psw_bits
209 * These are defined as per linux/ptrace.h, which see.
/linux-master/arch/s390/kernel/
H A Ddumpstack.c100 /* Check per-task stack */
107 /* Check per-cpu stacks */
165 "P:%x AS:%x CC:%x PM:%x", psw->per, psw->dat, psw->io, psw->ext,
H A Duprobes.c35 auprobe->saved_per = psw_bits(regs->psw).per;
84 psw_bits(regs->psw).per = auprobe->saved_per;
102 /* fix per address */
104 /* trigger per event */
241 * If user per registers are setup to trace storage alterations and an
/linux-master/arch/x86/boot/
H A Dheader.S445 # of 5 bytes per 32767 bytes.
454 # per 32767 bytes of data is sufficient. To avoid problems internal to a
463 # Adding 8 bytes per 32K is a bit excessive but much easier to calculate.
476 # or one byte per 256 bytes. OTOH, we can safely get rid of the +128 as
481 # ZSTD compressed data grows by at most 3 bytes per 128K, and only has a 22
/linux-master/arch/x86/crypto/
H A Daesni-intel_asm.S185 # once per key.
H A Dsha256-avx-asm.S47 # This code schedules 1 block at a time, with 4 lanes per block
H A Dsha256-avx2-asm.S48 # This code schedules 2 blocks at a time, with 4 lanes per block
H A Dsha512-avx2-asm.S49 # This code schedules 1 blocks at a time, with 4 lanes per block
/linux-master/arch/xtensa/lib/
H A Dmemcopy.S123 # per iteration
129 # copy 16 bytes per iteration for word-aligned dst and word-aligned src
195 # copy 16 bytes per iteration for word-aligned dst and unaligned src
384 # per iteration
390 # copy 16 bytes per iteration for word-aligned dst and word-aligned src
458 # copy 16 bytes per iteration for word-aligned dst and unaligned src
H A Dmemset.S49 # per iteration
56 # set 16 bytes per iteration for word-aligned dst
H A Dstrncpy_user.S63 srli a10, a4, 2 # number of loop iterations with 4B per loop
H A Dstrnlen_user.S63 srli a10, a3, 2 # number of loop iterations with 4B per loop
H A Dusercopy.S8 * of the Xtensa link-time HAL, and those files may differ per
77 # per iteration
140 # copy 16 bytes per iteration for word-aligned dst and word-aligned src
205 # copy 16 bytes per iteration for word-aligned dst and unaligned src
/linux-master/drivers/clk/imx/
H A Dclk-imx31.c40 per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, enumerator in enum:mx31_clks
67 clk[per] = imx_clk_mux("per", base + MXC_CCM_CCMR, 24, 1, per_sel, ARRAY_SIZE(per_sel));
75 clk[sdhc1_gate] = imx_clk_gate2("sdhc1_gate", "per", base + MXC_CCM_CGR0, 0);
76 clk[sdhc2_gate] = imx_clk_gate2("sdhc2_gate", "per", base + MXC_CCM_CGR0, 2);
77 clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per", base + MXC_CCM_CGR0, 4);
78 clk[epit1_gate] = imx_clk_gate2("epit1_gate", "per", base + MXC_CCM_CGR0, 6);
79 clk[epit2_gate] = imx_clk_gate2("epit2_gate", "per", base + MXC_CCM_CGR0, 8);
85 clk[uart1_gate] = imx_clk_gate2("uart1_gate", "per", base + MXC_CCM_CGR0, 20);
86 clk[uart2_gate] = imx_clk_gate2("uart2_gate", "per", bas
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/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm374 // sleep 1 (64clk) is not enough for 8 waves per SIMD, which will cause

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