| /linux-master/drivers/clk/qcom/ |
| H A D | clk-pll.c | 31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val);
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,
61 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,
71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val);
76 regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0);
153 regmap_read(pll->clkr.regmap, pll->mode_reg, &mode);
250 qcom_pll_set_fsm_mode(regmap, pll->mode_reg, 1, 8);
259 qcom_pll_set_fsm_mode(regmap, pll->mode_reg, 1, 0);
269 ret = regmap_read(pll->clkr.regmap, pll->mode_reg,
[all...] |
| H A D | clk-pll.h | 33 * @mode_reg: mode register
44 u32 mode_reg; member in struct:clk_pll
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| H A D | a53-pll.c | 114 pll->mode_reg = 0x00;
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| H A D | clk-hfpll.c | 67 regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL);
76 regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N);
91 regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);
104 regmap_read(regmap, hd->mode_reg, &mode);
121 regmap_update_bits(regmap, hd->mode_reg,
213 regmap_read(regmap, hd->mode_reg, &mode);
239 regmap_read(regmap, hd->mode_reg, &mode);
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| H A D | clk-hfpll.h | 11 u32 mode_reg; member in struct:hfpll_data
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| H A D | gcc-apq8084.c | 43 .mode_reg = 0x0000,
74 .mode_reg = 0x0040,
105 .mode_reg = 0x1dc0,
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| H A D | gcc-ipq806x.c | 37 .mode_reg = 0x30c0,
66 .mode_reg = 0x3160,
95 .mode_reg = 0x3140,
120 .mode_reg = 0x3200,
146 .mode_reg = 0x3240,
172 .mode_reg = 0x3300,
202 .mode_reg = 0x31c0,
247 .mode_reg = 0x31a0,
266 .mode_reg = 0x3180,
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| H A D | gcc-mdm9607.c | 81 .mode_reg = 0x20000,
200 .mode_reg = 0x23000,
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| H A D | gcc-mdm9615.c | 52 .mode_reg = 0x30c0,
94 .mode_reg = 0x3140,
123 .mode_reg = 0x31c0,
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| H A D | gcc-msm8660.c | 31 .mode_reg = 0x3140,
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| H A D | gcc-msm8909.c | 98 .mode_reg = 0x20000,
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| H A D | gcc-msm8916.c | 49 .mode_reg = 0x21000,
80 .mode_reg = 0x20000,
111 .mode_reg = 0x4a000,
142 .mode_reg = 0x23000,
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| H A D | gcc-msm8917.c | 180 .mode_reg = 0x37000,
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| H A D | gcc-msm8939.c | 57 .mode_reg = 0x21000,
88 .mode_reg = 0x20000,
119 .mode_reg = 0x4a000,
150 .mode_reg = 0x23000,
181 .mode_reg = 0x22000,
228 .mode_reg = 0x24000,
274 .mode_reg = 0x25000,
305 .mode_reg = 0x37000,
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| H A D | gcc-msm8960.c | 34 .mode_reg = 0x3160,
65 .mode_reg = 0x3140,
92 .mode_reg = 0x3200,
120 .mode_reg = 0x3240,
134 .mode_reg = 0x3300,
162 .mode_reg = 0x3280,
190 .mode_reg = 0x32c0,
218 .mode_reg = 0x3300,
232 .mode_reg = 0x3400,
264 .mode_reg
[all...] |
| H A D | gcc-msm8974.c | 40 .mode_reg = 0x0000,
71 .mode_reg = 0x1dc0,
160 .mode_reg = 0x0040,
|
| H A D | gcc-msm8976.c | 60 .mode_reg = 0x21000,
93 .mode_reg = 0x4a000,
129 .mode_reg = 0x22000,
177 .mode_reg = 0x24000,
204 .mode_reg = 0x37000,
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| H A D | gcc-qcs404.c | 182 .mode_reg = 0x37000,
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| H A D | hfpll.c | 18 .mode_reg = 0x00,
36 .mode_reg = 0x00,
53 .mode_reg = 0x00,
70 .mode_reg = 0x00,
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| H A D | lcc-ipq806x.c | 31 .mode_reg = 0x0,
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| H A D | lcc-msm8960.c | 34 .mode_reg = 0x0,
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| H A D | mmcc-apq8084.c | 48 .mode_reg = 0x0000,
79 .mode_reg = 0x0040,
110 .mode_reg = 0x4100,
127 .mode_reg = 0x0080,
145 .mode_reg = 0x0080,
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| H A D | mmcc-msm8960.c | 49 .mode_reg = 0x31c,
67 .mode_reg = 0x338,
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| H A D | mmcc-msm8974.c | 49 .mode_reg = 0x0000,
80 .mode_reg = 0x0040,
111 .mode_reg = 0x4100,
128 .mode_reg = 0x0080,
|
| /linux-master/arch/powerpc/platforms/powermac/ |
| H A D | low_i2c.c | 400 u8 mode_reg = host->speed; local
408 mode_reg |= KW_I2C_MODE_STANDARD;
413 mode_reg |= KW_I2C_MODE_STANDARDSUB;
418 mode_reg |= KW_I2C_MODE_COMBINED;
426 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
435 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
436 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
|