/linux-master/arch/alpha/include/asm/ |
H A D | agp_backend.h | 17 u32 lw; member in union:_alpha_agp_mode
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/linux-master/arch/m68k/ifpsp060/src/ |
H A D | fplsp.S | 442 set neg_mask, 0x08000000 # negative bit mask (lw) 443 set inf_mask, 0x02000000 # infinity bit mask (lw) 444 set z_mask, 0x04000000 # zero bit mask (lw) 445 set nan_mask, 0x01000000 # nan bit mask (lw) 9279 lsr.l %d0,%d1 # no; bit stays in upper lw 10051 tst.l LOCAL_LO(%a0) # is lo lw of sgl set? 10053 tst.b 3+LOCAL_HI(%a0) # is lo byte of hi lw set?
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H A D | fpsp.S | 462 set neg_mask, 0x08000000 # negative bit mask (lw) 463 set inf_mask, 0x02000000 # infinity bit mask (lw) 464 set z_mask, 0x04000000 # zero bit mask (lw) 465 set nan_mask, 0x01000000 # nan bit mask (lw) 2539 tst.l FP_SRC_HI(%a6) # is lw 2 zero? 2541 tst.l FP_SRC_LO(%a6) # is lw 3 zero? 9638 lsr.l %d0,%d1 # no; bit stays in upper lw 10300 tst.l LOCAL_LO(%a0) # is lo lw of sgl set? 10302 tst.b 3+LOCAL_HI(%a0) # is lo byte of hi lw set? 22982 tst.l FP_SRC_HI(%a6) # is lw [all...] |
H A D | pfpsp.S | 461 set neg_mask, 0x08000000 # negative bit mask (lw) 462 set inf_mask, 0x02000000 # infinity bit mask (lw) 463 set z_mask, 0x04000000 # zero bit mask (lw) 464 set nan_mask, 0x01000000 # nan bit mask (lw) 2538 tst.l FP_SRC_HI(%a6) # is lw 2 zero? 2540 tst.l FP_SRC_LO(%a6) # is lw 3 zero? 12942 tst.l FP_SRC_HI(%a6) # is lw 2 zero? 12944 tst.l FP_SRC_LO(%a6) # is lw 3 zero? 13135 dbf.w %d2,md2b # check for last digit in this lw 13137 addq.l &1,%d1 # inc lw pointe [all...] |
/linux-master/arch/microblaze/lib/ |
H A D | fastcopy.S | 272 lw r9, r6, r10 /* t1 = *(s+offset) */ 293 lw r12, r8, r10 /* v = *(as + offset) */ 307 lw r12, r8, r10 /* v = *(as + offset) */ 321 lw r12, r8, r10 /* v = *(as + offset) */ 597 lw r9, r6, r4 /* t1 = *(s+n) */ 605 lw r11, r8, r4 /* h = *(as + n) */ 616 lw r12, r8, r4 /* v = *(as + n) */ 629 lw r12, r8, r4 /* v = *(as + n) */ 642 lw r12, r8, r4 /* v = *(as + n) */
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H A D | uaccess_old.S | 86 w1: lw r4, r6, r3 /* at least one 4 byte copy */
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/linux-master/arch/mips/alchemy/common/ |
H A D | sleeper.S | 56 lw t0, 0(t1) 135 2: lw t1, 0x0850(a0) /* mem_sdstat */ 143 lw t1, 0x0840(a0) /* mem_sdconfiga */ 194 lw t0, 0x0848(a0) /* mem_sdconfigb */ 208 3: lw t1, 0x0850(a0) /* mem_sdstat */ 215 lw t1, 0x0840(a0) /* mem_sdconfiga */ 230 lw k0, 0x20(sp) 232 lw k0, 0x1c(sp) 234 lw k0, 0x18(sp) 236 lw k [all...] |
/linux-master/arch/mips/fw/lib/ |
H A D | call_o32.S | 77 lw t3,(t0)
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/linux-master/arch/mips/include/asm/mach-malta/ |
H A D | kernel-entry-init.h | 114 lw v0, (v0) 120 lw v0, (v0)
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/linux-master/arch/mips/kernel/ |
H A D | bmips_vec.S | 212 lw k0, 0(k0) 234 lw sp, 0(k0) 236 lw gp, 0(k0)
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/linux-master/arch/mips/kvm/ |
H A D | msa.S | 100 lw $1, \off(\base) 102 lw $1, (\off+4)(\base) 105 lw $1, (\off+4)(\base) 107 lw $1, \off(\base) 151 lw t0, VCPU_MSA_CSR(a0)
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/linux-master/drivers/soc/bcm/brcmstb/pm/ |
H A D | s2-mips.S | 44 lw s0, 0(t0) 45 lw s1, 4(t0) 46 lw s2, 8(t0) 47 lw s3, 12(t0) 48 lw s4, 16(t0) 49 lw s5, 20(t0) 80 lw zero, AON_CTRL_PM_CTRL(s0) 82 lw t0, AON_CTRL_PM_CTRL(s0) 104 1: lw t0, DDR40_PHY_CONTROL_REGS_0_PLL_STATUS(s1) 113 lw t [all...] |
H A D | s3-mips.S | 59 lw zero, AON_CTRL_PM_CTRL(a0) 61 lw t1, AON_CTRL_PM_CTRL(a0) 65 lw t1, AON_CTRL_PM_CTRL(a0) 116 lw fp, 44(t0) 117 lw sp, 40(t0) 118 lw gp, 36(t0) 119 lw s7, 32(t0) 120 lw s6, 28(t0) 121 lw s5, 24(t0) 122 lw s [all...] |
/linux-master/arch/alpha/kernel/ |
H A D | core_marvel.c | 978 csrs->AGP_CMD.csr = agp->mode.lw; 1099 agp->capability.lw = csrs->AGP_STAT.csr; 1105 agp->mode.lw = csrs->AGP_CMD.csr;
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H A D | core_titan.c | 791 agp->capability.lw = 0; 800 agp->mode.lw = 0;
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/linux-master/arch/microblaze/kernel/ |
H A D | head.S | 89 lw r11, r0, r7 /* Big endian load in delay slot */ 101 lw r12, r7, r11 /* r12 = r7 + r11 */ 137 lw r7, r0, r11 /* r7 = r0 + r11 */
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/linux-master/arch/mips/crypto/ |
H A D | chacha-core.S | 130 lw T0, (x*4)(STATE); \ 147 lw T0, (x*4)(STATE); \ 149 lw T1, (x*4) ## (IN); \ 209 lw $at, 16($sp) 216 lw NONCE_0, 48(STATE) 243 lw X0, 0(STATE) 244 lw X1, 4(STATE) 245 lw X2, 8(STATE) 246 lw X3, 12(STATE) 248 lw X [all...] |
H A D | poly1305-mips.pl | 52 # - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary; 608 lw $in0,0($inp) 609 lw $in1,4($inp) 610 lw $in2,8($inp) 611 lw $in3,12($inp) 614 lw $tmp2,16($inp) 777 lw $h0,0($ctx) # load hash value 778 lw $h1,4($ctx) 779 lw $h2,8($ctx) 780 lw [all...] |
/linux-master/arch/mips/dec/ |
H A D | int-handler.S | 135 lw t2,cpu_fpu_mask 158 1: lw t2,(t1) 167 lw a0,(-PTRSIZE)(t1) 184 lw t0,(t0) 195 lw t0,IO_REG_SIR(t2) # get status: IOASIC sir 196 lw t1,IO_REG_SIMR(t2) # get mask: IOASIC simr 214 2: lw t2,(t1) 223 lw a0,%lo(-PTRSIZE)(t1) 285 lw t0,fpu_kstat_irq 287 lw t [all...] |
/linux-master/arch/mips/include/asm/ |
H A D | asm-eva.h | 21 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" 108 #define kernel_lw(reg, addr) lw reg, addr
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H A D | asm.h | 159 #define REG_L lw 180 #define INT_L lw 217 #define LONG_L lw 278 #define PTR_L lw
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H A D | asmmacro-32.h | 43 lw \tmp, THREAD_FCR31(\thread)
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H A D | asmmacro.h | 67 lw \reg, TI_PRE_COUNT($28) 77 lw \reg, TI_PRE_COUNT($28) 146 lw \tmp, THREAD_FCR31(\thread) 572 lw $1, THREAD_MSA_CSR(\thread)
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H A D | ftrace.h | 67 safe_load(STR(lw), src, dst, error)
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/linux-master/arch/mips/include/asm/mach-loongson64/ |
H A D | kernel-entry-init.h | 96 lw s1, 0x20(a0) /* check PC as an indicator */
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