Searched refs:irq_base (Results 1 - 25 of 137) sorted by path

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/linux-master/arch/mips/kernel/
H A Dirq-msc01.c24 static unsigned int irq_base; variable
31 if (irq < (irq_base + 32))
32 MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base));
34 MSCIC_WRITE(MSC01_IC_DISH, 1<<(irq - irq_base - 32));
42 if (irq < (irq_base + 32))
43 MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base));
45 MSCIC_WRITE(MSC01_IC_ENAH, 1<<(irq - irq_base - 32));
86 do_IRQ(irq + irq_base);
152 irq_base = irqbase;
/linux-master/arch/sh/boards/mach-se/7724/
H A Dirq.c114 int irq_base, i; local
124 irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE,
126 if (IS_ERR_VALUE(irq_base)) {
132 irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip,
/linux-master/drivers/atm/
H A Dhe.h279 struct he_irq *irq_base, *irq_head, *irq_tail; member in struct:he_dev
/linux-master/drivers/mfd/
H A Dda9063-irq.c189 da9063->irq_base, irq_chip, &da9063->regmap_irq);
H A Dmax8998-irq.c234 max8998->irq_base, &max8998_irq_domain_ops, max8998);
H A Ducb1x00-ts.c243 enable_irq(ts->ucb->irq_base + UCB_IRQ_TSPX);
294 disable_irq_nosync(ts->ucb->irq_base + UCB_IRQ_TSPX);
317 ret = request_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ucb1x00_ts_irq,
335 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
355 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
H A Dwm831x-irq.c564 int i, ret, irq_base; local
577 if (pdata->irq_base) {
578 irq_base = irq_alloc_descs(pdata->irq_base, 0,
580 if (irq_base < 0) {
582 irq_base);
583 irq_base = 0;
586 irq_base = 0;
589 if (irq_base)
592 irq_base,
[all...]
H A Dwm8350-irq.c364 return &wm8350_irqs[irq - wm8350->irq_base];
408 handle_nested_irq(wm8350->irq_base + i);
468 int irq_base = -1; local
492 if (pdata && pdata->irq_base > 0)
493 irq_base = pdata->irq_base;
495 wm8350->irq_base =
496 irq_alloc_descs(irq_base, 0, ARRAY_SIZE(wm8350_irqs), 0);
497 if (wm8350->irq_base < 0) {
499 wm8350->irq_base);
[all...]
/linux-master/drivers/sh/intc/
H A Dirqdomain.c47 unsigned int irq_base, irq_end; local
52 irq_base = evt2irq(hw->vectors[0].vect);
61 if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1))
/linux-master/include/linux/
H A Dgpio-pxa.h18 int irq_base; member in struct:pxa_gpio_platform_data
H A Dtimb_gpio.h15 * @irq_base If IRQ is supported by the hardware, this is the base
22 int irq_base; member in struct:timbgpio_platform_data
/linux-master/include/linux/mfd/da9052/
H A Dda9052.h90 int irq_base; member in struct:da9052
H A Dpdata.h20 int irq_base; member in struct:da9052_pdata
/linux-master/include/linux/mfd/da9055/
H A Dcore.h33 int irq_base; member in struct:da9055
/linux-master/include/linux/mfd/da9150/
H A Dcore.h56 int irq_base; member in struct:da9150_pdata
67 int irq_base; member in struct:da9150
/linux-master/include/linux/mfd/
H A Dezx-pcap.h18 unsigned int irq_base; member in struct:pcap_platform_data
H A Dmax14577.h60 int irq_base; member in struct:max14577_platform_data
H A Dmax8925.h200 int irq_base; member in struct:max8925_chip
228 * irq_base: stores IRQ base number of MAX8925 in platform
259 int irq_base; member in struct:max8925_platform_data
H A Dmax8998-private.h132 * @irq_base: base IRQ number for max8998, required for IRQs
147 unsigned int irq_base; member in struct:max8998_dev
H A Drc5t583.h289 int irq_base; member in struct:rc5t583
306 * @irq_base: Irq base number on which this device registers their interrupts.
318 int irq_base; member in struct:rc5t583_platform_data
366 int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base);
H A Dtps65090.h101 int irq_base; member in struct:tps65090_platform_data
H A Dtps6586x.h91 int irq_base; member in struct:tps6586x_platform_data
/linux-master/include/linux/mfd/wm8350/
H A Dcore.h606 int irq_base; member in struct:wm8350
625 * @irq_base: Base IRQ for genirq (not currently used).
631 int irq_base; member in struct:wm8350_platform_data
662 if (!wm8350->irq_base)
665 return request_threaded_irq(irq + wm8350->irq_base, NULL,
671 free_irq(irq + wm8350->irq_base, data);
676 disable_irq(irq + wm8350->irq_base);
681 enable_irq(irq + wm8350->irq_base);
/linux-master/include/linux/mfd/wm8994/
H A Dcore.h66 int irq_base; member in struct:wm8994
/linux-master/kernel/irq/
H A Ddevres.c210 * @irq_base: Interrupt base nr for this chip
219 unsigned int irq_base, void __iomem *reg_base,
227 irq_base, reg_base, handler);
253 * @msk: Bitmask holding the irqs to initialize relative to gc->irq_base
258 * Set up max. 32 interrupts starting from gc->irq_base. Note, this
218 devm_irq_alloc_generic_chip(struct device *dev, const char *name, int num_ct, unsigned int irq_base, void __iomem *reg_base, irq_flow_handler_t handler) argument

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