/linux-master/arch/alpha/lib/ |
H A D | ev6-stxcpy.S | 81 cmpbge zero, t1, t8 # E : (3 cycle stall) 253 zap t0, t8, t0 # U : kill dest bytes <= null (2 cycle data stall)
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H A D | ev6-stxncpy.S | 200 extqh t2, a1, t4 # U : (3 cycle stall on t2) 260 extqh t2, a1, t0 # U : extract low bits (2 cycle stall)
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H A D | ev6-clear_user.S | 120 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle 158 cmovlt $5, $16, $3 # E : U L L U : Latency 2, extra mapping cycle
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H A D | ev6-copy_user.S | 56 beq $3, $destaligned # .. U .. .. : 2nd (one cycle fetcher stall) 59 * The fetcher stall also hides the 1 cycle cross-cluster stall for $3 (L --> U)
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H A D | ev6-csum_ipv6_magic.S | 36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence) 116 cmpult $20,$3,$3 # E : (1 cycle stall on $20) 117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20) 120 addq $20,$19,$20 # E : (1 cycle stall on $20) 125 addq $18,$19,$18 # E : (1 cycle stall on $19) 128 /* (1 cycle stall on $18, 2 cycles on $20) */ 131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0) 133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0) 136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1) 137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stal [all...] |
H A D | ev6-memchr.S | 67 extqh $6, $16, $6 # U : 2 cycle stall for $6 107 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle 110 addq $0, 2, $3 # E : U L U L : 2 cycle stall on $0 112 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle 115 addq $0, 1, $3 # E : U L U L : 2 cycle stall on $0 117 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle
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H A D | ev6-memset.S | 153 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle 173 cmovlt $2, $7, $4 # E : Latency 2, extra mapping cycle 331 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle 351 cmovlt $2, $7, $4 # E : Latency 2, extra mapping cycle 519 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle 539 cmovlt $2, $7, $4 # E : Latency 2, extra mapping cycle
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/linux-master/arch/arc/lib/ |
H A D | memcmp.S | 57 ; one more load latency cycle
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/linux-master/arch/arm/mach-rpc/ |
H A D | dma.c | 205 static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle) argument 209 if (cycle < 188) 211 else if (cycle <= 250) 213 else if (cycle < 438)
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/linux-master/arch/mips/dec/ |
H A D | ecc-berr.c | 54 const char *kind, *agent, *cycle, *event; local 81 cycle = (erraddr & KN0X_EAR_WRITE) ? mwritstr : mreadstr; 85 cycle = (erraddr & KN0X_EAR_WRITE) ? writestr : readstr; 185 kind, agent, cycle, event, address);
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H A D | kn01-berr.c | 81 const char *kind, *agent, *cycle, *event; local 126 cycle = mreadstr; 129 cycle = invoker ? writestr : readstr; 138 kind, agent, cycle, event, address);
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H A D | kn02xa-berr.c | 53 const char *kind, *agent, *cycle, *event; local 72 cycle = mreadstr; 75 cycle = invoker ? writestr : readstr; 84 kind, agent, cycle, event, address);
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/linux-master/arch/sh/lib/ |
H A D | memcpy-sh4.S | 175 mov r6, r0 ! 5 MT (0 cycle latency) 184 mov r4, r0 ! 5 MT (0 cycle latency) 197 ! cycle counts for differnet sizes using byte-at-a-time vs. optimised):
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/linux-master/drivers/clocksource/ |
H A D | timer-atmel-pit.c | 43 u32 cycle; member in struct:pit_data 85 elapsed += PIT_PICNT(t) * data->cycle; 95 pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN); 107 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); 109 (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); 132 (data->cycle - 1) | AT91_PIT_PITEN); 153 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, 210 data->cycle = DIV_ROUND_CLOSEST(pit_rate, HZ); 211 WARN_ON(((data->cycle - 1) & ~AT91_PIT_PIV) != 0); 220 bits = 12 /* PICNT */ + ilog2(data->cycle) /* PI [all...] |
/linux-master/include/linux/mfd/syscon/ |
H A D | atmel-smc.h | 83 * @cycle: NWE/NRD cycle timings (not applicable to at91rm9200) 91 u32 cycle; member in struct:atmel_smc_cs_conf
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/linux-master/scripts/ |
H A D | headerdep.pl | 114 # $cycle[n] includes $cycle[n + 1]; 115 # $cycle[-1] will be the culprit 116 my $cycle = shift; 119 for my $i (0 .. $#$cycle - 1) { 120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0]; 122 $cycle->[-1]->[0] = 0; 124 my $first = shift @$cycle; 125 my $last = pop @$cycle; [all...] |
/linux-master/tools/power/cpupower/bench/ |
H A D | benchmark.c | 80 unsigned int _round, cycle; local 125 for (cycle = 0; cycle < config->cycles; cycle++) { 132 printf("performance cycle took %lius, " 151 for (cycle = 0; cycle < config->cycles; cycle++) { 158 printf("powersave cycle took %lius, "
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/linux-master/tools/testing/ktest/examples/include/ |
H A D | defaults.conf | 12 # itself. It is useful for calling scripts that will power cycle 13 # the box, as only one script needs to be created to power cycle 66 # have directory for the scripts to reboot and power cycle the boxes 69 # You can have each box/machine have a script to power cycle it. 70 # Name your script <box>-cycle. 71 POWER_CYCLE = ${SCRIPTS_DIR}/${BOX}-cycle 114 # something else, ktest will power cycle or reboot the target box
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/linux-master/arch/arm/crypto/ |
H A D | sha1-armv4-large.S | 240 eor r11,r11,r12 @ 1 cycle stall 257 eor r11,r11,r12 @ 1 cycle stall 274 eor r11,r11,r12 @ 1 cycle stall 291 eor r11,r11,r12 @ 1 cycle stall 312 eor r11,r11,r12 @ 1 cycle stall 328 eor r11,r11,r12 @ 1 cycle stall 344 eor r11,r11,r12 @ 1 cycle stall 360 eor r11,r11,r12 @ 1 cycle stall 376 eor r11,r11,r12 @ 1 cycle stall 401 eor r11,r11,r12 @ 1 cycle stal [all...] |
/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx.h | 420 * Provide current cycle counter as a return value 422 * Returns current cycle counter 427 uint64_t cycle; local 428 CVMX_RDHWR(cycle, 31); 429 return cycle; 433 * Reads a chip global cycle counter. This counts CPU cycles since 437 * Returns Global chip cycle count since chip reset.
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/linux-master/arch/powerpc/kernel/ |
H A D | sysfs.c | 244 u64 cycle; local 247 cycle = div_u64(ns + 500, 1000) * tb_ticks_per_usec; 249 cycle = div_u64(ns * tb_ticks_per_usec, 1000); 251 if (!cycle) 254 return ilog2(cycle);
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/linux-master/arch/x86/kvm/ |
H A D | x86.c | 2744 * a small delta (1 second) of virtual cycle time against the 9918 u64 cycle; local 9931 if (!kvm_get_walltime_and_clockread(&ts, &cycle)) 9936 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle); 10486 * exception and start the cycle all over. 12445 * loose cycle time. This isn't too big a deal, since the loss will be
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/linux-master/drivers/ata/ |
H A D | libata-core.c | 1741 /* This is cycle times not frequency - watch the logic! */ 1742 if (pio > 240) /* PIO2 is 240nS per cycle */ 3328 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration 3330 * @cycle: cycle duration in ns 3332 * Return matching xfer mode for @cycle. The returned mode is of 3333 * the transfer type specified by @xfer_shift. If @cycle is too 3334 * slow for @xfer_shift, 0xff is returned. If @cycle is faster 3343 u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) argument 3360 this_cycle = t->cycle; [all...] |
H A D | libata-pata-timings.c | 70 q->cycle = EZ(t->cycle, T); 92 m->cycle = max(a->cycle, b->cycle); 133 * PIO/MW_DMA cycle timing. 141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; 144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; 146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; 160 * DMA cycle timin [all...] |
H A D | pata_acpi.c | 123 acpi->gtm.drive[unit].pio = t->cycle; 150 acpi->gtm.drive[unit].dma = t->cycle;
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