/linux-master/arch/arm/boot/compressed/ |
H A D | head-xscale.S | 28 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 30 @ disabling MMU and caches
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H A D | head-sa1100.S | 38 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 40 @ disabling MMU and caches
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H A D | head.S | 706 * can have both the I and D caches on. 987 * Writethrough caches generally only need 'on' and 'off' 988 * methods. Writeback caches _must_ have the flush method 1447 bic r0, r0, #0x5 @ disable MMU and caches 1463 @ since it mandates that the MMU and caches are on, with all 1468 @ anyway, with the MMU and caches either on or off. 1481 @ When running in HYP mode with the caches on, we're better 1496 @ When running in HYP mode with the caches off, we need to drop
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/linux-master/arch/arm/mm/ |
H A D | proc-arm1020.S | 71 mcr p15, 0, r0, c1, c0, 0 @ disable caches 88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 200 * Harvard caches, you need to implement this function. 216 * Harvard caches, you need to implement this function. 442 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1020e.S | 71 mcr p15, 0, r0, c1, c0, 0 @ disable caches 88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 197 * Harvard caches, you need to implement this function. 213 * Harvard caches, you need to implement this function. 425 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1022.S | 71 mcr p15, 0, r0, c1, c0, 0 @ disable caches 88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 196 * Harvard caches, you need to implement this function. 212 * Harvard caches, you need to implement this function. 417 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm1026.S | 71 mcr p15, 0, r0, c1, c0, 0 @ disable caches 88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 191 * Harvard caches, you need to implement this function. 207 * Harvard caches, you need to implement this function. 407 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm720.S | 51 mcr p15, 0, r0, c1, c0, 0 @ disable caches 117 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 145 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
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H A D | proc-arm740.S | 51 mcr p15, 0, r0, c1, c0, 0 @ disable caches 74 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
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H A D | proc-arm920.S | 63 mcr p15, 0, r0, c1, c0, 0 @ disable caches 80 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 177 * Harvard caches, you need to implement this function. 193 * Harvard caches, you need to implement this function. 397 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 410 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm922.S | 65 mcr p15, 0, r0, c1, c0, 0 @ disable caches 82 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 179 * Harvard caches, you need to implement this function. 195 * Harvard caches, you need to implement this function. 387 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-arm925.S | 86 mcr p15, 0, r0, c1, c0, 0 @ disable caches 112 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 226 * Harvard caches, you need to implement this function. 242 * Harvard caches, you need to implement this function. 444 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 451 mov r0, #4 @ disable write-back on caches explicitly
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H A D | proc-arm926.S | 55 mcr p15, 0, r0, c1, c0, 0 @ disable caches 72 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 189 * Harvard caches, you need to implement this function. 205 * Harvard caches, you need to implement this function. 413 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 426 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 434 mov r0, #4 @ disable write-back on caches explicitly
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H A D | proc-arm940.S | 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 136 * Harvard caches, you need to implement this function. 150 * Harvard caches, you need to implement this function.
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H A D | proc-arm946.S | 51 mcr p15, 0, r0, c1, c0, 0 @ disable caches 170 * Harvard caches, you need to implement this function. 186 * Harvard caches, you need to implement this function.
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H A D | proc-fa526.S | 41 mcr p15, 0, r0, c1, c0, 0 @ disable caches 61 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 143 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-feroceon.S | 81 mcr p15, 0, r0, c1, c0, 0 @ disable caches 98 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 204 * Harvard caches, you need to implement this function. 221 * Harvard caches, you need to implement this function. 513 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 526 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-mohawk.S | 46 mcr p15, 0, r0, c1, c0, 0 @ disable caches 65 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 160 * Harvard caches, you need to implement this function. 176 * Harvard caches, you need to implement this function. 367 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 386 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
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H A D | proc-sa110.S | 51 mcr p15, 0, r0, c1, c0, 0 @ disable caches 68 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 114 * Clean the specified entry of any caches such that the MMU 169 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-sa1100.S | 52 * - Clean and turn off caches. 59 mcr p15, 0, r0, c1, c0, 0 @ disable caches 76 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 124 * Clean the specified entry of any caches such that the MMU 208 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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H A D | proc-v6.S | 46 mcr p15, 0, r0, c1, c0, 0 @ disable caches
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H A D | proc-v7.S | 38 mcr p15, 0, r0, c1, c0, 0 @ disable caches 53 * caches disabled.
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H A D | proc-v7m.S | 149 @ Configure caches (if implemented)
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H A D | proc-xsc3.S | 94 mcr p15, 0, r0, c1, c0, 0 @ disable caches 116 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB 217 * Harvard caches, you need to implement this function. 439 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 459 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
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H A D | proc-xscale.S | 130 mcr p15, 0, r0, c1, c0, 0 @ disable caches 159 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB 258 * Harvard caches, you need to implement this function. 283 * Harvard caches, you need to implement this function. 530 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 544 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
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