Searched refs:bank (Results 1 - 25 of 367) sorted by path

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/linux-master/arch/arm/mach-omap2/
H A Dpowerdomain-common.c47 u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank) argument
49 switch (bank) {
67 u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank) argument
69 switch (bank) {
87 u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank) argument
89 switch (bank) {
H A Dprm2xxx_3xxx.c111 int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, argument
116 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
124 int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, argument
129 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
137 int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) argument
141 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
147 int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) argument
151 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
H A Dpowerdomain.c653 * @bank: memory bank number to set (0-3)
656 * Set the next power state @pwrst that memory bank @bank of the
658 * state. @bank will be a number from 0 to 3, and represents different
661 * supported for this memory bank, -EEXIST if the target memory
662 * bank does not exist or is not controllable, or returns 0 upon
665 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) argument
672 if (pwrdm->banks < (bank + 1))
675 if (!(pwrdm->pwrsts_mem_on[bank]
703 pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) argument
799 pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) argument
829 pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) argument
858 pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) argument
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/linux-master/arch/powerpc/include/asm/
H A Dfsl_lbc.h91 struct fsl_lbc_bank bank[12]; member in struct:fsl_lbc_regs
/linux-master/arch/x86/platform/scx200/
H A Dscx200_32.c51 int bank; local
54 for (bank = 0; bank < 2; ++bank)
55 scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank);
/linux-master/drivers/media/common/b2c2/
H A Dflexcop-sram.c76 static void flexcop_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
82 command = bank | addr | 0x04000000 | (*buf << 0x10);
101 static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
107 command = bank | addr | 0x04008000;
142 u32 bank;
144 bank = 0;
147 bank = (addr & 0x18000) << 0x0d;
152 bank = 0x20000000;
154 bank = 0x10000000;
156 flex_sram_write(adapter, bank, add
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/linux-master/drivers/media/dvb-frontends/cxd2880/
H A Dcxd2880_tnrdmd.h154 u8 bank; member in struct:cxd2880_tnrdmd_cfg_mem
319 u8 bank, u8 address,
/linux-master/drivers/mfd/
H A Dabx500-core.c62 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
69 return ops->set_register(dev, bank, reg, value);
75 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
82 return ops->get_register(dev, bank, reg, value);
88 int abx500_get_register_page_interruptible(struct device *dev, u8 bank, argument
95 return ops->get_register_page(dev, bank,
102 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, argument
109 return ops->mask_and_set_register(dev, bank,
/linux-master/drivers/net/wireless/mediatek/mt7601u/
H A Dinitvals_phy.h10 #define RF_REG_PAIR(bank, reg, value) \
11 { MT_MCU_MEMMAP_RF | (bank) << 16 | (reg), value }
/linux-master/drivers/scsi/cxlflash/
H A Dcommon.h312 return &afu->afu_map->global.bank[CHAN2PORTBANK(i)];
H A Dsislite.h429 #define CXLFLASH_NUM_FC_PORTS_PER_BANK 2 /* fixed # of ports per bank */
450 struct fc_port_bank bank[CXLFLASH_MAX_FC_BANKS]; /* pages 2 - 9 */ member in struct:sisl_global_map
/linux-master/include/dt-bindings/gpio/
H A Duniphier-gpio.h13 #define UNIPHIER_GPIO_PORT(bank, line) \
14 ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line))
/linux-master/include/linux/
H A Dhwspinlock.h58 int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev,
60 int hwspin_lock_unregister(struct hwspinlock_device *bank);
76 struct hwspinlock_device *bank);
78 struct hwspinlock_device *bank,
H A Djz4780-nemc.h23 * enum jz4780_nemc_bank_type - device types which can be connected to a bank
34 extern void jz4780_nemc_set_type(struct device *dev, unsigned int bank,
36 extern void jz4780_nemc_assert(struct device *dev, unsigned int bank,
H A Dscx200_gpio.h11 #define __SCx200_GPIO_BANK unsigned bank = index>>5
12 #define __SCx200_GPIO_IOADDR unsigned short ioaddr = scx200_gpio_base+0x10*bank
13 #define __SCx200_GPIO_SHADOW unsigned long *shadow = scx200_gpio_shadow+bank
36 return (scx200_gpio_shadow[bank] & (1<<index)) ? 1 : 0;
/linux-master/include/sound/
H A Dsoundfont.h21 unsigned char bank; /* Midi bank for this zone */ member in struct:snd_sf_zone
103 int preset, int bank,
/linux-master/include/trace/events/
H A Dmce.h34 __field( u8, bank )
54 __entry->bank = m->bank;
61 __entry->bank, __entry->status,
/linux-master/scripts/dtc/include-prefixes/dt-bindings/gpio/
H A Duniphier-gpio.h13 #define UNIPHIER_GPIO_PORT(bank, line) \
14 ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line))
/linux-master/sound/pci/au88x0/
H A Dau88x0_wt.h12 /* WT channels are grouped in banks. Each bank has 0x20 channels. */
17 /* WT bank base register (as dword address). */
21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */
22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */
23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */
24 #define WT_MRAMP(bank) (((((bank)
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/linux-master/sound/pci/cs46xx/
H A Dcs46xx_lib.h47 unsigned int bank = reg >> 16; local
51 if (bank == 0)
55 writel(val, chip->region.idx[bank+1].remap_addr + offset);
60 unsigned int bank = reg >> 16; local
62 return readl(chip->region.idx[bank+1].remap_addr + offset);
/linux-master/arch/alpha/kernel/
H A Dsys_ruffian.c184 unsigned long bank_addr, bank, ret = 0; local
189 bank = *(vulp)bank_addr;
192 if (bank & 0x01) {
205 bank = (bank & 0x1e) >> 1;
206 if (bank < ARRAY_SIZE(size))
207 ret = size[bank];
/linux-master/arch/arm/kernel/
H A Dtcm.c111 static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, argument
120 * If there are more than one TCM bank of this type,
121 * select the TCM bank to operate on in the TCM selection
127 : "r" (bank));
140 type ? "I" : "D", bank);
144 type ? "I" : "D", bank);
149 bank,
155 /* Not much fun you can do with a size 0 bank */
159 /* Force move the TCM bank to where we want it, enable */
176 bank,
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/linux-master/arch/arm/mach-mxs/
H A Dmach-mxs.c47 #define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr))
/linux-master/arch/arm/mach-omap1/
H A Dams-delta-fiq-handler.S119 gpio: @ GPIO bank interrupt handler
120 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
253 ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank
H A Dirq.c10 * Completely re-written to support various OMAP chips with bank specific
69 static inline unsigned int irq_bank_readl(int bank, int offset) argument
71 return readl_relaxed(irq_banks[bank].va + offset);
73 static inline void irq_bank_writel(unsigned long value, int bank, int offset) argument
75 writel_relaxed(value, irq_banks[bank].va + offset);
103 signed int bank; local
106 bank = IRQ_BANK(irq);
107 /* FIQ is only available on bank 0 interrupts */
108 fiq = bank ? 0 : (fiq & 0x1);
111 irq_bank_writel(val, bank, offse
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