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/linux-master/arch/alpha/include/asm/
H A Dcore_titan.h362 u64 code; /* 0x48 */ member in struct:el_PRIVATEER_envdata_mcheck
H A Dmce.h16 unsigned int code; /* machine check code */ member in struct:el_common
/linux-master/arch/alpha/kernel/
H A Derr_common.c7 * Error handling code supporting Alpha systems
63 mchk_header->code,
H A Derr_titan.c7 * Error handling code supporting TITAN systems
212 * be handled on a different CPU than the BIOS code is run on,
625 emchk->code);
/linux-master/arch/arc/lib/
H A Dmemset.S30 .Laligned: ; This code address should be aligned for speed.
/linux-master/arch/arm/crypto/
H A Dsha1-armv7-neon.S78 #define ARM_LE(code...)
80 #define ARM_LE(code...) code
/linux-master/arch/arm/kernel/
H A Dsigreturn_codes.S3 * sigreturn_codes.S - code sinpets for sigreturn syscalls
21 * Please note sigreturn_codes code are not executed in place. Instead
23 * arch/arm/kernel/signal.c is very sensitive to layout of these code
33 #define ARM_OK(code...) code
35 #define ARM_OK(code...)
64 * lower arch variants, since these code snippets are only
78 /* ARM sigreturn syscall code snippet */
83 /* Thumb sigreturn syscall code snippet */
88 /* ARM sigreturn_rt syscall code snippe
[all...]
/linux-master/arch/arm/lib/
H A Dio-readsw-armv4.S82 #define _BE_ONLY_(code...) code
83 #define _LE_ONLY_(code...)
87 #define _BE_ONLY_(code...)
88 #define _LE_ONLY_(code...) code
/linux-master/arch/arm/mach-orion5x/
H A Dts209-setup.c205 .code = KEY_COPY,
210 .code = KEY_RESTART,
/linux-master/arch/arm/mach-sa1100/
H A Dh3xxx.c3 * Support for Compaq iPAQ H3100 and H3600 handheld computers (common code)
173 .code = KEY_POWER,
180 .code = KEY_ENTER,
/linux-master/arch/arm/nwfpe/
H A Dfpa11.c87 unsigned int code; local
92 code = opcode & 0x00000f00;
93 if (code == 0x00000100 || code == 0x00000200) {
95 code = opcode & 0x0e000000;
96 if (code == 0x0e000000) {
107 } else if (code == 0x0c000000) {
/linux-master/arch/m68k/fpsp040/
H A Dbindec.S59 | of ISCALE and X. A table is given in the code.
H A Dbugfix.S35 | /* Note: for 6d43b or 8d43b, you may want to add the following code
36 | * to get better coverage. (If you do not insert this code, the part
38 | * Do NOT insert this code for 10d43b or later parts.
52 | /* We execute the following code if there is an
67 | * code here to get the correct answer.
81 | * be destroyed by a FMOVEM at the end of all this code.
86 | /* All done. Proceed with the code below */
99 | /* We execute the following code if there is an
116 | * code here to get the correct answer.
131 | * be destroyed by a FMOVEM at the end of all this code
[all...]
H A Ddo_func.S11 | point) are passed onto the emulation code.
500 | This code forces default values for the zero, inf, and nan cases
501 | in the transcendentals code. The CC bits must be set in the
H A Dfpsp.h67 | handler exit code will reload the new frame and discard the old.
73 | the handler exit code restore the value.
95 .set FPSR_CC,USER_FPSR+0 | FPSR condition code
H A Dkernel_ex.S51 | set FPSR exception status dz bit, condition code
106 | set FPSR exception status operr bit, condition code
H A Dres_func.S159 | Branch to the fmove code. If the operand is NaN, do nothing.
166 bras cu_nmove |fmove code will finish
169 | Fall though to the fmove code. If the operand is NaN, do nothing.
177 | Inst is fmove. This code also handles all result writes.
461 | Branch to the fmove code.
465 bras cu_dmove |fmove code will finish
468 | Fall though to the fmove code.
473 | Inst is fmove. This code also handles all result writes.
601 | This code checks for 16-bit overflow conditions on dyadic
605 | of the operands must be denormalized to enter this code
[all...]
H A Dsetox.S182 | this code where the separate entry for denormalized inputs
H A Dutil.S128 andil #0x0000007f,%d0 |clear all except the op code
H A Dx_ovfl.S29 | All trap disabled code applies. In addition the exceptional
H A Dx_unfl.S16 | All trap disabled code applies. In addition the exceptional
197 | round subroutines. All code between these two subroutines
H A Dx_unimp.S8 | op-code that hardware does not support. Trap vector# 11
/linux-master/arch/m68k/ifpsp060/
H A Dfskeleton.S33 | (2) example package entry code
61 | simply execute an "rte" as with the sample code below.
226 | The sample code below enables the FPU, sets the PC field in the exception stack
249 | The sample code below simply executes an "rte".
H A Diskeleton.S33 | (2) example package entry code
125 | Remember that a trace exception may be pending. The code below performs
161 | Entry point for the selected cas emulation code implementation.
172 | Entry point for the selected cas2 emulation code implementation.
185 | algorithms so that no page faults occur within the "core" code
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S6841 # this code where the separate entry for denormalized #
8387 #----Note that this code assumes the denormalized input is NON-ZERO.
10729 mov.b &neg_bmask,FPSR_CC(%a6) # set 'N' code

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