Searched refs:xe_mmio_rmw32 (Results 1 - 8 of 8) sorted by last modified time

/linux-master/drivers/gpu/drm/xe/
H A Dxe_hwmon.c140 *value = xe_mmio_rmw32(hwmon->gt, reg, clr, set);
H A Dxe_device.c360 xe_mmio_rmw32(gt, GU_CNTL, 0, DRIVERFLR);
H A Dxe_wa.c837 xe_mmio_rmw32(mmio, XEHP_CLOCK_GATE_DIS, 0, SGSI_SIDECLK_DIS);
H A Dxe_guc.c626 xe_mmio_rmw32(gt, GUC_SG_INTR_MASK, events, 0);
645 xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK,
H A Dxe_gsc_proxy.c85 xe_mmio_rmw32(gt, HECI_H_CSR(MTL_GSC_HECI2_BASE), clr, set);
H A Dxe_gsc.c563 xe_mmio_rmw32(gt, HECI_H_GS1(MTL_GSC_HECI2_BASE), gs1_clr, gs1_set);
567 xe_mmio_rmw32(gt, HECI_H_CSR(MTL_GSC_HECI2_BASE),
H A Dxe_mmio.h30 u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, u32 set);
68 static inline u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, function
/linux-master/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_uncore.h84 return xe_mmio_rmw32(__compat_uncore_to_gt(uncore), reg, clear, set);

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