/linux-master/drivers/mtd/ubi/ |
H A D | vtbl.c | 70 err = ubi_eba_atomic_leb_change(ubi, layout_vol, i, ubi->vtbl, 105 memcpy(&ubi->vtbl[idx], vtbl_rec, sizeof(struct ubi_vtbl_record)); 129 struct ubi_vtbl_record *vtbl_rec = &ubi->vtbl[vol->vol_id]; 152 * @vtbl: volume table 154 * This function returns zero if @vtbl is all right, %1 if CRC is incorrect, 158 const struct ubi_vtbl_record *vtbl) 168 reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs); 169 alignment = be32_to_cpu(vtbl[i].alignment); 170 data_pad = be32_to_cpu(vtbl[i].data_pad); 171 upd_marker = vtbl[ 157 vtbl_check(const struct ubi_device *ubi, const struct ubi_vtbl_record *vtbl) argument 285 create_vtbl(struct ubi_device *ubi, struct ubi_attach_info *ai, int copy, void *vtbl) argument 488 struct ubi_vtbl_record *vtbl; local 520 init_volumes(struct ubi_device *ubi, const struct ubi_attach_info *ai, const struct ubi_vtbl_record *vtbl) argument [all...] |
H A D | Makefile | 4 ubi-y += vtbl.o vmt.o upd.o build.o cdev.o kapi.o eba.o io.o wl.o attach.o
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H A D | upd.c | 49 ubi_assert(ubi->vtbl[vol->vol_id].upd_marker); 54 vtbl_rec = ubi->vtbl[vol->vol_id]; 82 vtbl_rec = ubi->vtbl[vol->vol_id];
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H A D | vmt.c | 535 vtbl_rec = ubi->vtbl[vol_id]; 688 reserved_pebs = be32_to_cpu(ubi->vtbl[vol_id].reserved_pebs); 796 alignment = be32_to_cpu(ubi->vtbl[vol_id].alignment); 797 data_pad = be32_to_cpu(ubi->vtbl[vol_id].data_pad); 798 name_len = be16_to_cpu(ubi->vtbl[vol_id].name_len); 799 upd_marker = ubi->vtbl[vol_id].upd_marker; 800 name = &ubi->vtbl[vol_id].name[0]; 801 if (ubi->vtbl[vol_id].vol_type == UBI_VID_DYNAMIC) 820 ubi_dump_vtbl_record(&ubi->vtbl[vol_id], vol_id);
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H A D | build.c | 796 ubi->vtbl[vol_id].flags &= ~UBI_VTBL_AUTORESIZE_FLG; 805 vtbl_rec = ubi->vtbl[vol_id]; 1072 vfree(ubi->vtbl); 1151 vfree(ubi->vtbl);
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H A D | ubi.h | 311 * %UBI_VTBL_SKIP_CRC_CHECK_FLG flag in the vtbl entry 463 * @vtbl: in-RAM volume table copy 576 struct ubi_vtbl_record *vtbl; member in struct:ubi_device 836 /* vtbl.c */
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H A D | attach.c | 1644 vfree(ubi->vtbl);
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/linux-master/arch/arm/crypto/ |
H A D | blake2b-neon-core.S | 48 // Tables for computing ror64(x, 24) and ror64(x, 16) using the vtbl.8 98 vtbl.8 d4, {d4}, M_0 99 vtbl.8 d5, {d5}, M_0 100 vtbl.8 d6, {d6}, M_0 101 vtbl.8 d7, {d7}, M_0 122 vtbl.8 d12, {d12}, M_0 123 vtbl.8 d13, {d13}, M_0 124 vtbl.8 d14, {d14}, M_0 125 vtbl.8 d15, {d15}, M_0 186 vtbl [all...] |
H A D | chacha-neon-core.S | 27 * (d) vtbl.8 + vtbl.8 (multiple of 8 bits rotations only, 37 * For the 8-bit rotation, we use vtbl.8 + vtbl.8. On Cortex-A7, this sequence 42 * A disadvantage is that on Cortex-A53, the vtbl sequence is the same speed as 43 * (a), so the need to load the rotation table actually makes the vtbl method 87 vtbl.8 d6, {d6}, d10 88 vtbl.8 d7, {d7}, d10 117 vtbl.8 d6, {d6}, d10 118 vtbl [all...] |
H A D | crct10dif-ce-core.S | 268 vtbl.8 q1l, {q7l-q7h}, q2l 269 vtbl.8 q1h, {q7l-q7h}, q2h 274 vtbl.8 q3l, {q7l-q7h}, q2l 275 vtbl.8 q3h, {q7l-q7h}, q2h
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H A D | aes-ce-core.S | 319 vtbl.8 d4, {d0-d1}, d10 320 vtbl.8 d5, {d0-d1}, d11 321 vtbl.8 d2, {d6-d7}, d12 322 vtbl.8 d3, {d6-d7}, d13 356 vtbl.8 d4, {d0-d1}, d10 357 vtbl.8 d5, {d0-d1}, d11 579 vtbl.8 d4, {d0-d1}, d4 580 vtbl.8 d5, {d0-d1}, d5 671 vtbl.8 d4, {d0-d1}, d4 672 vtbl [all...] |
H A D | ghash-ce-core.S | 588 vtbl.8 e3l, {e0}, e3l 589 vtbl.8 e3h, {e0}, e3h 595 vtbl.8 T1_L, {e0}, e2l 596 vtbl.8 T1_H, {e0}, e2h 644 vtbl.8 e3l, {e0}, e3l 645 vtbl.8 e3h, {e0}, e3h 649 vtbl.8 T1_L, {e0}, e2l 650 vtbl.8 T1_H, {e0}, e2h 677 vtbl.8 XL_L, {T1}, e0l // keep authsize bytes only 678 vtbl [all...] |
H A D | aes-neonbs-core.S | 67 vtbl.8 \out\()l, {\tbl}, \in\()l 69 vtbl.8 \out\()h, {\tmp}, \in\()h 71 vtbl.8 \out\()h, {\tbl}, \in\()h 872 vtbl.8 d16, {q5}, d16 873 vtbl.8 d17, {q5}, d17
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