| /linux-master/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_devcaps.h | 35 int vmw_devcaps_create(struct vmw_private *vmw);
36 void vmw_devcaps_destroy(struct vmw_private *vmw);
37 uint32_t vmw_devcaps_size(const struct vmw_private *vmw, bool gb_aware);
38 int vmw_devcaps_copy(struct vmw_private *vmw, bool gb_aware,
41 static inline uint32_t vmw_devcap_get(struct vmw_private *vmw, argument
44 bool gb_objects = !!(vmw->capabilities & SVGA_CAP_GBOBJECTS);
46 return vmw->devcaps[devcap];
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| H A D | vmwgfx_devcaps.c | 85 int vmw_devcaps_create(struct vmw_private *vmw) argument
87 bool gb_objects = !!(vmw->capabilities & SVGA_CAP_GBOBJECTS);
91 vmw->devcaps = vzalloc(sizeof(uint32_t) * SVGA3D_DEVCAP_MAX);
92 if (!vmw->devcaps)
95 vmw_write(vmw, SVGA_REG_DEV_CAP, i);
96 vmw->devcaps[i] = vmw_read(vmw, SVGA_REG_DEV_CAP);
102 void vmw_devcaps_destroy(struct vmw_private *vmw) argument
104 vfree(vmw->devcaps);
105 vmw
109 vmw_devcaps_size(const struct vmw_private *vmw, bool gb_aware) argument
125 vmw_devcaps_copy(struct vmw_private *vmw, bool gb_aware, void *dst, uint32_t dst_size) argument
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| H A D | vmwgfx_drv.c | 467 static void vmw_device_fini(struct vmw_private *vmw) argument
472 vmw_write(vmw, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
473 while (vmw_read(vmw, SVGA_REG_BUSY) != 0)
476 vmw->last_read_seqno = vmw_fence_read(vmw);
478 vmw_write(vmw, SVGA_REG_CONFIG_DONE,
479 vmw->config_done_state);
480 vmw_write(vmw, SVGA_REG_ENABLE,
481 vmw->enable_state);
482 vmw_write(vmw, SVGA_REG_TRACE
1337 vmwgfx_supported(struct vmw_private *vmw) argument
1439 vmw_debugfs_resource_managers_init(struct vmw_private *vmw) argument
1654 struct vmw_private *vmw; local
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| H A D | vmwgfx_drv.h | 140 * struct vmw-resource - base class for hardware resources
776 bool vmwgfx_supported(struct vmw_private *vmw);
857 int vmw_gem_object_create(struct vmw_private *vmw,
888 extern bool vmw_cmd_supported(struct vmw_private *vmw);
1457 static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg) argument
1459 BUG_ON(vmw_is_svga_v3(vmw));
1460 return READ_ONCE(*(vmw->fifo_mem + fifo_reg));
1471 static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg, argument
1474 BUG_ON(vmw_is_svga_v3(vmw));
1475 WRITE_ONCE(*(vmw
1495 vmw_irq_status_read(struct vmw_private *vmw) argument
1505 vmw_irq_status_write(struct vmw_private *vmw, uint32 status) argument
1514 vmw_has_fences(struct vmw_private *vmw) argument
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| H A D | vmwgfx_cmd.c | 385 struct vmw_private *vmw,
389 u32 *fifo_mem = vmw->fifo_mem;
398 vmw_fifo_mem_write(vmw, SVGA_FIFO_RESERVED, bytes);
407 struct vmw_private *vmw,
415 vmw_fifo_mem_write(vmw, (next_cmd >> 2), *buffer++);
420 vmw_fifo_mem_write(vmw, SVGA_FIFO_NEXT_CMD, next_cmd);
672 * @vmw: The device private structure.
676 bool vmw_cmd_supported(struct vmw_private *vmw) argument
679 (vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
681 if (vmw_is_svga_v3(vmw))
384 vmw_fifo_res_copy(struct vmw_fifo_state *fifo_state, struct vmw_private *vmw, uint32_t next_cmd, uint32_t max, uint32_t min, uint32_t bytes) argument
406 vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state, struct vmw_private *vmw, uint32_t next_cmd, uint32_t max, uint32_t min, uint32_t bytes) argument
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| H A D | vmwgfx_bo.c | 365 * vmw_bo_init - Initialize a vmw buffer object
411 int vmw_bo_create(struct vmw_private *vmw, argument
426 ret = vmw_bo_init(vmw, *p_bo, params, vmw_bo_free);
595 * vmw_user_bo_lookup - Look up a vmw user buffer object from a handle.
603 * The vmw buffer object pointer will be refcounted (both ttm and gem)
822 struct vmw_private *vmw = vmw_priv_from_ttm(bdev); local
837 drm_warn(&vmw->drm,
848 struct vmw_private *vmw = vmw_priv_from_ttm(bdev); local
851 if (vmw->has_mob)
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| H A D | vmwgfx_irq.c | 35 static u32 vmw_irqflag_fence_goal(struct vmw_private *vmw) argument
37 if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
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| H A D | vmwgfx_gem.c | 114 int vmw_gem_object_create(struct vmw_private *vmw, argument
118 int ret = vmw_bo_create(vmw, params, p_vbo);
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| H A D | vmwgfx_fence.c | 85 static u32 vmw_fence_goal_read(struct vmw_private *vmw) argument
87 if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
88 return vmw_read(vmw, SVGA_REG_FENCE_GOAL);
90 return vmw_fifo_mem_read(vmw, SVGA_FIFO_FENCE_GOAL);
93 static void vmw_fence_goal_write(struct vmw_private *vmw, u32 value) argument
95 if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
96 vmw_write(vmw, SVGA_REG_FENCE_GOAL, value);
98 vmw_fifo_mem_write(vmw, SVGA_FIFO_FENCE_GOAL, value);
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| H A D | vmwgfx_kms.c | 936 struct vmw_private *vmw = vmw_priv(crtc->dev); local
949 drm_dbg_driver(&vmw->drm,
987 * vmw-specific) for the specified crtc.
1014 * vmw_du_crtc_reset - creates a blank vmw crtc state
1048 * Destroys the crtc state (both common and vmw-specific) for the
1064 * vmw-specific) for the specified plane.
1100 * vmw_du_plane_reset - creates a blank vmw plane state
1129 * Destroys the plane state (both common and vmw-specific) for the
1154 * vmw-specific) for the specified connector.
1181 * vmw_du_connector_reset - creates a blank vmw connecto
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