Searched refs:via_write_reg_mask (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/video/fbdev/via/
H A Dvia_clock.c44 via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */
47 via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */
52 via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */
56 via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */
61 via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */
64 via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */
69 via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */
73 via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */
78 via_write_reg_mask(VIASR, 0x40, 0x01, 0x01); /* enable reset */
82 via_write_reg_mask(VIAS
[all...]
H A Dvia_modesetting.c36 via_write_reg_mask(VIACR, 0x11, 0x00, 0x80);
41 via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F);
43 via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F)
46 via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01)
53 via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20,
56 via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F);
60 via_write_reg_mask(VIACR, 0x33, (raw.hor_sync_start >> (8 - 4) & 0x10)
62 via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01)
66 via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08);
69 via_write_reg_mask(VIAC
[all...]
H A Dvia-gpio.c123 via_write_reg_mask(VIASR, gpio->vg_port_index, 0,
163 via_write_reg_mask(VIASR, gpio->vg_port_index, 0x02, 0x02);
168 via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02);
H A Ddvi.c403 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
416 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
438 via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
440 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
448 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
H A Dvia_i2c.c57 via_write_reg_mask(adap_data->io_port, adap_data->ioport_index,
73 via_write_reg_mask(adap_data->io_port, adap_data->ioport_index,
H A Dhw.c694 via_write_reg_mask(VIACR, index, value, mask);
713 via_write_reg_mask(VIASR, 0x16, value, 0x40);
785 via_write_reg_mask(VIACR, 0x36, value, 0x30);
803 via_write_reg_mask(VIASR, 0x1E, value, 0xC0);
821 via_write_reg_mask(VIASR, 0x1E, value, 0x30);
839 via_write_reg_mask(VIASR, 0x2A, value, 0x03);
857 via_write_reg_mask(VIASR, 0x2A, value, 0x0C);
890 via_write_reg_mask(VIACR, 0x9B, polarity << 5, 0x60);
892 via_write_reg_mask(VIACR, 0x99, polarity << 5, 0x60);
894 via_write_reg_mask(VIAC
[all...]
H A Dhw.h19 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m)
H A Dlcd.c560 via_write_reg_mask(VIACR, 0x79, 0x00,
/linux-master/include/linux/
H A Dvia-core.h200 static inline void via_write_reg_mask(u16 port, u8 index, u8 data, u8 mask) function
/linux-master/drivers/media/platform/via/
H A Dvia-camera.c1039 via_write_reg_mask(VIASR, 0x78, 0, 0x80);
1040 via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0);
1207 via_write_reg_mask(VIASR, 0x78, 0, 0x80);
1208 via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0);

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